MAX3293/MAX3294/MAX3295 20Mbps, +3.3V, SOT23 RS-485/ RS-422 Transmitters General Description
... devices contain one differential transmitter. The MAX3295 transmitter operates at data rates up to 20Mbps, with an output skew of less than 5ns, and a guaranteed driver propagation delay below 25ns. The MAX3293 (250kbps) and MAX3294 (2.5Mbps) are slew-rate limited to minimize EMI and reduce reflecti ...
... devices contain one differential transmitter. The MAX3295 transmitter operates at data rates up to 20Mbps, with an output skew of less than 5ns, and a guaranteed driver propagation delay below 25ns. The MAX3293 (250kbps) and MAX3294 (2.5Mbps) are slew-rate limited to minimize EMI and reduce reflecti ...
Hd1800
... “in” the rear (recessed) BRIDGE switch after you have made your connections to the rear center RED binding posts (ch 1 is + and ch 2 is -). Carefully select or damage may result to the speakers (this is why the switch has been recessed). No other speaker connectors or binding posts can be used at th ...
... “in” the rear (recessed) BRIDGE switch after you have made your connections to the rear center RED binding posts (ch 1 is + and ch 2 is -). Carefully select or damage may result to the speakers (this is why the switch has been recessed). No other speaker connectors or binding posts can be used at th ...
MAX2034 Quad-Channel, Ultra-Low-Noise Amplifier with Digitally Programmable Input Impedance General Description
... Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Expo ...
... Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Expo ...
the l297 stepper motor controller
... RESET is an asynchronous reset input which restores the translator block to the home position (state 1, ABCD = 0101). The HOME output (open collector) signals this condition and is intended to the ANDed with the output of a mechanical home position sensor. Finally, there is an ENABLE input connected ...
... RESET is an asynchronous reset input which restores the translator block to the home position (state 1, ABCD = 0101). The HOME output (open collector) signals this condition and is intended to the ANDed with the output of a mechanical home position sensor. Finally, there is an ENABLE input connected ...
NTE21256 262,144–Bit Dynamic Random Access Memory (DRAM)
... The read or write mode is selected with the WE input. A logic high (VIH) on WE dictates read mode; logic low (VIL) dictates write mode. The data input is disabled when read mode is selected. When WE goes low prior to CAS, data output (DO) will remain in the high–impedance state for the entire cycle ...
... The read or write mode is selected with the WE input. A logic high (VIH) on WE dictates read mode; logic low (VIL) dictates write mode. The data input is disabled when read mode is selected. When WE goes low prior to CAS, data output (DO) will remain in the high–impedance state for the entire cycle ...
a 10-Bit, 125 MSPS High Performance TxDAC D/A Converter
... of 15 equal current sources whose value is 1/16th of an MSB current source. The remaining LSB is a binary weighted fractions of the middle-bits current sources. Implementing the middle and lower bits with current sources, instead of an R-2R ladder, enhances its dynamic performance for multitone or l ...
... of 15 equal current sources whose value is 1/16th of an MSB current source. The remaining LSB is a binary weighted fractions of the middle-bits current sources. Implementing the middle and lower bits with current sources, instead of an R-2R ladder, enhances its dynamic performance for multitone or l ...
AN-162 LM2907 Tachometer/Speed Switch Building Block
... The ground referenced input capability of the LM2907-8 allows direct coupling to transformer inputs, or variable reluctance pickups. Figure 5(a) illustrates this connection. In many cases, the frequency signal must be obtained from another circuit whose output may not go below ground. This may be re ...
... The ground referenced input capability of the LM2907-8 allows direct coupling to transformer inputs, or variable reluctance pickups. Figure 5(a) illustrates this connection. In many cases, the frequency signal must be obtained from another circuit whose output may not go below ground. This may be re ...
Lattice FPGA Presentation??
... All these port and routing timings are integrated into the software so that it can determine timing closure on every signal path between register. For the software to be effective, users must enter timing ‘constraints’. - This sets FMAX and prioritizes internal requirements (general goals). Ex ...
... All these port and routing timings are integrated into the software so that it can determine timing closure on every signal path between register. For the software to be effective, users must enter timing ‘constraints’. - This sets FMAX and prioritizes internal requirements (general goals). Ex ...
FEATURES DESCRIPTION
... addition of an attenuator circuit. This technique gives the user a high-speed and low-power 422 receiver. If the ground noise between the transmitter and receiver is not a concern (less than ±1 V), the answer can be as simple as shown in Figure 14. A resistor divider circuit in front of the LVDS rec ...
... addition of an attenuator circuit. This technique gives the user a high-speed and low-power 422 receiver. If the ground noise between the transmitter and receiver is not a concern (less than ±1 V), the answer can be as simple as shown in Figure 14. A resistor divider circuit in front of the LVDS rec ...
MAX8569A/MAX8569B 200mA Step-Up Converters in 6-Pin SOT23 and TDFN General Description
... Select R2 between 100kΩ and 1MΩ to minimize battery drain. Calculate R1 as follows: R1 = R2 x ((VOFF / V SHDN) - 1) where VOFF is the battery voltage at which the part shuts down and V SHDN = 1.228V. Note that input ripple can sometimes cause false shutdowns. To minimize the effect of ripple, connec ...
... Select R2 between 100kΩ and 1MΩ to minimize battery drain. Calculate R1 as follows: R1 = R2 x ((VOFF / V SHDN) - 1) where VOFF is the battery voltage at which the part shuts down and V SHDN = 1.228V. Note that input ripple can sometimes cause false shutdowns. To minimize the effect of ripple, connec ...
OP77
... Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise ...
... Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise ...
SN74GTLPH16916 数据资料 dataSheet 下载
... backplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This improves signal integrity, which allows adequate noise margin to be maintained at higher frequencies. Active bus-hold circuitry holds unused or undriven LVTTL data inputs at a valid logic state. Use of ...
... backplanes, unevenly distributed cards, or empty slots during low-to-high signal transitions. This improves signal integrity, which allows adequate noise margin to be maintained at higher frequencies. Active bus-hold circuitry holds unused or undriven LVTTL data inputs at a valid logic state. Use of ...
Evaluates: MAX5090 MAX5090 Evaluation Kit General Description Features
... and high efficiency up to 90%. The MAX5090 IC switches at 127kHz but can be synchronized with an external clock to operate at a switching frequency between 119kHz and 200kHz. The MAX5090 EV kit is a fully assembled and tested surface-mount circuit board. It can also be used to test other fixed outpu ...
... and high efficiency up to 90%. The MAX5090 IC switches at 127kHz but can be synchronized with an external clock to operate at a switching frequency between 119kHz and 200kHz. The MAX5090 EV kit is a fully assembled and tested surface-mount circuit board. It can also be used to test other fixed outpu ...
MAX186/MAX188 Low-Power, 8-Channel, Serial 12-Bit ADCs General Description
... to either one of the analog inputs. This configuration is pseudo-differential to the effect that only the signal at IN+ is sampled. The return side (IN-) must remain stable within ±0.5LSB (±0.1LSB for best results) with respect to AGND during a conversion. Accomplish this by connecting a 0.1µF capac ...
... to either one of the analog inputs. This configuration is pseudo-differential to the effect that only the signal at IN+ is sampled. The return side (IN-) must remain stable within ±0.5LSB (±0.1LSB for best results) with respect to AGND during a conversion. Accomplish this by connecting a 0.1µF capac ...
DS1110 10-Tap Silicon Delay Line General Description Features
... The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 16-pin SO or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever is greater, at 5V an ...
... The DS1110 delay line is an improved replacement for the DS1010. It has ten equally spaced taps providing delays from 5ns to 500ns. The devices are offered in a standard 16-pin SO or 14-pin TSSOP. The DS1110 series delay lines provide a nominal accuracy of ±5% or ±2ns, whichever is greater, at 5V an ...
Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC AD7357
... GENERAL DESCRIPTION ...
... GENERAL DESCRIPTION ...
74ALVC16245 Low Voltage 16-Bit Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs 7
... byte has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. The 74ALVC16245 is designed for low voltag ...
... byte has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. The 74ALVC16245 is designed for low voltag ...
ADS8481 - Texas Instruments
... The ADS8481 is an 18-bit, 1-MSPS A/D converter with an internal 4.096-V reference and a pseudo-differential unipolar single-ended input. The device includes a 18-bit capacitor-based SAR A/D converter with inherent sample and hold. The ADS8481 offers a full 18-bit interface, a 16-bit option where dat ...
... The ADS8481 is an 18-bit, 1-MSPS A/D converter with an internal 4.096-V reference and a pseudo-differential unipolar single-ended input. The device includes a 18-bit capacitor-based SAR A/D converter with inherent sample and hold. The ADS8481 offers a full 18-bit interface, a 16-bit option where dat ...
Board-Level Considerations
... be used to find out overall drive capability of a device. They give an estimate of source and sink currents per I/O basis. IOH and IOL are specified in the datasheets. Only those values are guaranteed for operation. The device will not necessarily sustain in a condition where it is forced to source ...
... be used to find out overall drive capability of a device. They give an estimate of source and sink currents per I/O basis. IOH and IOL are specified in the datasheets. Only those values are guaranteed for operation. The device will not necessarily sustain in a condition where it is forced to source ...
PWM5032 RadHard High Speed PWM Controller (3/15)
... enhancements in performance and functionality. The chip operates in either the voltage or current mode and can support a wide variety of converter topologies. Radiation hardened by design techniques ensure the chip’s outstanding radiation tolerance, > 1 Mrad(Si), while reducing operating current by ...
... enhancements in performance and functionality. The chip operates in either the voltage or current mode and can support a wide variety of converter topologies. Radiation hardened by design techniques ensure the chip’s outstanding radiation tolerance, > 1 Mrad(Si), while reducing operating current by ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.