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... conditions, the normally static values of VIL and VIH change under dynamic conditions. For parts with low output drive, such effects were usually ignored, but for high output drive parts, such as ALVT, it is useful to know how these values may change. For instance, better noise margin targets may be ...
... conditions, the normally static values of VIL and VIH change under dynamic conditions. For parts with low output drive, such effects were usually ignored, but for high output drive parts, such as ALVT, it is useful to know how these values may change. For instance, better noise margin targets may be ...
ADS5413 数据资料 dataSheet 下载
... The ADS5413 is a low power, 12-bit, 65-MSPS, CMOS pipeline analog-to-digital converter (ADC) that operates from a single 3.3-V supply, while offering the choice of digital output levels from 1.8 V to 3.3 V. The low noise, high linearity, and low clock jitter makes the ADC well suited for high-input ...
... The ADS5413 is a low power, 12-bit, 65-MSPS, CMOS pipeline analog-to-digital converter (ADC) that operates from a single 3.3-V supply, while offering the choice of digital output levels from 1.8 V to 3.3 V. The low noise, high linearity, and low clock jitter makes the ADC well suited for high-input ...
MAX1901/MAX1902/MAX1904 500kHz Multi-Output, Low-Noise Power-Supply Controllers for Notebook Computers General Description
... Each of the four digital soft-start levels is tested for functionality; the steps are typically in 20mV increments. High duty-factor operation supports low input-to-output differential voltages, and is achieved at a lowered operating frequency (see the Dropout Operation section). MAX1902 only. Off m ...
... Each of the four digital soft-start levels is tested for functionality; the steps are typically in 20mV increments. High duty-factor operation supports low input-to-output differential voltages, and is achieved at a lowered operating frequency (see the Dropout Operation section). MAX1902 only. Off m ...
FG2206 Construction Manual
... Exar. It is capable of producing high quality sine, square and triangle waveforms of high‐ stability and accuracy. The circuit uses either one of the timing capacitors C12, C8, C7, C6, C1 or C40. It therefore has five (widely overlapping) ranges. (C40 is reserve). In conjunction with R47 and R2 th ...
... Exar. It is capable of producing high quality sine, square and triangle waveforms of high‐ stability and accuracy. The circuit uses either one of the timing capacitors C12, C8, C7, C6, C1 or C40. It therefore has five (widely overlapping) ranges. (C40 is reserve). In conjunction with R47 and R2 th ...
AD9709 数据手册DataSheet 下载
... independently using two external resistors, or IOUTFS for both DACs can be set by using a single external resistor. See the Gain Control Mode section for important date code information on this feature. The DACs utilize a segmented current source architecture combined with a proprietary switching te ...
... independently using two external resistors, or IOUTFS for both DACs can be set by using a single external resistor. See the Gain Control Mode section for important date code information on this feature. The DACs utilize a segmented current source architecture combined with a proprietary switching te ...
HMC920LP5E - JS Commtech
... The HMC920LP5E standard application circuit generates 3.5V digital supply voltage (VDIG) for internal use, and -2.5V negative voltage (VNEG) for depletion mode devices. If an external negative supply is already available or an enhancement mode device is targeted, the negative voltage generator can b ...
... The HMC920LP5E standard application circuit generates 3.5V digital supply voltage (VDIG) for internal use, and -2.5V negative voltage (VNEG) for depletion mode devices. If an external negative supply is already available or an enhancement mode device is targeted, the negative voltage generator can b ...
Base coupled differential amplifier - Dipartimento di Ingegneria dell
... conguration scheme; (iii) reduced silicon area and noise since high quality factor (Q¿30) inductors, realized by means of wire bonding, are used instead of integrated inductors. The operating point is the same for Q2 and Q4 . The shunt capacitor C0 has been introduced to reduce the input impedance ...
... conguration scheme; (iii) reduced silicon area and noise since high quality factor (Q¿30) inductors, realized by means of wire bonding, are used instead of integrated inductors. The operating point is the same for Q2 and Q4 . The shunt capacitor C0 has been introduced to reduce the input impedance ...
HMC726LC3C 数据资料DataSheet下载
... General Description The HMC726LC3C is an AND/NAND/OR/NOR function designed to support data transmission rates of up to 14 Gbps, and clock frequencies as high as 14 GHz. The HMC726LC3C may be easily configured to provide any of the following logic functions: AND, NAND, OR and NOR. All differential in ...
... General Description The HMC726LC3C is an AND/NAND/OR/NOR function designed to support data transmission rates of up to 14 Gbps, and clock frequencies as high as 14 GHz. The HMC726LC3C may be easily configured to provide any of the following logic functions: AND, NAND, OR and NOR. All differential in ...
AD5516: 英文产品数据手册下载
... The AD5516 is a 16-channel, 12-bit voltage-output DAC. The selected DAC register is written to via the 3-wire serial interface. DAC selection is accomplished via address bits A3–A0. 14-bit resolution can be achieved by fine adjustment in Increment/Decrement Mode (Mode 2). The serial interface operat ...
... The AD5516 is a 16-channel, 12-bit voltage-output DAC. The selected DAC register is written to via the 3-wire serial interface. DAC selection is accomplished via address bits A3–A0. 14-bit resolution can be achieved by fine adjustment in Increment/Decrement Mode (Mode 2). The serial interface operat ...
General Specifications MODEL UT320 Digital Indicating Controller
... min. of measured input range width A PV tracking function operates automatically when the setpoint is changed, the power is turned on, or the mode is changed from manual to automatic. Direct/reverse action: The output increase/decrease direction can be defined corresponding to a positive or negative ...
... min. of measured input range width A PV tracking function operates automatically when the setpoint is changed, the power is turned on, or the mode is changed from manual to automatic. Direct/reverse action: The output increase/decrease direction can be defined corresponding to a positive or negative ...
HIN202, HIN206, HIN207, HIN208, HIN211, HIN213 Datasheet
... Figure 1. The charge pump contains two sections: the voltage doubler and the voltage inverter. Each section is driven by a two phase, internally generated clock to generate +10V and -10V. The nominal clock frequency is 125kHz. During phase one of the clock, capacitor C1 is charged to VCC . During ph ...
... Figure 1. The charge pump contains two sections: the voltage doubler and the voltage inverter. Each section is driven by a two phase, internally generated clock to generate +10V and -10V. The nominal clock frequency is 125kHz. During phase one of the clock, capacitor C1 is charged to VCC . During ph ...
High performance 3 A ULDO linear regulator
... Different configurations for VIN and VBIAS are possibleand the power sequencing must consider the different timings in which the power suppliesbecomes available. In order to properly drive the device internal logic, it is reccomendedto control the sequence between EN signal and the VIN / VBIAS appli ...
... Different configurations for VIN and VBIAS are possibleand the power sequencing must consider the different timings in which the power suppliesbecomes available. In order to properly drive the device internal logic, it is reccomendedto control the sequence between EN signal and the VIN / VBIAS appli ...
Ultra Low Power Boost Converter with Battery Management for
... The bq25504 was designed with the flexibility to support a variety of energy storage elements. The availability of the sources from which harvesters extract their energy can often be sporadic or time-varying. Systems will typically need some type of energy storage element, such as a rechargeable bat ...
... The bq25504 was designed with the flexibility to support a variety of energy storage elements. The availability of the sources from which harvesters extract their energy can often be sporadic or time-varying. Systems will typically need some type of energy storage element, such as a rechargeable bat ...
Single LNB Supply and Control Voltage Regulator A8293
... from the TCAP pin to GND (CTCAP or C7 in the Applications Schematic). Note that during start-up, the BOOST pin is precharged to the input voltage minus a voltage drop. As a result, the slew rate control for the BOOST pin occurs from this voltage. The value of CTCAP can be calculated using the follow ...
... from the TCAP pin to GND (CTCAP or C7 in the Applications Schematic). Note that during start-up, the BOOST pin is precharged to the input voltage minus a voltage drop. As a result, the slew rate control for the BOOST pin occurs from this voltage. The value of CTCAP can be calculated using the follow ...
MAX11156 18-Bit, 500ksps, ±5V SAR ADC with Internal Reference in TDFN General Description
... small size, and internal reference. The MAX11156 measures a ±5V (10VP-P) input range while operating from a single 5V supply. A patented charge-pump architecture allows direct sampling of high- impedance sources. The MAX11156 integrates an optional 6ppm/°C reference with internal buffer, saving the ...
... small size, and internal reference. The MAX11156 measures a ±5V (10VP-P) input range while operating from a single 5V supply. A patented charge-pump architecture allows direct sampling of high- impedance sources. The MAX11156 integrates an optional 6ppm/°C reference with internal buffer, saving the ...
MAX15112 Evaluation Kit Evaluates: MAX15112 General Description Features
... SS/REFIN to GND. By default, C16 is currently 0.1FF, which gives a soft-start time of approximately 6ms. To adjust the soft-start time, determine C16 using the following formula: C16 = (10FA x tSS)/0.6V where tSS is the required soft-start time in seconds and C16 is in farads. C16 should be a minimu ...
... SS/REFIN to GND. By default, C16 is currently 0.1FF, which gives a soft-start time of approximately 6ms. To adjust the soft-start time, determine C16 using the following formula: C16 = (10FA x tSS)/0.6V where tSS is the required soft-start time in seconds and C16 is in farads. C16 should be a minimu ...
BDTIC www.BDTIC.com/infineon Resonant LLC Converter: Operation and Design 250W 33Vin 400Vout Design Example
... As mentioned above, m ...
... As mentioned above, m ...
MAX2686L/MAX2693L GPS/GNSS Low-Noise Amplifiers with Integrated LDO General Description
... The value of the input coupling capacitor affects IIP3. A smaller coupling capacitor results in lower IIP3. The devices integrate an on-chip output matching to 50I at the output, eliminating the need for external matching components. Table 1 and Table 2 list typical device S parameters and Kf values ...
... The value of the input coupling capacitor affects IIP3. A smaller coupling capacitor results in lower IIP3. The devices integrate an on-chip output matching to 50I at the output, eliminating the need for external matching components. Table 1 and Table 2 list typical device S parameters and Kf values ...
AN1080/D External−Sync Power Supply with Universal Input
... the whole rectification circuit forms a voltage doubler. In 180−260 V range, the triac turns off and the rectification circuit works as normal. This design can significantly reduce the current ripples of the two smoothing capacitors, Cin, and the switching stresses on the power transistor(s) due to ...
... the whole rectification circuit forms a voltage doubler. In 180−260 V range, the triac turns off and the rectification circuit works as normal. This design can significantly reduce the current ripples of the two smoothing capacitors, Cin, and the switching stresses on the power transistor(s) due to ...
Integrating ADC
An integrating ADC is a type of analog-to-digital converter that converts an unknown input voltage into a digital representation through the use of an integrator. In its most basic implementation, the unknown input voltage is applied to the input of the integrator and allowed to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter's clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution.Converters of this type can achieve high resolution, but often do so at the expense of speed. For this reason, these converters are not found in audio or signal processing applications. Their use is typically limited to digital voltmeters and other instruments requiring highly accurate measurements.