80K-40 High Voltage Probe
... * The input impedance of Autoranging Fluke handheld digital multimeters varies as a function of range. The only range that deviates significantly from 10 MΩ is the 3V (Models 21, 23, 25, 27, 70, 73, 75, 77) or 4V (Models 10, 11, 12, 29, 79, 83, 85, 86, 87, 88) range where the impedance is 11.11 MΩ. ...
... * The input impedance of Autoranging Fluke handheld digital multimeters varies as a function of range. The only range that deviates significantly from 10 MΩ is the 3V (Models 21, 23, 25, 27, 70, 73, 75, 77) or 4V (Models 10, 11, 12, 29, 79, 83, 85, 86, 87, 88) range where the impedance is 11.11 MΩ. ...
EE 230: Optical Fiber Communication Lecture 12
... BER is equal to number of errors divided by total number of pulses (ones and zeros). Total number of pulses is bit rate B times time interval. BER is thus not really a rate, but a unitless probability. ...
... BER is equal to number of errors divided by total number of pulses (ones and zeros). Total number of pulses is bit rate B times time interval. BER is thus not really a rate, but a unitless probability. ...
LMX2350/LMX2352 PLLatinum Fractional N RF / Integer N IF Synthesizer
... The fractional compensation circuitry of the LMX2350 and LMX2352 RF dividers allow the user to adjust the VCO’s tuning resolution in 1/16 or 1/15 increments of the phase detector comparison frequency. A 4 bit register is programmed with the fractions desired numerator, while another bit selects betw ...
... The fractional compensation circuitry of the LMX2350 and LMX2352 RF dividers allow the user to adjust the VCO’s tuning resolution in 1/16 or 1/15 increments of the phase detector comparison frequency. A 4 bit register is programmed with the fractions desired numerator, while another bit selects betw ...
EXIA Field Exciter Interface Board
... Total attenuation ratios are then LOW, K = 250 and HIGH, K = 100. Testpoints are provided for monitoring these differential voltages. A dv/dt filter can be added to each line-line voltage feedback at the user level by making signal ODVDTSEL a logic LOW. With or without the dv/dt filter, all three li ...
... Total attenuation ratios are then LOW, K = 250 and HIGH, K = 100. Testpoints are provided for monitoring these differential voltages. A dv/dt filter can be added to each line-line voltage feedback at the user level by making signal ODVDTSEL a logic LOW. With or without the dv/dt filter, all three li ...
INTRODUCTION
... When connecting a switch or push-button to a GPIO pin, a common problem that arises is contact bounce (also called chatter). Due to various mechanical and electrical factors, a series of random oscillations may appear during switching. To mitigate these effects, a timing-based debounce circuit is in ...
... When connecting a switch or push-button to a GPIO pin, a common problem that arises is contact bounce (also called chatter). Due to various mechanical and electrical factors, a series of random oscillations may appear during switching. To mitigate these effects, a timing-based debounce circuit is in ...
Input and Output
... Up to this point I/O have been set as inputs or outputs, and states set or read individually. Looking at the Memory Map, there are 3 16-bit registers which set the direction for the I/O, and which are read or written to. IN10 reads the value in the 10th bit (P10) of INS. OUT9 =1 sets the output ...
... Up to this point I/O have been set as inputs or outputs, and states set or read individually. Looking at the Memory Map, there are 3 16-bit registers which set the direction for the I/O, and which are read or written to. IN10 reads the value in the 10th bit (P10) of INS. OUT9 =1 sets the output ...
TL072
... Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use o ...
... Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use o ...
Laser distance measurement with TDC`s
... In practice, especially in the field, the laser pulse will find several reflection planes. The detector will output a series of pulses in any time distance. ...
... In practice, especially in the field, the laser pulse will find several reflection planes. The detector will output a series of pulses in any time distance. ...
Digital Technology - Atlanta International School Moodle
... Example: Calculate the standard depth of a CD pit. A laser with a wavelength of 780 nm is used along with a ...
... Example: Calculate the standard depth of a CD pit. A laser with a wavelength of 780 nm is used along with a ...
TLC372-EP 数据资料 dataSheet 下载
... Standard ESD-protection circuits safely shunt the ESD current by providing a mechanism whereby one or more transistors break down at voltages higher than the normal operating voltages but lower than the breakdown voltage of the input gate. This type of protection scheme is limited by leakage current ...
... Standard ESD-protection circuits safely shunt the ESD current by providing a mechanism whereby one or more transistors break down at voltages higher than the normal operating voltages but lower than the breakdown voltage of the input gate. This type of protection scheme is limited by leakage current ...
Subiecte de examen la CEF din sesiunile anterioare
... T1. 1.5p. What is the circuit for the NAND CMOS gate? Describe the operation of the circuit by means of the truth table and the states of all transistors (on or off). T2. 1.5p. The operational amplifier: symbol; terminals; operation equation; properties of the ideal op amp. E1. Assume OA – ideal, ra ...
... T1. 1.5p. What is the circuit for the NAND CMOS gate? Describe the operation of the circuit by means of the truth table and the states of all transistors (on or off). T2. 1.5p. The operational amplifier: symbol; terminals; operation equation; properties of the ideal op amp. E1. Assume OA – ideal, ra ...
SN75LVDS32 数据资料 dataSheet 下载
... feature uses an AND gate with input voltage thresholds at about 2.3 V to detect this condition and force the output to a high level, regardless of the differential input voltage. VCC ...
... feature uses an AND gate with input voltage thresholds at about 2.3 V to detect this condition and force the output to a high level, regardless of the differential input voltage. VCC ...
Resonance measurement of periodically driven contact potential
... Results from the measurement are presented in FIG. 10. From this figure it is seen that transfer function is linear for input voltages above 100 µV and has small deviations from the linearity for voltages below 100 µV. The nonlinearity in the transfer function at small input signal levels is mainly ...
... Results from the measurement are presented in FIG. 10. From this figure it is seen that transfer function is linear for input voltages above 100 µV and has small deviations from the linearity for voltages below 100 µV. The nonlinearity in the transfer function at small input signal levels is mainly ...
AD9762 数据手册DataSheet 下载
... based on resolution (8 to 14 bits), performance and cost. 2. Manufactured on a CMOS process, the AD9762 uses a proprietary switching technique that enhances dynamic performance beyond what was previously attainable by higher power/cost bipolar or BiCMOS devices. 3. On-chip, edge-triggered input CMOS ...
... based on resolution (8 to 14 bits), performance and cost. 2. Manufactured on a CMOS process, the AD9762 uses a proprietary switching technique that enhances dynamic performance beyond what was previously attainable by higher power/cost bipolar or BiCMOS devices. 3. On-chip, edge-triggered input CMOS ...
ADS5423 数据资料 dataSheet 下载
... The sample-to-sample variation in aperture delay. Clock Pulse Width/Duty Cycle The duty cycle of a clock signal is the ratio of the time the clock signal remains at a logic high (clock pulse width) to the period of the clock signal. Duty cycle is typically expressed as a percentage. A perfect differ ...
... The sample-to-sample variation in aperture delay. Clock Pulse Width/Duty Cycle The duty cycle of a clock signal is the ratio of the time the clock signal remains at a logic high (clock pulse width) to the period of the clock signal. Duty cycle is typically expressed as a percentage. A perfect differ ...
Chapter 3: Data Converter Architectures
... The Kelvin Divider (String DAC) The simplest DAC structure of all, after the changeover switch mentioned above, is the Kelvin divider or string DAC as shown in Figure 3.4. An N-bit version of this DAC simply consists of 2N equal resistors in series and 2N switches (usually CMOS), one between each no ...
... The Kelvin Divider (String DAC) The simplest DAC structure of all, after the changeover switch mentioned above, is the Kelvin divider or string DAC as shown in Figure 3.4. An N-bit version of this DAC simply consists of 2N equal resistors in series and 2N switches (usually CMOS), one between each no ...
Analog-to-digital converter
An analog-to-digital converter (ADC, A/D, or A to D) is a device that converts a continuous physical quantity (usually voltage) to a digital number that represents the quantity's amplitude.The conversion involves quantization of the input, so it necessarily introduces a small amount of error. Furthermore, instead of continuously performing the conversion, an ADC does the conversion periodically, sampling the input. The result is a sequence of digital values that have been converted from a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-amplitude digital signal.An ADC is defined by its bandwidth (the range of frequencies it can measure) and its signal to noise ratio (how accurately it can measure a signal relative to the noise it introduces). The actual bandwidth of an ADC is characterized primarily by its sampling rate, and to a lesser extent by how it handles errors such as aliasing. The dynamic range of an ADC is influenced by many factors, including the resolution (the number of output levels it can quantize a signal to), linearity and accuracy (how well the quantization levels match the true analog signal) and jitter (small timing errors that introduce additional noise). The dynamic range of an ADC is often summarized in terms of its effective number of bits (ENOB), the number of bits of each measure it returns that are on average not noise. An ideal ADC has an ENOB equal to its resolution. ADCs are chosen to match the bandwidth and required signal to noise ratio of the signal to be quantized. If an ADC operates at a sampling rate greater than twice the bandwidth of the signal, then perfect reconstruction is possible given an ideal ADC and neglecting quantization error. The presence of quantization error limits the dynamic range of even an ideal ADC, however, if the dynamic range of the ADC exceeds that of the input signal, its effects may be neglected resulting in an essentially perfect digital representation of the input signal.An ADC may also provide an isolated measurement such as an electronic device that converts an input analog voltage or current to a digital number proportional to the magnitude of the voltage or current. However, some non-electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. The digital output may use different coding schemes. Typically the digital output will be a two's complement binary number that is proportional to the input, but there are other possibilities. An encoder, for example, might output a Gray code.The inverse operation is performed by a digital-to-analog converter (DAC).