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oscillators
oscillators

... • The circuit consists of an inductive coil, L and a capacitor, C. The capacitor stores energy in the form of an electrostatic field and which produces a potential (static voltage) across its plates, while the inductive coil stores its energy in the form of an electromagnetic field. The capacitor is ...
Chapter 14
Chapter 14

... The Logarithmic Amplifier When a diode is placed in the feedback path of an inverting op-amp, the output voltage is proportional to the log of the input voltage. The gain decreases with increasing input voltage; therefore the amplifier is said to compress signals. Many sensors, particularly photosen ...
Dual, Low-Power, High-Speed, Fixed
Dual, Low-Power, High-Speed, Fixed

... PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. ...
VCA810 数据资料 dataSheet 下载
VCA810 数据资料 dataSheet 下载

... Operating from ±5V supplies, the gain control voltage for the VCA810 will adjust the gain from –40dB at 0V input to +40dB at –2V input. Increasing the control voltage above ground will attenuate the signal path to greater than 80dB. Signal bandwidth and slew rate remain constant over the entire gain ...
Evaluates:  MAX17005B MAX17005B Evaluation Kit General Description Features
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... between the BATT+ and BATT- terminals when the following conditions are met: 1) ADAPTER > (BATT+) + 420mV (300mV falling hysteresis). 2) SYS_LOAD current is less than the input-current limit. 3) Jumper JU3 is not installed and a DC analog voltage > 26mV or a PWM signal is present at the ISET test po ...
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as a PDF

IDT54/74FCT245T/AT/CT - Integrated Device Technology
IDT54/74FCT245T/AT/CT - Integrated Device Technology

MAX3693 +3.3V, 622Mbps, SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs
MAX3693 +3.3V, 622Mbps, SDH/SONET 4:1 Serializer with Clock Synthesis and LVDS Inputs

... MAX3693 on the rising transition of the parallel-clockinput signal (PCLKI). The control and timing logic ensure proper operation if the parallel-input register is latched within a window of time that is defined with respect to the parallel-clock-output signal (PCLKO). PCLKO is the synthesized 622Mbp ...
NLAS7222B, NLAS7222C High-Speed USB 2.0 (480 Mbps) DPDT Switches
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... ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any partic ...
ELEC 360: Signals and Systems - Department of Engineering and
ELEC 360: Signals and Systems - Department of Engineering and

... • Any periodic signal x(t) with fundamental frequency 0 can be represented by a linear sum of the basis functions {1, cos(0t), cos(20t),…, cos(n0t), sin(0t), sin(20t),…, sin(n0t)} ...
BDTIC www.BDTIC.com/infineon ® Datasheet,Version 2.1, August 30, 2011
BDTIC www.BDTIC.com/infineon ® Datasheet,Version 2.1, August 30, 2011

... In ICE2QR4765Z, a startup cell is integrated into the CoolMOS®. As shown in Figure 2, the start cell consists of a high voltage device and a controller, whereby the high voltage device is controlled by the controller. The startup cell provides a pre-charging of the VCC capacitor till VCC voltage rea ...
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... power operation, this new architecture provides many of the advantages of a more ideal CFB amplifier. The closed-loop input stage buffer gives a very low and linearized impedance path at the inverting input to sense the feedback error current. This improved inverting input impedance gives exceptiona ...
Figure 12 - Octopart
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... the PWM comparator. In this way, the error voltage magnitude is converted to a pulse width which is the duty cycle. Finally, the PWM output is fed into the gate drive circuit to control the on-time of the high-side MOSFET. Overcurrent Limiting Overcurrent limiting is implemented by sensing the drain ...
Safety Board Hardware Description Document (HDD)
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... Horizon Stop, and spare1. Notice XLXI_54 and XLXI_55. These D flip-flops load D into Q on a low to high transition. It takes two clock cycles from when a fault appears (“1”) on the input of XLXI_54 to change the output of XLXI_51. The output of XLXI_51 latches all fault inputs and is the final fault ...
BDTIC www.BDTIC.com/infineon I C E 2 Q R x x 6 5 /... P o w e r M a n a g...
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MAX1044/ICL7660 - Switched-Capacitor Voltage Converters
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AD5680 数据手册DataSheet 下载
AD5680 数据手册DataSheet 下载

... DC Power Supply Rejection Ratio (PSRR) This indicates how the output of the DAC is affected by changes in the supply voltage. PSRR is the ratio of the change in VOUT to a change in VDD for full-scale output of the DAC. It is measured in dB. VREF is held at 2 V, and VDD is varied by ±10%. ...
Measurement quality estimation of proton-precession magnetometers A. Y. Denisov
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... Nuclear precession frequency is directly proportional to the magnitude of a measured field by means of gyromagnetic ratio, thus providing the measurements precision. Due to high sensitivity, the geomagnetic equipment accuracy strongly depends on service conditions, such as intrinsic noise, external ...
Operating Instructions Switch Mode Power Supply AC 2000 / DC 2000
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... packing slip. Subsequent claims cannot be considered. AEG will rescind all obligations such as warranty agreements, service contracts etc. entered into by AEG or its representatives without notice in the event of maintenance and repairs being carried out with anything other than original AEG parts o ...
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TPS40090-Q1 数据资料 dataSheet 下载
TPS40090-Q1 数据资料 dataSheet 下载

... The TPS40090 is a two-, three-, or four-phase programmable synchronous buck controller that is optimized for low-voltage, high-current applications powered by a 5-V to 15-V distributed supply. A multi-phase converter offers several advantages over a single power stage including lower current ripple ...
TAS5111A 数据资料 dataSheet 下载
TAS5111A 数据资料 dataSheet 下载

... NOTE: PVDD should not be powered up before GVDD. ...
Phase Jitter Application Note
Phase Jitter Application Note

... 1 – The peak values of the signal vary in time. This is amplitude modulation noise (AM). 2 – The point the signal crosses a reference voltage varies from its ideal location. This is phase modulation noise (PM) or frequency modulation noise (FM), and is the attribute that characterizes the short-term ...
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Analog-to-digital converter



An analog-to-digital converter (ADC, A/D, or A to D) is a device that converts a continuous physical quantity (usually voltage) to a digital number that represents the quantity's amplitude.The conversion involves quantization of the input, so it necessarily introduces a small amount of error. Furthermore, instead of continuously performing the conversion, an ADC does the conversion periodically, sampling the input. The result is a sequence of digital values that have been converted from a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-amplitude digital signal.An ADC is defined by its bandwidth (the range of frequencies it can measure) and its signal to noise ratio (how accurately it can measure a signal relative to the noise it introduces). The actual bandwidth of an ADC is characterized primarily by its sampling rate, and to a lesser extent by how it handles errors such as aliasing. The dynamic range of an ADC is influenced by many factors, including the resolution (the number of output levels it can quantize a signal to), linearity and accuracy (how well the quantization levels match the true analog signal) and jitter (small timing errors that introduce additional noise). The dynamic range of an ADC is often summarized in terms of its effective number of bits (ENOB), the number of bits of each measure it returns that are on average not noise. An ideal ADC has an ENOB equal to its resolution. ADCs are chosen to match the bandwidth and required signal to noise ratio of the signal to be quantized. If an ADC operates at a sampling rate greater than twice the bandwidth of the signal, then perfect reconstruction is possible given an ideal ADC and neglecting quantization error. The presence of quantization error limits the dynamic range of even an ideal ADC, however, if the dynamic range of the ADC exceeds that of the input signal, its effects may be neglected resulting in an essentially perfect digital representation of the input signal.An ADC may also provide an isolated measurement such as an electronic device that converts an input analog voltage or current to a digital number proportional to the magnitude of the voltage or current. However, some non-electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. The digital output may use different coding schemes. Typically the digital output will be a two's complement binary number that is proportional to the input, but there are other possibilities. An encoder, for example, might output a Gray code.The inverse operation is performed by a digital-to-analog converter (DAC).
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