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To All Customers Notification of selling digital input and output units
To All Customers Notification of selling digital input and output units

PBL 38582 Telephone Line interface circuit for DECT, DAM, CT
PBL 38582 Telephone Line interface circuit for DECT, DAM, CT

MAX187/MAX189 +5V, Low-Power, 12-Bit Serial ADCs General Description Features
MAX187/MAX189 +5V, Low-Power, 12-Bit Serial ADCs General Description Features

... stringent than those for a successive-approximation ADC without a T/H. The typical input capacitance is 16pF. The amplifier bandwidth should be sufficient to handle the frequency of the input signal. The MAX400 and OP07 work well at lower frequencies. For higher-frequency operation, the MAX427 and O ...
Chapter 14 Feedback and Oscillator Circuits
Chapter 14 Feedback and Oscillator Circuits

asynchronous analog-discrete converter using an analog signal
asynchronous analog-discrete converter using an analog signal

... are involved, the interface becomes much more complex, being then necessary a way of transforming eletronically the signals from the analog form for the digital one. For this the analog-digital converters (CAD) and the digital-analog converters (DAC) are used. All these architectures possess their a ...
VOLTAGE LEVEL TRANSLATION (SL) - Family
VOLTAGE LEVEL TRANSLATION (SL) - Family

... and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critic ...
http://nvlpubs.nist.gov/nistpubs/jres/112/6/V112.N06.A01.pdf
http://nvlpubs.nist.gov/nistpubs/jres/112/6/V112.N06.A01.pdf

BD9302FP
BD9302FP

... 0.01 μF or less may cause overshoot to the output voltage. If any startup-related function (sequence) of other power supply is provided, use a high-accuracy product (e.g. ¥ 5R) or the like. Furthermore, since the soft start time varies with the input voltage, output voltage, load, coil, output capac ...
ADS5410 数据资料 dataSheet 下载
ADS5410 数据资料 dataSheet 下载

... selected depending on the application. Rin and Cin can be placed to isolate the source from the switching inputs of the ADC and to implement a low pass RC filter to limit the input noise in the ADC. Although not needed, it is recommended to lay out the circuit with placement for those 3 components, ...
ADF5355 - Analog Devices
ADF5355 - Analog Devices

Wording for TIA-1083
Wording for TIA-1083

... 10. If any of the above results do not meet the requirements of clause Error! Reference source not found., change the volume control setting, or move the probe to another location within the measurement area specified in step 3, or both, and repeat steps 4 through 8 above until all of the requiremen ...
Offset Error
Offset Error

... CONVERSION TIME - is the time required for a complete measurement by an analog-to-digital converter. Since the Conversion Time does not include acquisition time, multiplexer set up time, or other elements of a complete conversion cycle, the conversion time may be less than the Throughput Time. Numbe ...
AN14 - Designs for High Performance Voltage-to-Frequency Converters
AN14 - Designs for High Performance Voltage-to-Frequency Converters

... input steps. Instead, the charge is fed back directly to the oscillator, which can respond immediately. Although this approach permits fast response, it also requires attention to parasitics to achieve high linearity and low drift. ...
convolutionguide
convolutionguide

Instrumentation: 206 L
Instrumentation: 206 L

ÿþw w w . d a t a s h e e t 4 u . c o m
ÿþw w w . d a t a s h e e t 4 u . c o m

C. Wavelength
C. Wavelength

... • Instead of varying amplitude, if we vary the frequency in step with the information waveform – FM is produced. • FM signals are much more resistant to the effects of noise but require more bandwidth. • FM bandwidth (for voice) is between 5 and 15 kHz. ...
3. The time-frequency characteristic analysis of VFTO simulation
3. The time-frequency characteristic analysis of VFTO simulation

Modeling and Control of a Magnetic Levitation System
Modeling and Control of a Magnetic Levitation System

LMK00105 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator
LMK00105 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator

... Refer to application note AN-912 Common Data Transmission Parameters and their Definitions for more information. When using differential signals with VCM outside of the acceptable range for the specified VID, the clock must be AC coupled. The ESR requirements stated are what is necessary in order to ...
74LS151 - ECE Labs
74LS151 - ECE Labs

... the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters ...
[PDF]
[PDF]

Experiment 9: Driven RLC Circuits
Experiment 9: Driven RLC Circuits

... When we put these elements together we will see that at low frequencies the capacitor will “dominate” (it fills up limiting the current) and current will lead whereas at high frequencies the inductor will dominate (it fights the rapid changes) and current will lag. At resonance the frequency is such ...
4.2.3 – Resonant Filters
4.2.3 – Resonant Filters

... It will probably not come as a surprise to you that the inductor also behaves differently in an a.c. circuit compared to a d.c. one, again to signify its use in an a.c. circuit we call it’s ‘resistance’ to the flow of current reactance. The reactance of an inductor is given by the formula X L  2fL ...
Analog Applications Journal
Analog Applications Journal

... Introduction to phase-locked loop system modeling . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Phase-locked loops (PLLs) are one of the basic building blocks in modern electronic systems. They have been widely used in communications, multimedia and many other applications. Starting from a ...
< 1 ... 137 138 139 140 141 142 143 144 145 ... 241 >

Phase-locked loop

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal. The phase detector compares the phase of that signal with the phase of the input periodic signal and adjusts the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is ""fed back"" toward the input forming a loop.Keeping the input and output phase in lock step also implies keeping the input and output frequencies the same. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. These properties are used for computer clock synchronization, demodulation, and frequency synthesis.Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.
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