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ICS674-01 - Integrated Device Technology
ICS674-01 - Integrated Device Technology

... "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or ot ...
A 10Gb/s wide-band current-mode logic I/O interface for high
A 10Gb/s wide-band current-mode logic I/O interface for high

... pull-up resistors in order to get larger voltage gain. To achieve the required higher bandwidth, current-mode logic gain stage also incorporates active feedback and negative Miller capacitance as shown in Fig. 9. As mentioned earlier, the differential pair M5, M6 and current buffers M3, M4 provide a ...
0.37, 0.75Kw - Omni Ray AG
0.37, 0.75Kw - Omni Ray AG

... speed is decelerated in the time period set by the DECEL dial. When the frequency falls below 3Hz, the DC dynamic brake will be activated and the motor will stop immediately. If the motor speed does not decelerate smoothly and the ALARM lamp blinks during the deceleration or the “ALARM” indication l ...
MAX12555 14-Bit, 95Msps, 3.3V ADC General Description Features
MAX12555 14-Bit, 95Msps, 3.3V ADC General Description Features

... converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts singleended or differential signals. The MAX12555 is optimized for high dynamic performance, low power, and small size. Excellent dynam ...
Using Clock Jitter Analysis to Reduce BER in Serial Data Applications
Using Clock Jitter Analysis to Reduce BER in Serial Data Applications

... Jitter propagation on serial signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 The Role of Reference Clocks in Serial Data Applications . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Effect of clock jitter on data jitter from the transmitter . ...
AN051: Principles and Applications of the ICL7660 CMOS Voltage
AN051: Principles and Applications of the ICL7660 CMOS Voltage

... since the sources and drains are inverted on each device during pump and charge phases. Consider Q3's operation, for example. During the charge phase, the most positive source/drain terminal is connected to the external chargepump capacitor. This terminal is then, by definition, the drain, whereas t ...
General Description Features
General Description Features

... track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts singleended or differential signals. The MAX12553 is optimized for low-power, small size, and high dynamic performance. Excellent dynamic performance is maintained from baseband to input freq ...
MAX3645 +2.97V to +5.5V, 125Mbps to 200Mbps Limiting Amplifier with Loss-of-Signal Detector
MAX3645 +2.97V to +5.5V, 125Mbps to 200Mbps Limiting Amplifier with Loss-of-Signal Detector

... MC2045-2 and MC2045-2Y postamplifiers. The amplifier accepts a wide range of input voltages and provides constant-level positive emitter-coupled logic (PECL) output voltages with controlled edge speeds. The MAX3645 features an integrated power detector with complementary PECL loss-of-signal (LOS) ou ...
BDTIC www.BDTIC.com/infineon Technical Report TR102 RF and Protection Devices
BDTIC www.BDTIC.com/infineon Technical Report TR102 RF and Protection Devices

... types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure ...
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... FIGURE 2. OUTPUT SOURCE RESISTANCE AS A FUNCTION OF SUPPLY VOLTAGE ...
LTC1151 - Dual ±15V Zero-Drift Operational Amplifier
LTC1151 - Dual ±15V Zero-Drift Operational Amplifier

... LTC1151 proper care must be exercised. Leakage currents in circuitry external to the amplifier can significantly degrade performance. High quality insulation should be used (e.g., Teflon); cleaning of all insulating surfaces to remove fluxes and other residues will probably be necessary, particularl ...
Question Bank
Question Bank

SY89207L Mar04
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... ideal for feedback applications common in crystal oscillator gain blocks. The SY89207L is fully differential, with a bandwidth > 800MHz over temperature and voltage. For applications that require output disable control, a LVPECL/LVECL/CMOS compatible enable pin (EN) will force the differential outpu ...
ADS7862 数据资料 dataSheet 下载
ADS7862 数据资料 dataSheet 下载

A 26 GHz Phase-Locked Loop Frequency Multiplier in 0.18-µm CMOS
A 26 GHz Phase-Locked Loop Frequency Multiplier in 0.18-µm CMOS

... This thesis presents the analysis, design and characterization of an integrated highfrequency phase-locked loop (PLL) frequency multiplier. The frequency multiplier is novel in its use of a low multiplication factor of 4 and a fully differential topology for rejection of common mode interference sig ...
CS244- Introduction to embedded systems and ubiquitous
CS244- Introduction to embedded systems and ubiquitous

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v - Texas Instruments
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... The INA157 is a high slew rate, G = 1/2 or G = 2 difference amplifier consisting of a precision op amp with a precision resistor network. The on-chip resistors are laser trimmed for accurate gain and high common-mode rejection. Excellent TCR tracking of the resistors maintains gain accuracy and comm ...
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AD8285 - Analog Devices

P3Z22V10 3V zero power, TotalCMOS™, universal PLD device
P3Z22V10 3V zero power, TotalCMOS™, universal PLD device

Xilinx XCR22LV10: 3V Zero Power, TotalCMOS, Universal PLD
Xilinx XCR22LV10: 3V Zero Power, TotalCMOS, Universal PLD

... four different configurations. The programmable macrocells allow each I/O to create sequential or combinatorial logic functions with either active High or active Low polarity. ...
Features Description Functional Description XCR22LV10: 3V Zero
Features Description Functional Description XCR22LV10: 3V Zero

A Frequency Compensation Scheme for LDO Voltage Regulators
A Frequency Compensation Scheme for LDO Voltage Regulators

AD7170 数据手册DataSheet下载
AD7170 数据手册DataSheet下载

... input. The serial clock can be continuous with all data transmitted in a constant train of pulses. Alternatively, it can be a noncontinuous clock with the information being transmitted from the ADC in smaller batches of data. Serial Data Output/Data Ready Output. DOUT/RDY serves a dual purpose. DOUT ...
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Phase-locked loop

A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. While there are several differing types, it is easy to initially visualize as an electronic circuit consisting of a variable frequency oscillator and a phase detector. The oscillator generates a periodic signal. The phase detector compares the phase of that signal with the phase of the input periodic signal and adjusts the oscillator to keep the phases matched. Bringing the output signal back toward the input signal for comparison is called a feedback loop since the output is ""fed back"" toward the input forming a loop.Keeping the input and output phase in lock step also implies keeping the input and output frequencies the same. Consequently, in addition to synchronizing signals, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. These properties are used for computer clock synchronization, demodulation, and frequency synthesis.Phase-locked loops are widely employed in radio, telecommunications, computers and other electronic applications. They can be used to demodulate a signal, recover a signal from a noisy communication channel, generate a stable frequency at multiples of an input frequency (frequency synthesis), or distribute precisely timed clock pulses in digital logic circuits such as microprocessors. Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a hertz up to many gigahertz.
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