Application Note AN-47 TOPSwitch-JX Family
... losses, losses associated with the primary side clamp circuit and the bias winding. For designs that do not have a peak power requirement, a value of 0.5 is recommended. For designs with a peak power requirement, enter 0.65. This difference accounts for increased input stage losses under peak power ...
... losses, losses associated with the primary side clamp circuit and the bias winding. For designs that do not have a peak power requirement, a value of 0.5 is recommended. For designs with a peak power requirement, enter 0.65. This difference accounts for increased input stage losses under peak power ...
pspice - MavDISK
... Figure 10: Using Voltage Markers to show the simulation result of V(out) and V(in) 3. Go to back to PSpice. You will notice that the waveforms will appear. 4. You can add a second Y Axis and use this to display e.g. the current in Resistor R2, as shown below. Go to PLOT/Add Y Axis. Next, add the tra ...
... Figure 10: Using Voltage Markers to show the simulation result of V(out) and V(in) 3. Go to back to PSpice. You will notice that the waveforms will appear. 4. You can add a second Y Axis and use this to display e.g. the current in Resistor R2, as shown below. Go to PLOT/Add Y Axis. Next, add the tra ...
EPC9107 QSG.indd - Efficient Power Conversion
... 6. Once operational, adjust the bus voltage and load current within the allowed operating range and observe the output switching behavior, efficiency and other parameters. 7. For shutdown, please follow steps in reverse. NOTE. When measuring the high frequency content switch node of gate voltage, ...
... 6. Once operational, adjust the bus voltage and load current within the allowed operating range and observe the output switching behavior, efficiency and other parameters. 7. For shutdown, please follow steps in reverse. NOTE. When measuring the high frequency content switch node of gate voltage, ...
pspice - Penn Engineering - University of Pennsylvania
... Figure 10: Using Voltage Markers to show the simulation result of V(out) and V(in) 3. Go to back to PSpice. You will notice that the waveforms will appear. 4. You can add a second Y Axis and use this to display e.g. the current in Resistor R2, as shown below. Go to PLOT/Add Y Axis. Next, add the tra ...
... Figure 10: Using Voltage Markers to show the simulation result of V(out) and V(in) 3. Go to back to PSpice. You will notice that the waveforms will appear. 4. You can add a second Y Axis and use this to display e.g. the current in Resistor R2, as shown below. Go to PLOT/Add Y Axis. Next, add the tra ...
SP4082E 数据资料DataSheet下载
... up to ±15kV (Human Body Model). Drivers are protected from excess current flow caused by bus contention or output short-circuits by both an internal current limit and a thermal-overload shutdown. Devices are rated for industrial (-40 to +85ºC) operating temperatures. Receivers have exceptionally hig ...
... up to ±15kV (Human Body Model). Drivers are protected from excess current flow caused by bus contention or output short-circuits by both an internal current limit and a thermal-overload shutdown. Devices are rated for industrial (-40 to +85ºC) operating temperatures. Receivers have exceptionally hig ...
Document
... • Buffer or Voltage Follower No voltage difference between the output and the input Draws no current, so it puts no load on the source Used to isolate sources from loads 23 May 2017 ...
... • Buffer or Voltage Follower No voltage difference between the output and the input Draws no current, so it puts no load on the source Used to isolate sources from loads 23 May 2017 ...
PSPICE University of Pennsylvania Department of Electrical and Systems Engineering
... Figure 10: Using Voltage Markers to show the simulation result of V(out) and V(in) 3. Go to back to PSpice. You will notice that the waveforms will appear. 4. You can add a second Y Axis and use this to display e.g. the current in Resistor R2, as shown below. Go to PLOT/Add Y Axis. Next, add the tra ...
... Figure 10: Using Voltage Markers to show the simulation result of V(out) and V(in) 3. Go to back to PSpice. You will notice that the waveforms will appear. 4. You can add a second Y Axis and use this to display e.g. the current in Resistor R2, as shown below. Go to PLOT/Add Y Axis. Next, add the tra ...
AMEM_314_Labs_Strain Gauges
... Strain gauges are devices designed and constructed so that their resistance changes when they are strained: that is their physical dimensions increase or decrease. This is usually arranged to happen when the body to which they are bonded (stuck) changes and so the strain gauges resistance may be use ...
... Strain gauges are devices designed and constructed so that their resistance changes when they are strained: that is their physical dimensions increase or decrease. This is usually arranged to happen when the body to which they are bonded (stuck) changes and so the strain gauges resistance may be use ...
375V Input Micro Family
... Figure 1 — Basic module operation requires fusing, grounding, bypassing capacitors.* See Maxi, Mini, Micro Design Guide. Output Connections and Considerations The permissible load current must never be exceeded during normal, abnormal or test conditions. Converters subject to dynamic loading exceedi ...
... Figure 1 — Basic module operation requires fusing, grounding, bypassing capacitors.* See Maxi, Mini, Micro Design Guide. Output Connections and Considerations The permissible load current must never be exceeded during normal, abnormal or test conditions. Converters subject to dynamic loading exceedi ...
SIDACtor Capacitance Effects
... The SIDACtor device started manufacture with an N- slice of silicon. Layers of P material are then created at the top and the bottom. A further N+ region is then made on the top surface. Finally the top and the bottom metallization are added to provide contacts. Transistor TR1 is formed by the N+PN- ...
... The SIDACtor device started manufacture with an N- slice of silicon. Layers of P material are then created at the top and the bottom. A further N+ region is then made on the top surface. Finally the top and the bottom metallization are added to provide contacts. Transistor TR1 is formed by the N+PN- ...
Sensing Elements for Current Measurements
... Connecting Sense Traces to the Current Sense Resistor Ideally, a four terminal current sense resistor would be used as the sensing element. Four terminal sensor resistors can be hard to find for specific values and sizes. Often a two terminal sense resistor is designed into the application. Sense li ...
... Connecting Sense Traces to the Current Sense Resistor Ideally, a four terminal current sense resistor would be used as the sensing element. Four terminal sensor resistors can be hard to find for specific values and sizes. Often a two terminal sense resistor is designed into the application. Sense li ...
Rd50_ATLAS07 - Indico
... • After irradiation, Zone 3 detectors (Gap = 70 mm) have a similar punchthrough voltage as Zone 4 detectors, which are made with a specific punchthrough protection structure (Gap = 30 mm) . Needs explanation! • The acceptable punch-through voltage of the Zone 3 sensors with p-stops of 4*1012 cm-2 ex ...
... • After irradiation, Zone 3 detectors (Gap = 70 mm) have a similar punchthrough voltage as Zone 4 detectors, which are made with a specific punchthrough protection structure (Gap = 30 mm) . Needs explanation! • The acceptable punch-through voltage of the Zone 3 sensors with p-stops of 4*1012 cm-2 ex ...
TPS65011 数据资料 dataSheet 下载
... enter a low power mode at light load for maximum efficiency across the widest possible range of load currents. The LOW_PWR pin allows the core converter to lower its output voltage when the application processor goes into deep sleep. The TPS65011 also integrates two 200-mA LDO voltage regulators, wh ...
... enter a low power mode at light load for maximum efficiency across the widest possible range of load currents. The LOW_PWR pin allows the core converter to lower its output voltage when the application processor goes into deep sleep. The TPS65011 also integrates two 200-mA LDO voltage regulators, wh ...
LT6700/LT6700HV - Micropower, Low Voltage, Dual Comparator with 400mV Reference
... voltage comparators with a 400mV reference in a 6-lead SOT-23 or tiny DFN package. Operating with supplies from 1.4V up to 18V, these devices draw only 6.5µA, making them ideal for low voltage system monitoring. Hysteresis is included in the comparators, easing design requirements to insure stable o ...
... voltage comparators with a 400mV reference in a 6-lead SOT-23 or tiny DFN package. Operating with supplies from 1.4V up to 18V, these devices draw only 6.5µA, making them ideal for low voltage system monitoring. Hysteresis is included in the comparators, easing design requirements to insure stable o ...
MAX3221/MAX3223/MAX3243 1µA Supply-Current, True +3V to +5.5V RS-232 Transceivers with AutoShutdown _______________General Description
... levels on all receiver inputs for 30µs, the on-board power supply and drivers are shut off, reducing supply current to 1µA. This occurs if the RS-232 cable is disconnected or the connected peripheral transmitters are turned off. The system turns on again when a valid level is applied to any RS-232 r ...
... levels on all receiver inputs for 30µs, the on-board power supply and drivers are shut off, reducing supply current to 1µA. This occurs if the RS-232 cable is disconnected or the connected peripheral transmitters are turned off. The system turns on again when a valid level is applied to any RS-232 r ...
UM0399
... mains 110 V / 60 Hz the designer can refer to Table 1. These TRIACs are snubberless, so they do not need any other external snubber circuit as protection. The current flowing through the TRIAC increases its temperature. When the current is too high, it is necessary to use a heat sink. We explain bel ...
... mains 110 V / 60 Hz the designer can refer to Table 1. These TRIACs are snubberless, so they do not need any other external snubber circuit as protection. The current flowing through the TRIAC increases its temperature. When the current is too high, it is necessary to use a heat sink. We explain bel ...
HMC728LC3C 数据资料DataSheet下载
... 5. PACKAGE WARP SHALL NOT EXCEED 0.05 mm DATUM -C6. ALL GROUND LEADS MUST BE SOLDERED TO PCB RF GROUND. 7. PADDLE MUST BE SOLDERED TO GND. ...
... 5. PACKAGE WARP SHALL NOT EXCEED 0.05 mm DATUM -C6. ALL GROUND LEADS MUST BE SOLDERED TO PCB RF GROUND. 7. PADDLE MUST BE SOLDERED TO GND. ...
PBSS9110Z 1. Product profile 100 V, 1 A PNP low V
... therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use ...
... therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use ...