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Wiley Publishing - CCNA For Dummies [2000].
Wiley Publishing - CCNA For Dummies [2000].

Chapter 5 - Ethernet
Chapter 5 - Ethernet

... The two commonly used methods are: CSMA/Collision Detection • The device monitors the media for the presence of a data signal • If a data signal is absent, indicating that the media is free, the device transmits the data • If signals are then detected that show another device was transmitting at the ...
12-Bit Input-Buffered 80 MSPS ADC with JESD204A Output Interface
12-Bit Input-Buffered 80 MSPS ADC with JESD204A Output Interface

... The ADS61JB23 is a high-performance, low-power, single channel analog-to-digital converter with an integrated JESD204A output interface. Available in a 6 mm x 6 mm QFN package, with both single-lane and dual-lane output modes, the ADS61JB23 offers an unprecedented level of compactness. The output in ...
Computer Networking : Principles, Protocols and Practice
Computer Networking : Principles, Protocols and Practice

... interface and there is one physical link between each host and the center of the star. The node at the center of the star can be either a piece of equipment that amplifies an electrical signal, or an active device, such as a piece 2 In this book, we focus on networks that are used on Earth. These ne ...
SKY65344-21 数据资料DataSheet下载
SKY65344-21 数据资料DataSheet下载

... 2500 MHz high-efficiency transmit path and a low-loss bidirectional path. The bidirectional path can be used to directly connect the antenna port to a directional RF port. ...
8-Bit Micro Power OCTAL Digital-to-Analog Converter with Rail
8-Bit Micro Power OCTAL Digital-to-Analog Converter with Rail

... providing the widest possible output dynamic range. The DAC088S085 has a 16-bit input shift register that controls the mode of operation, the power-down condition, and the DAC channels' register and output value. All eight DAC outputs can be updated simultaneously or individually. A power-on reset c ...
Document
Document

74CBTLVD3244 1. General description 8-bit level-shifting bus switch with 4-bit output enables
74CBTLVD3244 1. General description 8-bit level-shifting bus switch with 4-bit output enables

... The 74CBTLVD3244 is a dual 4-pole, single-throw bus switch. The device features two output enable inputs (nOE) that each control four switch channels. The switches are disabled when the associated nOE input is HIGH. Schmitt trigger action at control inputs makes the circuit tolerant of slower input ...
AD7798 数据手册DataSheet下载
AD7798 数据手册DataSheet下载

... Serial Clock Input. This serial clock input is for data transfers to and from the ADC. The SCLK has a Schmitt-triggered input, making the interface suitable for opto-isolated applications. The serial clock can be continuous, with all data transmitted in a continuous train of pulses. Alternatively, i ...
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AD5293 - Analog Devices
AD5293 - Analog Devices

... The AD5293 is a single-channel, 1024-position digital potentiometer (in this data sheet, the terms digital potentiometer and RDAC are used interchangeably) with a <1% end-to-end resistor tolerance error. The AD5293 performs the same electronic adjustment function as a mechanical potentiometer with e ...
Wires - Massachusetts Institute of Technology
Wires - Massachusetts Institute of Technology

... – make wires wider, increase in C is less than increase in C because of fringing fields – use parallel vias at contacts – floorplanning to keep wires short – careful routing to avoid unnecessary layer changes (vias) ...
Wires
Wires

... resistance of 3 kΩ, driving FO4 load (25fF) ...
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... (RTL) Design Slides to accompany the textbook Digital Design, First Edition, by Frank Vahid, John Wiley and Sons Publishers, 2007. ...
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92 1. PURPOSE The purpose of this experiment is to show

... WARNING: An ammeter must never be placed across a voltage source; it must only be used in series with a load that does not draw more than the full scale current. 2.3. The Ohmmeter In general, an ohmmeter is designed to measure resistance in the low, mid or high range. The mid-range of an ohmmeter is ...
Maxim MAX13487 - RS232 converter
Maxim MAX13487 - RS232 converter

... The MAX13487E/MAX13488E +5V, half-duplex, ±15kV ESD-protected RS-485/RS-422-compatible transceivers feature one driver and one receiver. The MAX13487E/ MAX13488E include a hot-swap capability to eliminate false transitions on the bus during power-up or live insertion. The MAX13487E/MAX13488E feature ...
ADF4360-9 Clock Generator PLL with Integrated VCO (Rev. C)
ADF4360-9 Clock Generator PLL with Integrated VCO (Rev. C)

... Charge Pump Ground. This is the ground return path for the charge pump. Analog Power Supply. This ranges from 3.0 V to 3.6 V. Decoupling capacitors to the analog ground plane should be placed as close as possible to this pin. AVDD must have the same value as DVDD. Analog Ground. This is the ground r ...
TMDS171 3.4 Gbps TMDS Retimer (Rev. D)
TMDS171 3.4 Gbps TMDS Retimer (Rev. D)

... Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absol ...
AN-366 Designer`s Encyclopedia of One
AN-366 Designer`s Encyclopedia of One

ADC0801/ADC0802/ADC0803/ADC0804/ADC0805 8-Bit mP Compatible A/D Converters 8-Bit m
ADC0801/ADC0802/ADC0803/ADC0804/ADC0805 8-Bit mP Compatible A/D Converters 8-Bit m

... Note 4: For VIN( b ) t VIN( a ) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input (see block diagram) which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater than the VCC supply. Be careful, during testing a ...
ADC0801 ADC0802 ADC0803 ADC0804 ADC0805 8
ADC0801 ADC0802 ADC0803 ADC0804 ADC0805 8

74CBTLVD3245 1. General description 8-bit level-shifting bus switch with output enable
74CBTLVD3245 1. General description 8-bit level-shifting bus switch with output enable

... This document contains data from the objective specification for product development. ...
The DatasheetArchive - Datasheet Search Engine
The DatasheetArchive - Datasheet Search Engine

... The following design considerations are general in nature and must be followed regardless of final use or configuration: 1. Paths to ground should be made as short as possible. 2. The ground pads of the SKY65346-11 have special electrical and thermal grounding requirements. These pads are the main t ...
JRAX/SA3: Title of Activity - Indico
JRAX/SA3: Title of Activity - Indico

... • The circuit information held by the MP/MA includes the following: – Operational status Up, Down, Degraded, Unknown – Admin status Normal operations, Maintenance, Troubleshooting, UnderRepair, Unknown Note: the GN2 project does not mandate *how* to populate the XML file (in MP) or database (in MA) ...
Suggested Specification
Suggested Specification

... the control automatically reads to allow user login. The control’s design shall include the ability to disable ports and services not required for normal or emergency operations. In cases where disabling is not possible, the port or service shall be password and access level protected through a comm ...
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UniPro protocol stack

In mobile-telephone technology, the UniPro protocol stack follows the architecture of the classical OSI Reference Model. In UniPro, the OSI Physical Layer is split into two sublayers: Layer 1 (the actual physical layer) and Layer 1.5 (the PHY Adapter layer) which abstracts from differences between alternative Layer 1 technologies. The actual physical layer is a separate specification as the various PHY options are reused in other MIPI Alliance specifications.The UniPro specification itself covers Layers 1.5, 2, 3, 4 and the DME (Device Management Entity). The Application Layer (LA) is out of scope because different uses of UniPro will require different LA protocols. The Physical Layer (L1) is covered in separate MIPI specifications in order to allow the PHY to be reused by other (less generic) protocols if needed.OSI Layers 5 (Session) and 6 (Presentation) are, where applicable, counted as part of the Application Layer.
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