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Transcript
Esc 102 Introduction to Electronics, 2004-2005/I
EXPERIMENT 8
VOLTAGE AMPLIFIERS USING OPERATIONAL AMPLIFIERS
Introduction
The operational amplifier (opamp for short) is among the most basic linear integrated circuits
frequently employed in diverse low frequency applications. Referring to Fig.1.3, the opamp has two
inputs, viz. inverting (v-), and non-inverting (v+), and one output (vo ). The input-output relationship
of an opamp is given by vo = A(v+- v-) where, the differentia1 voltage gain A is very large. For an
ideal opamp
(i) A is infinite,
(ii) the input impedance is infinite, and
(iii) the output impedance is zero, making it practically a controlled voltage source.
However, in a practical opamp, A is typically in the range of 104 to 106 over the frequencies of
interest and over different IC types. The input impedance is typically 1M ohm, while the output
impedance is within 75 ohms. So long as the output voltage vo remains within linear limits (i.e. not
saturated), many opamp circuits can be analyzed using the assumption that v+ practically equals v-.
Neither of the inputs takes any current. In this experiment, after a simple test to verify the high DC
gain of the opamp, the performance of standard opamp amplifying circuits is measured.
CAUTION
1. Familiarize yourself with the opamp IC pins. It has 4 pins on each side. There is a dot (or an
indent) just above pin 1. Connect the opamp such that its pin 1 is on your left side, as it
appears in Fig.1.2. In this position you will be able to read the IC number.
2. Be doubly sure that the +12V and –12V connections of the opamp are correct. If you
interchange these connections or connect them to other pins, the opamp will get damaged
instantly. This is the most common reason for opamp damage.
3. It is a good practice to keep the CRO and FG in ON condition. Connect the FG output to the
left side of the Breadboard and use a jumper to connect it your circuit as required. Note that
FG signals should appear at the opamp circuit input only after the opamp receives power.
1. TESTING FOR HIGH DC GAIN
The aim of this experiment is to verify that the opamp has very high DC gain as shown in Fig.1.4.
Very small voltages are applied to its input and we look for abrupt changes in the output as the input
voltages to the v+ input are varied around 0V.
Experiment
(i) Wire the circuit of Fig.2. Take extreme care to do the power supply connections carefully.
Connect the pin 6 of the opamp (vo) to CH-2 of the CRO. Choose CH-2 setting as 5V/div and
adjust the beam such that it is at the centre of CRO.
(ii) Switch ON the +12V and –12V supplies.
(iii) Vary the 10K potentiometer slowly from one extreme to the other. Verify that the opamp
output is jumping abruptly from one saturation level to the other over a very small voltage
region. (For power supply voltages of +/-12V, the opamp saturation voltages are
approximately +/-11V).
(iv) The above test verifies that the opamp has very high DC gain.
1
2.INVERTING AMPLIFIER
Experiment
R2=51K
(i). Wire the circuit of Fig.3. Choose R1=10K, and R2= 51K. Connect the FG output to the CH-1
and the opamp output to CH-2 of the CRO. Ensure that the FG output is adjusted to give
0.1 sin t (f=1 KHz).
(ii) Switch ON the +/-12V supplies. Connect the FG output to input of the amplifier as shown in
Fig.3.
(ii) Observe and sketch vi and vo waveforms.
(iii) Measure the voltage gain, Av = vo/vi.
R2=680K
(i) Disconnect the FG output from the opamp input and switch off the +/-12V supplies.
(ii) Replace the previous R2 resistor with R2=680K.
(iii) Switch ON the +/-12V supplies and then connect the FG output to the amplifier input.
(iv) Observe and sketch vi and vo waveforms.
(v) Measure the voltage gain, Av = vo/vi.
3. NON-INVERTING AMPLIFIER
Experiment
R2=51K
(i) Wire the circuit of Fig.4. Put R2=51K. Connect the FG output to the CH-1 and the opamp
output to CH-2 of the CRO. Adjust the FG to give 0.1 sin t.
(ii) Measure vo for frequencies of 1,2 5, 10, 20, 50, 100, and 500KHz. Take readings at other
frequencies, also if necessary.
(iii) Plot the voltage gain, Av, as a function of frequency on a semi-log graph sheet. Determine the
upper cut-off frequency fc from the plot.
R2=100K
(i) Repeat steps (i) to (iii) above for R2=100K.
(ii) Compare the Av and fc values obtained in the two cases. Compare the gain-bandwidth product
(Av fc) for both the cases.
4. DIFFERENCE AMPLIFIER
The aim of this part is to study the performance of a Difference amplifier by measuring its Commonmode and Differential gains. In an ideal difference amplifier, the Common-mode gain Ac is zero, thus
giving an infinite Common-mode Rejection Ratio (CMRR = Ad/Ac). However, in a practical opamp
circuit, since Ac is not zero the CMRR might be of the order of 104. The circuit of Fig.5.1 will work
as a difference amplifier when (R2/R1 = R4/R3), giving a voltage gain of R2/R1.
Measurement of Common-Mode Gain
(i) Wire the circuit of Fig.5.2. Adjust the FG output to give 10 sin t (1 KHz). Observe the output vo
on the CH-2 of the CRO.
(ii) Minimize the amplitude of vo by adjusting the 10K potentiometer. (Do this step as best as you
can. As vo decreases with the potentiometer adjustment, increase the CH-2 sensitivity and obtain
the very minimum vo).
(iii) Calculate Ac = vo/vi.
Measurement of Differential Gain
(i) Modify the circuit of Fig.5.2 to get the circuit of Fig.5.1. Adjust the FG output to give 0.5 sin t
(1 KHz). Do not tamper with the 10K potentiometer setting (i.e leave it at the same position at
which you measured the Common-mode Voltage gain). Observe the output vo on the CH-2 of the
CRO.
(ii) Calculate Ad = vo/vi.
(iii) Calculate CMRR = Ad/Ac.
2