Download NDT452AP P-Channel Enhancement Mode Field Effect Transistor June 1996

June 1996
NDT452AP
P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
Power SOT P-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance
and provide superior switching performance. These devices
are particularly suited for low voltage applications such as
notebook computer power management and DC motor
control.
-5A, -30V. RDS(ON) = 0.065Ω @ VGS = -10V
RDS(ON) = 0.1Ω @ VGS = -4.5V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
________________________________________________________________________________
D
G
Absolute Maximum Ratings
Symbol
Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current - Continuous
D
D
S
(Note 1a)
Maximum Power Dissipation
NDT452AP
Units
-30
V
±20
V
-5
A
- 15
(Note 1a)
3
(Note 1b)
1.3
(Note 1c)
TJ,TSTG
S
T A = 25°C unless otherwise noted
- Pulsed
PD
G
Operating and Storage Temperature Range
W
1.1
-65 to 150
°C
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
42
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
12
°C/W
* Order option J23Z for cropped center drain lead.
© 1997 Fairchild Semiconductor Corporation
NDT452AP Rev. B1
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
-30
Typ
Max
Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
IDSS
Zero Gate Voltage Drain Current
VDS = -24 V, VGS = 0 V
V
TJ = 55°C
-1
µA
-10
µA
IGSSF
Gate - Body Leakage, Forward
VGS = 20 V, VDS = 0 V
100
nA
IGSSR
Gate - Body Leakage, Reverse
VGS = -20 V, VDS= 0 V
-100
nA
-2.8
V
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
RDS(ON)
Static Drain-Source On-Resistance
VGS = -10 V, ID = -5.0 A
-1
TJ = 125°C
-0.7
TJ = 125°C
VGS = -4.5 V, ID = -4.3 A
ID(on)
gFS
On-State Drain Current
Forward Transconductance
VGS = -10 V, VDS = -5 V
-15
VGS = -4.5 V, VDS = -5 V
-5
-1.6
-1.2
-2.2
0.052
0.065
0.075
0.13
0.085
0.1
Ω
A
VDS = -10 V, ID = -5.0 A
7
S
VDS = -15 V, VGS = 0 V,
f = 1.0 MHz
690
pF
430
pF
160
pF
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
tD(on)
Turn - On Delay Time
tr
Turn - On Rise Time
tD(off)
Turn - Off Delay Time
tf
Turn - Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -10 V, ID = -1 A,
VGEN = -10 V, RGEN = 6 Ω
VDS = -10 V,
ID = -5.0 A, VGS = -10 V
9
20
ns
20
30
ns
40
50
ns
19
40
ns
22
30
nC
3.2
nC
5.2
nC
NDT452AP Rev. B1
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
-2.5
A
-0.85
-1.2
V
100
ns
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = -2.5 A
trr
Reverse Recovery Time
VGS = 0 V, IF = -2.5 A, dIF/dt = 100 A/µs
(Note 2)
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by
design while RθCA is determined by the user's board design.
PD (t ) =
T J−TA
R θJA(t )
=
T J−TA
R θJC+RθCA(t )
= I 2D (t ) × RDS(ON )
TJ
Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 42oC/W when mounted on a 1 in2 pad of 2oz copper.
b. 95oC/W when mounted on a 0.066 in2 pad of 2oz copper.
c. 110oC/W when mounted on a 0.0123 in2 pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDT452AP Rev. B1
Typical Electrical Characteristics
-20
3
-15
-5.0
-4.5
R DS(on), NORMALIZED
ID , DRAIN-SOURCE CURRENT (A)
-6.0
-4.0
-10
-3.5
-5
-3.0
DRAIN-SOURCE ON-RESISTANCE
VGS = -10V
0
0
-1
-2
-3
V DS , DRAIN-SOURCE VOLTAGE (V)
VGS = -3.5V
2.5
- 4.0
-4.5
2
-5.0
1.5
-6.0
-10
1
0.5
-4
0
Figure 1. On-Region Characteristics.
-20
V GS = -10V
V GS = -10V
R DS(on), NORMALIZED
1.4
1.2
1
0.8
0.6
-50
DRAIN-SOURCE ON-RESISTANCE
R DS(ON), NORMALIZED
-16
2
I D = -5.0A
1.5
TJ = 125°C
25°C
1
-55°C
0.5
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
125
150
0
-4
I
J
D
-8
-12
, DRAIN CURRENT (A)
-16
-20
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
Figure 3. On-Resistance Variation with
Temperature.
1.2
V DS = -10V
T J = -55°C
125°C
V th , NORMALIZED
-15
25°C
-10
-5
0
-1
-2
-3
-4
-5
VGS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
-6
GATE-SOURCE THRESHOLD VOLTAGE
-20
I D , DRAIN CURRENT (A)
-8
-12
I D , DRAIN CURRENT (A)
Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current.
1.6
DRAIN-SOURCE ON-RESISTANCE
-4
V DS = VGS
1.1
I D = -250µA
1
0.9
0.8
0.7
0.6
-50
-25
0
25
50
75
100
TJ , JUNCTION TEMPERATURE (°C)
125
150
Figure 6. Gate Threshold Variation with
Temperature.
NDT452AP Rev. B1
Typical Electrical Characteristics
20
5
1.06
1.04
1.02
1
0.98
0.96
0.94
-50
-25
V GS = 0V
10
I D = -250µA
-I S , REVERSE DRAIN CURRENT (A)
BV DSS , NORMALIZED
DRAIN-SOURCE BREAKDOWN VOLTAGE
1.1
1.08
0
25
50
75
100
TJ , JUNCTION TEMPERATURE (°C)
125
150
TJ = 125°C
1
25°C
-55°C
0.1
0.01
0.001
0
0.4
0.8
1.2
1.6
-VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
Figure 7. Breakdown Voltage Variation with
Temperature.
10
2000
, GATE-SOURCE VOLTAGE (V)
ID = -5.0A
C iss
C oss
500
300
f = 1 MHz
C rss
VDS = -5V
-10V
-20V
8
6
4
2
-V
V GS = 0 V
GS
CAPACITANCE (pF)
1000
200
2
100
0.1
0.2
0.5
1
2
5
10
30
0
0
5
10
15
Q g , GATE CHARGE (nC)
-V DS , DRAIN TO SOURCE VOLTAGE (V)
-VDD
ton
t d(on)
t off
tr
RL
t d(off)
tf
90%
90%
V OUT
D
VGS
25
Figure 10. Gate Charge Characteristics.
Figure 9. Capacitance Characteristics.
V IN
20
VOUT
R GEN
10%
10%
DUT
G
90%
S
V IN
50%
50%
10%
PULSE WIDTH
Figure 11. Switching Test Circuit.
INVERTED
Figure 12. Switching Waveforms.
NDT452AP Rev. B1
Typical Thermal Characteristics
3.5
TJ = -55°C
VDS = -10V
9
STEADY-STATE POWER DISSIPATION (W)
g FS, TRANSCONDUCTANCE (SIEMENS)
12
25°C
125°C
6
3
0
0
-4
-8
-12
I D , DRAIN CURRENT (A)
-16
-20
2.5
2
1.5
1b
1c
1
4.5"x5" FR-4 Board
o
TA = 2 5 C
Still Air
0.5
0
0.2
0.4
0.6
0.8
2oz COPPER MOUNTING PAD AREA (in 2 )
1
Figure 14. SOT-223 Maximum Steady- tate
Power Dissipation versus Copper
Mounting Pad Area.
Figure 13. Transconductance Variation with Drain
Current and Temperature.
6
50
20
10
1a
5
-I D , DRAIN CURRENT (A)
I D , STEADY-STATE DRAIN CURRENT (A)
1a
3
4
1b
1c
3
4.5"x5" FR-4 Board
TA = 2 5 o C
5
RD
S(O
N)
10
1
ms
0m
s
1s
10s
VGS = -10V
DC
SINGLE PULSE
0.1
0.05
us
s
R
θJ A
= See Note 1c
T A = 25°C
2
Figure 15. Maximum Steady-State Drain
Current versus Copper Mounting Pad
Area.
1m
0.5
VG S = - 1 0 V
0.2
0.4
0.6
0.8
2oz COPPER MOUNTING PAD AREA (in 2 )
100
IT
10
Still Air
0
LIM
1
0.01
0.1
0.2
0.5
1
2
5
10
- V DS , DRAIN-SOURCE CURRENT (V)
30
50
Figure 16. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
0.5
D = 0.5
0.2
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
R JA (t) = r(t) * R JA
θ
θ
R JA = See Note 1 c
θ
P(pk)
0.01
t1
0.005
(t)
θJA
Duty Cycle, D = t 1 / t 2
Single Pulse
0.002
0.001
0.0001
t2
TJ - TA = P * R
0.001
0.01
0.1
t 1 , TIME (sec)
1
10
100
300
Figure 17. Transient Thermal Response Curve.
Note:
Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change
depending on the circuit board design.
NDT452AP Rev. B1
TRADEMARKS
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with instructions for use provided in the labeling, can be
effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4