Download Physical Memory and Physical Addressing ( Chapter 10 )

Physical Memory
and
Physical Addressing
( Chapter 10 )
by
Polina Zapreyeva
Memory Technologies
RAM
SRAM
DRAM
write enable
input
circuit
for one
bit
output
write enable
input
circuit
for one
bit
refresh
output
RAM
Static RAM
Dynamic RAM
simple internal structure
circuits of multiple transistors
high speed
no need to refresh information
takes more space (lower density)
high power consumption
generates a lot of heat
very expansive
confusing internal structure
capacitor-like circuit
lower speed
needs to be constantly rewritten
takes less space (higher density)
low power consumption
less heat generated
cheap
Measures of Memory Technology
 Density
 Latency
 Cycle times
Density
Density = number of bits/ standard size chip
Higher density
Advantages: more memory in same physical
space
Disadvantages: high power consumption and
great amount of heat
Speed
Speed is
how fast the memory responds to request
Performance of read (access) and write
(update) operations should be considered
separately.
Latency
Latency is
the time it takes to complete an operation.
This is not the best measure of memory
technology because it doesn’t provide
complete information.
Memory Controller
Processor, or any other device, accesses
physical memory through a hardware
known as memory controller that provides
an interface.
Processor
Memory
Controller
Physical
Memory
Steps to Process Memory Request
device presents a read or write request
controller translates that for the memory
and passes the signal for memory chips
controller returns an answer
controller resets hardware circuits
for next operation
Read and Write Cycle Time
Latency doesn’t count the time that controller
uses to reset its circuits. A better measure of
performance is cycle time.
Read cycle time and write cycle time measure
how quickly the memory system handles
successive requests.
SDRAM and SSRAM
Clock cycles of the processor and memory
may differ. Memory controller handles this
problem, but this results in delay.
This problem had been fixed by synchronizing
the two clocks. This resulted in two
technologies: SDRAM (synchronized
DRAM) and SSRAM (synchronized
SRAM)
Multiple Data Rate Memory
Technologies
Fast Data Rate Memories:
- Double Data Rate
- Quadruple Data Rate
Memory Organization
Internal Hardware Structure
Memory bus (bus) is the hardware connection
between a processor and memory.
parallel interface
processor
.
.
.
controller
physical
memory
Memory Transfer Size
Memory transfer size is
amount of data that can be read or written in
a single operation. Also called word size or
word width.
Word is a block of memory with number of bits
equal to memory transfer size.
Note: Word size defines the size of standard integer
and single-precision floating point.
Physical Addresses
Word Addressing
Byte Addressing
each word of memory is assigned a
unique physical memory
address
each byte of memory is assigned a
unique physical memory
address
higher performance
lower performance
reads or writes entire word
reads or writes single byte
controller must support byte
transfer
Physical Memory Operations
The controller for physical memory always
accepts or delivers entire word; hardware
does not provide a way to read or write less
than a complete word.
When reading provides and address, when
writing an address and data.
Byte Addressing With Word
Transfers
To read a single byte:
- convert byte address to word address
- read word
- extract desired byte
To write a single byte:
- convert byte address to word address
- read word
- replace desired byte
- write entire word back
Translation of Addresses
Mathematically:
word address = byte address/ word size
(ignore the reminder)
byte offset = byte address (mod (word size))
Physical Address Number
No computation required:
Byte Address
word address
offset
Memory Banks and Interleaving
Memory bank is a memory unit with own controller;
application parallelism to increase performance.
Can be controlled by the user.
Interleaving spreading consecutive bytes of memory
across separate memory modules. Often done
automatically (parallelism).