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Transcript
www.DataSheet4U.com
ALC650
REALTEK ALC650
APPLICATION NOTES
1. Introduction................................................................. 1
2. Mixer Block Diagram ................................................. 2
3. Audio Jack Sharing..................................................... 3
4. Saving 24.576MHz Crystal......................................... 5
5. Output Amplifier at LINE-OUT................................ 6
6. General Purpose I/O (GPIO) ..................................... 6
7. 6-Channel Mini DIN Connection ............................... 7
8. Front-MIC Input......................................................... 7
9. S/PDIF-In Function .................................................... 8
10. Pin Assignments ........................................................ 8
11. Complete Application Circuits................................. 8
12. Regulator Selection ................................................... 9
13. S/PDIF IO Layout Guide.........................................10
14. Select Correct Optical Receiver for S/PDIF-IN.... 12
0. Revision History
Version 1.4:
(1) Add GPIO control circuit to switch MIC bias voltage.
Version 1.5:
(1) Modified GPIO control circuit to switch MIC bias voltage.
(2) Add S/PDIF input and S/PDIF output layout notice.
Version 1.6:
(1) S/PDIF IO layout guide in section 13.
(2) Section 14 describes how to select correct optical receiver for S/PDIF-IN.
1. Introduction
The ALC650 has a 20-bit stereo DAC and 18-bit stereo ADC, full duplex AC'97 2.2 compatible audio CODEC designed for
PC multimedia systems, including host/soft audio and AMR/CNR based designs. The ALC650 incorporates proprietary
converter technology to achieve a high SNR, greater than 90 dB. The ALC650 AC'97 CODEC supports independent variable
sampling rates and built-in 3D effects.
This document contains some notes on application circuits for the ALC650.
This guide is intended for the Realtek customer who will be designing a hardware system around the Realtek ALC650 chip.
Using this guide, the following goals can be achieved:
(1) Create a noise-free, power stable environment that is suitable for the ALC650.
(2) Reduce the possibility of EMI and EMC and their influence to the chip.
(3) Simplify the task of routing signal traces, so as to make a better circuit for the ALC650.
All information provided in this guide has been tested by Realtek systems engineers to be accurate and directly applicable to
proper system designs using the ALC650.
2002/10/04
1
Rev.1.6
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ALC650
2. Mixer Block Diagram
The Mixer Block Diagram shows the analog data path, and its control mixers. The ALC650 supports flexible analog paths to
fit different multi-channel applications.
MX36
CEN / LFE PCM out
SRC
DAC
MX66
1
MX6A.2
MX2C (Center) / MX30(LFE)
Rear PCM out
Front PCM out
PC-BEEP
SRC
MX2E
SRC
MX2C
S-OUT
1
CD-IN
0*
DAC
MX64
DAC
MX6A.1
1 0*
MX18
MX6A.5
0*
1
0*
1
MX6A.4
3D
MX20.13
MX22
MX0A
PHONE
MIC1 MX6A.10
0*
CEN-OUT 1
Front-MIC
MIC2
LFE-OUT 0* MX6A.10
1
LINE-IN
Center/LFE
Volume
MX0E
MX20.8
MX6A.10
MX6A.9
MX10
MX16
mono analog
stereo analog
stereo digital
* : default setting
MX02
Master
Volume
3D
MX20.13
MX22
MX12
MX14
VIDEO-IN
AUX-IN
S-OUT
MX6A.0
MX0C
+20dB
MX38
Surround
Volume
0*
1
Center/LFE-OUT
stereo mix
mono mix
phone
mic
line
CD
video
aux
M
U
X
OP
Amp
0*
1
Mono
Volume
MX20.9
MX06
Record
Gain
MX1C
ADC
SRC
MX32
LINE-OUT
MONO-OUT
PCM in
MX1A
Analog data path
2002/10/04
2
Rev.1.6
www.DataSheet4U.com
ALC650
3. Audio Jack Sharing
The current standard for motherboards includes only 3 audio jacks on the back panel. The ALC650 embeds an internal analog
switch to share LINE input with Surround output, and share MIC input with CENTER/LFE output. No external analog switch
is needed.
If LINE-IN is designed to be shared with Surround-Out,
keep 2&3 floating
PH5
R25
2
3
LINE IN
(Can be Surr-Out)
R26
CE1
100p
0
LINE-R
0
CE2
100p
LINE-L
R29
R30
100K
100K
Sharing the Audio Jacks
There are two option circuits for MIC to disable bias voltage. For ALC650 ver.E or later, there is Vrefout-disabled function, so
bias voltage from Vrefout(pin28) is recommended as option2 circuit. When MIC is shared with Center/LFE, software should
disable Vrefout. For ALC650 ver.C/ver.D, Vrefout-disabled function is not implemented yet, so GPIO is used to switch bias
voltage as option1/option3 circuit.
option 1: For ALC650 rev.D, select this bias circuit to share MIC-In and CEN/LFE-Out
+5VA
GPIO0 = 0, Q4 ON, Q1 OFF, cut off MIC bias
GPIO0 = 1, Q4 OFF, Q1 On, supply MIC bias
D2
DIODE
+5VA
R33
0
R58
10k
1
2N7000P/TO
+3.3VDD
Q1
2
R35
1
3
Q4
R34
10K
2N7000P/TO
R59
2
4.7K
option 2: For ALC650 rev.E or later,
select this bias circuit to share
MIC-In and CEN/LFE-Out
3
1k
C6
1uF
Vrefout
GPIO0
R36
4.7K
If MIC-IN is designed to be shared with CEN/LFE-Out,
keep 2/3 are floated
R37
PH7
1K
MIC2
2
3
MIC1
R38
MIC IN
(Can be CEN/LFE-Out)
CE3
100p
1K
C7
4700pf
CE4
100p
C8
4700pf
Reserved, default open
2002/10/04
3
Rev.1.6
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ALC650
In order to share LINE/MIC input jacks with Surround/Center/LFE output, system designers must follow the information in
the illustration above to modify jack circuits. Pins 2 and 3 should not be grounded.
2002/10/04
4
Rev.1.6
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ALC650
4. Saving 24.576MHz Crystal
The ALC650 has a built in 14.318MHz to 24.576MHz phase-lock-loop clock generator. The 14.318Mhz frequency from the
clock generator can be used as the clock source for the ALC650 by pulling XTLSEL (pin-46) low.
Pull XTLSEL low if External 14.318MHz Clock is Used
2002/10/04
5
Rev.1.6
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ALC650
5. Output Amplifier at LINE-OUT
The ALC650 embeds a 50mW @ 20Ω amplifier in front of the LINE output to drive the headphones, saving external earphone
driving circuitry.
Standard AC97 Requires
External Amplifier
ALC650 Has an
Embedded Headphone Amplifier
6. General Purpose I/O (GPIO)
The ALC650 supports 2 GPIO pins for specific applications. In the standard package, only GPIO0 is supported at pin-45,
and pin-46 is bonded to select the crystal frequency (XTLSEL). Therefore, only GPIO0 (pin-45) is usable in the standard
package.
If Jack Sharing is required at the MIC input, it is recommended to use GPIO0 to control the Q1 switch as shown in the figure
in Section 3. Doing this will isolate the DC reference voltage when MIC1/MIC2 is configured as Center/LFE output. The
default driver supports this operation unless special consideration is required by the system designer.
2002/10/04
6
Rev.1.6
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ALC650
7. 6-Channel Mini DIN Connection
The illustrations below describe connection with the 6-channel mini DIN, compatible with Jazz’s 6-channel speaker system,
the most popular speaker in current multi-channel applications. It is recommended to implement the mini DIN connector with
a circuit breaker.
Physical Mini DIN Pin Definition
JR1
9 8 7
6 5 4 3
2 1
G
(10)
M-DIN_9-R
J6
Front-L
Front-R
1
2
3
4
5
MDIN9
Surround-L
Surround-R
Center
LFE
6
7
8
9
10
(10)
G
6 channel analog output in Mini DIN connector
3
7
1
4
2
5
8
6
9
"Bottom View"
6
(10)
G
2
9
8
5
1
4
3
7
"Top View"
Mini DIN Connection for 6-Channel Applications
8. Front-MIC Input
If the jack sharing function is designed to switch MIC1 and MIC2 to Center and LFE output, the normal microphone jack in
the back plane will no longer function as the microphone input. The ALC650 supplies a dedicated microphone input, named
Front-MIC. This can be used as the microphone front panel jack if front panel IO is implemented according to the illustration
below, which follows INTEL’s “Front Panel IO Connectivity Design Guide V1.0” specifications.
+5VA
1
3
5
7
9
2
4
6
8
10
Front-R to back plane jack
Front-L to back plane jack
1u
Front panel header
Front-MIC (ALC650 pin-34)
2.2K
+
Front-Out-R (ALC650 pin-36)
R52
+
Vrefout (ALC650 pin-28)
+100u
Front-Out-L (ALC650 pin-35)
+100u
( Front Panel Header)
Front-MIC Input in a Front Panel I/O implementation
2002/10/04
7
Rev.1.6
www.DataSheet4U.com
ALC650
9. S/PDIF-In Function
Only ALC650 Rev. E or later versions support the S/PDIF-In function. The frequency of the S/PDIF signal is about
1.5MHz~6MHz. Therefore, to prevent cross-talk interference from S/PDIF output, do not layout S/PDIF input and S/PDIF
output traces in a parallel configuration. It is recommended to maintain double width or ground between S/PDIF input and
S/PDIF output traces.
SPDIFO
SPDIFI / EAPD
XTLSEL
GPIO0
LFE-OUT
CEN-OUT
AVSS2
S-OUT-R
NC
S-OUT-L
AVDD2
MONO-OUT
10. Pin Assignments
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5
6
7
8
9
10
11
12
ALC650
13 14 15 16 17 18 19 20 21 22 23 24
36
35
34
33
32
31
30
29
28
27
26
25
LINE-OUT-R
LINE-OUT-L
Front-MIC
NC
VRDA
VRAD
AFILT2
AFILT1
VREFOUT
VREF
AVSS1
AVDD1
PHONE
AUX-L
AUX-R
VIDEO-L
VIDEO-R
CD-L
CD-GND
CD-R
MIC1
MIC2
LINE-IN-L
LINE-IN-R
DVDD1
XTL-IN
XTL-OUT
DVSS1
SDATA-OUT
BIT-CLK
DVSS2
SDATA-IN
DVDD2
SYNC
RESET#
PC-BEEP
11. Complete Application Circuits
The application circuits are contained in a separate file. Please refer to the file titled “ALC650_Demo_Circuit_Ver_xx.PDF”
for the schematics for those circuits.
2002/10/04
8
Rev.1.6
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ALC650
12. Regulator Selection
The ALC650 has a built in amplifier. It normally consumes 60mA from +5V AVDD when driving active powered speakers. If
the ALC650 is driving earphones with a 16 ohm load, the amplifier will consume almost 100mA from the +5V regulator when
it is playing a full swing test sine wave. To prevent the power regulator from overheating, it is recommended to use a +5V
regulator with internal thermal overload protection and at least 200mA output current capability. For example the LM7805CT
can be used.
If only a 78L05 is used to supply 100mA output current, a 20Ω resister should be placed in the front LINE-OUT path to limit
current consumption. This will protect the 78L05 from damage.
Do not short pins 2 & 3 to ground
R16
0 / 20
Front-Out-R
2
3
Front-Out-L
R17
0 / 20
Ce
Ce
100p
100p
Front LINE OUT
If AVDD is supplied by a 78L05 with 100mA current,
change R16 and R17 to 20Ω to limit current consumption.
The following table shows the maximum current consumed from AVDD under various loads. These test values are measured
by a 6-channel DAC playing a full-scale sinusoidal wave (1KHz, 44.1KHz sampling rate), which is the worse case, consuming
maximum current.
R16, R17 = 0 ohm
R16, R17 = 20 ohm
Powered
Speaker
50 mA
50 mA
20 Ω
Earphone
93 mA
79 mA
16 Ω
Earphone
104 mA
83 mA
8Ω
passive speaker
129 mA
93 mA
Playing a full scale sinusoidal wave, power consumed from +5V AVDD
2002/10/04
9
Rev.1.6
www.DataSheet4U.com
ALC650
13. S/PDIF IO Layout Guide
Crosstalk is an undesirable feature with S/PDIF signals. It causes a disturbance between S/PDIF-IN and S/PDIF-OUT signals.
Mutual coupling mechanisms will be form if S/PDIF-IN and S/PDIF-OUT are parallel, the mutual capacitance and mutual
inductance between traces have capacitive and inductive coupling of electromagnetic field generated by S/PDIF-OUT. Figure
13-1 indicates the coupling energy from S/PDIF-OUT may interfere S/PDIF-IN operation.
VCC3.3
100K
74HC04 3.3V
0.01uF
100K
0V
S/PDIF-IN
S/PDIF-OUT
Cross talk
3.3V
0V
Long parallel run lines is not guarded by
Ground will induce Crosstalk
Figure 13-1 Crosstalk between S/PDIF-IN and S/PDIF-OUT traces
Design and layout rules listed here are useful to prevent crosstalk.
1.Minimize physical distance between IO connector (or header) and ALC650.
2.Avoid routing of S/PDIF-IN trace parallel to S/PDIF-OUT. Figure 13-2 shows an approximate equation to minimize
crosstalk, distance (H) with reference plane must be minimized, and distance (D) between traces must be maximized. (Refer
to “High Speed Digital Design”. Johnson, H. W., and M. Graham. 1993. Englewood Cliffs, NJ: Prentice Hall)
3.S/PDIF-IN and S/PDIF-OUT signals are separated by ground traces will reduce crosstalk. (Figure 13-3)
4.A simple rule to minimize coupling between traces is the 3-W rule. The distance separation between centerline of traces
must be three times the width of a single trace. (Figure 13-4)
D
Trace2
Trace1
H
1
Crosstalk =
H
1+(
ground plane
D 2
)
H
Figure 13-2 Approximate equation to estimate crosstalk
signal 4
signal 3
signal 2
signal 1
Crosstalk > 5%
ground plane
(Front View)
Figure 13-3a Traces without separation have significant crosstalk
2002/10/04
10
Rev.1.6
www.DataSheet4U.com
ALC650
ground
signal 2
ground
signal 1
Crosstalk < 1-2%
ground plane
(Front View)
Figure 13-3b Traces separated by ground can reduce crosstalk
Signal is guarded by ground
ground trace
W=12 mils
S/PDIF-IN trace
ground trace
> 3W
S/PDIF-OUT trace
(Top View)
Figure 13-4 The 3-W rule to minimize coupling
Additional to above layout rules, the 3-W rule represents the approximate only 70% flux boundary, 10-W should be used to get
approximate 98% boundary. (Refer to “EMC and the Printed Circuit Board”, Mark I. MONTROSE) However, it may be not
easy to separate traces with 10-W distance, Figure 13-5 is 5-W (W=12 mils) separations adapted on Realtek’s demo board.
VCC3.3
100K
74HC04
0V
1.65V
0.01uF
100K
Crosstalk is
almost removed
Seperated by ground
to remove Crosstalk
5W
S/PDIF-IN
S/PDIF-OUT
3.3V
0V
Figure 13-5 The suggested layout on Realtek’s demo board
2002/10/04
11
Rev.1.6
www.DataSheet4U.com
ALC650
14. Select Correct Optical Receiver for S/PDIF-IN
ALC650 supports one S/PDIF-IN input. It is better to design optical receiver only or RCA connector only on the board. To
make optical receiver and RCA connector can be combined on the board, specific optical receiver must be used.
An optical receiver has ATC (Automatically Threshold Control) can be connected to RCA. When non-modulated optical
signal is inputted (optical signal is absent) to the optical receiver without ATC, its output signal is not stable. That will disturb
the RCA signal randomly to be an unstable signal. (Figure 14-1 and 14-2)
Figure 14-1 When no modulated optical signal is inputted, non-ATC receiver output an unstable signal
Figure 14-2 Combined signal is also unstable makes S/PDIF-IN data is lost in a short time
2002/10/04
12
Rev.1.6
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ALC650
Figure 14-3 is a reference design uses optical receiver with ATC to accommodate RCA input. Table 14-4 lists the
recommended optical receivers and transmitters by different system implementation.
(Optical Receiver)
14
+3.3V
R6
2.2K
+3.3V
C7
0.01u
U2A
Combined
signal
R9
VCC
DGND
No Automatic Threshold Control to stablize output,
it is not suitable for connecting to RCA signal
RCA signal
J2A
10
1
(ALC650 pin-47)
4
R8
100K
74HC04
2
+5V
CASE
3
OUT
47uH
C4
0.1u
3.3K
CASE
1
L1
S/PDIF-IN
5
2
5
Optical signal
R10
TORX178/179
U2
AGND
VCC
DGND
CASE
3
1
OUT
CASE
2
6
TORX176/173
4
U2
1
C6
0.01uF
R7
7
RCA
S/PDIF-In RCA
C5
100pF
2
100K
74HC04 is used to improve sensitivity for S/PDIF-In signal,
it can be removed and R10=0 if only optical receiver is used.
Figure 14-3 Optical receivers with ATC is recommended
Table 14-4 Recommended optical receivers by system implementation
S/PDIF-IN Connector
Recommended Optical Receivers
1.Optical only
TORX173, 176, 178, 179
2.RCA only
3.Optical receiver + RCA connector
TORX173, TORX176
S/PDIF-OUT Connector
1.Optical only
2.RCA only
3.Optical receiver + RCA connector
2002/10/04
Recommended Optical Transmitters
TOTX173, 176, 178, 179
TOTX173, 176, 178, 179
13
Note
Only one of optical receiver and RCA
can accept input at the same time
Note
Both optical transmitter and RCA output
at the same time
Rev.1.6
www.DataSheet4U.com
ALC650
Realtek Semiconductor Corp.
Headquarters
1F, No. 2, Industry East Road IX, Science-based
Industrial Park, Hsinchu, 300, Taiwan, R.O.C.
Tel : 886-3-5780211 Fax : 886-3-5776047
WWW: www.realtek.com.tw
2002/10/04
14
Rev.1.6