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OUTLINE
- Introduction
- Single Stage Op-Amplifier
- Folded Cascode Op-Amplifier
- Design and Analysis Two Stage Op-Amplifier
INTRODUCTION
It easy to define an Op-Amp. as "a high gain deferential
amplifier". It is mean that a value that is adequate for
the application. The gain could be anywhere from 101 to
106 .
Many other aspects of performance had to sacrificed;
such as power, output swing and speed.
Most of today s' CMOS op-amp have a high output
impedance (in open loop). As such, they called
"transconductance amplifiers".
ROLE OF OP-AMPLIFIERS
- Widely used building blocks for analog circuits, MixedSignals.
- Widely used in analog signal processing and
communication circuits
SPECIFICATIONS REQUIREMENTS
-
High DC Gain
Large Gain-Bandwidth/ High Speed
Sufficient Output Swing
High power efficiency
1- SINGLE STAGE OP-AMP.
The MOSFET converts the input
gate-source voltage to drain
current, which can pass through a
load to generate an output
voltage.
2- CASCODE AMPLIFIER
DC Gain: High
Speed: Excellent
Power diss.: High
Freq. Response: Good
Output Swing: Small
3- TWO STAGE OP-AMP DESIGN AND ANALYSIS
DC Gain: Modest
Speed: Good
Power diss. : Good
Freq. Response: Good
Output Swing: Good
3- TWO STAGE OP-AMP DESIGN AND ANALYSIS
I D5
Slew Rate 
.....(1)
C
I D 3, 4
W 
  
I D8
 L 3, 4
W 
  ............(5)
 L 8
2
g m1, 2
W 
....(2)
  
 L 1, 2 2nCOX I D1, 2
g m8  2.2 * 2 fUGB C ....(3)
g m8
W 
......(4)
  
 L 8 2 nCOX I D 7
2
g m2 5
W 
..(6)
  
2
 L 5  COX (Vdd  Vin(max)  2Vth )
W  W 
   
W 
 L  5  L 8
.........(7)
  
W 
 L 7
2 
 L 3
FREQUENCY RESPONSE
AV
p1
p2
z2
UGF z1
-90
PM
-180
w
HOMEWORK
Design a two-stage CMOS Op-Amp. by using a 0.18 µTechnology
and calculate the aspect ratio of each PMOS and NMOS. The
design parameters are:
Parameter
Vdd
CL
SR
Kp
Kn
VTp
VTn
Phase Margin
Cc
GB
Value
1.8
1 pF
50 V/µs
93 x10-6A/V2
168 x10-6/V2
-0.39V
0.32V
60º
0.22 C
80 MHZ