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CET335 Microprocessor Interfacing
Lab 6: Digital-to-Analog Output
Introduction: Digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) are needed to
allow the microprocessor, which is basically a digital device, to interface with many real world applications
using analog signals. ADCs are used to convert analog voltage signals from the real world into a digital
representation usable by the processor while DACs reverse this process by converting digital information
into an analog current or voltage output. This lab will demonstrate the operation and use of DACs.
Objectives:
 Show how to connect a D/A converter (DAC) to a microprocessor system.
 Demonstrate how a DAC converts digital information into an analog equivalent.
 Demonstrate a number of programs that will produce various analog signals from a DAC.
Materials required:
(1) DAC0808 or MC1408 DAC IC
(1) 741 op amp IC
(2) 1 k resistor
(1) 5 k resistor
(1) 2 k potentiometer
(1) 47 pF ceramic capacitor
(2) 0.1 F capacitor
Dragon12 EVB
±12VDC Power Supply
Oscilloscope
Digital Multimeter (DMM)
Procedure:
1. Refer to the DAC circuit schematic in figure 1 and construct this circuit on your breadboard. First
acquire the pinouts of the ICs and number all pin connections on figure 1. Be very careful of the
labeling of the digital inputs to the DAC – some data sheets use a reverse numbering scheme! Make
sure you wire the DAC's top 6 digital inputs to the bottom 6 port B outputs of the ‘S12 and ground the
bottom 2 DAC inputs. This will purposely rig the 8-bit DAC as a 6-bit DAC so as to exaggerate the
DAC output steps for visual effect. The ±12VDC sources are to be obtained from the lab station
power supply. Don’t forget to also connect the power supply ground to your circuit ground. DOUBLE
CHECK your DAC wiring to prevent damaging of any components or the EVB!
Dragon12 EVB
MC1408
+5
Vcc
PB5
D7
+12V
2kΩ
5kΩ
1kΩ *
VREF+
47pF
IO
+12V
PB0
GND
D0
Vee
VREF-
-
Gnd
+
VOUT
LM741
-12V
C
0.1uF
* between 1kΩ and 6.8kΩ
-12V
Fig. 1: DAC circuit
Lab 6: Digital-to-Analog Output - Page 1
2. One advantage to using port B on the Dragon12 EVB is that we can visually track the port B outputs
to the DAC using the PB7..PB0 LED bank on the EVB. Recall from a previous lab that we need to first
enable them by outputting a 0 on port J bit 1 (PJ1). Let’s also turn off the numeric LED digits via port
P for this lab.
>MM 26A
026A ?? 02
>MM 258
0258 ?? 0F
>MM 25A
025A ?? 0F
// set DDRJ to make PJ1 an output (already a 0)
// output all 1s on PP3..PP0
// set DDRP to make PP3..PP0 all outputs
Now we can output values to port B and verify logic levels using the LEDs:
>MM 3
0003 ?? FF
>MM 1
0001 ?? 55
// set DDRB to make port B all outputs
// output test pattern on port B to LED bank
3. Set your DMM to measure 5 volts DC and connect it to your circuit as follows: negative lead to circuit
ground and positive lead to Vout of the op amp. Set port B outputs to all zeros. You should measure
approximately 0VDC.
4. Change the output of port B to $3F then adjust the 2kΩ control for a 4.92V output. Problems here
would indicate incorrect power supply setup (use the DMM to verify!) or faulty wiring, probably in the
op-amp feedback circuit. Double-check all supply and ground connections. You may also use the
DMM to verify proper logic levels on the digital inputs of the DAC for various port B output patterns.
These should also agree with the LED bank indicators.
5. Change port B to the following output values and record the voltage output for each. Leave the
"Expected Output" column blank since it will be used in a later step.
Output Value
Voltage Output
$00
$10
$20
$30
$3F
0.00
Expected Output
4.92
DISCUSSION: The DAC converts a digital binary input into a proportional analog output. The DAC0808/
MC1408 is setup as a 6-bit current output DAC and the two most significant data bits from port B are not
used. The output current produced is proportional to the digital output value from port B; minimum current
out occurs when the port B output is $00 while maximum current flows when all data lines are hi ($3F).
The op amp functions as a current-to-voltage converter and the 2k-ohm control varies the gain.
6. Using the Vout formula for a DAC, complete the chart in step 5 by calculating the expected voltage
outputs for the respective binary inputs.
Q1.
How many possible output levels (steps) are available from this DAC as wired? ________
Q2.
What is the resolution (step size) of this DAC considering its 0-5V output range? ________
7. Enter the following program into the editor, assemble it, download to your EVB and execute it. You
should observe a slowly increasing voltage on the DMM that cyclically ramps from 0 volts up to 5
volts.
Lab 6: Digital-to-Analog Output - Page 2
PORTB
DDRB
PORTP
DDRP
DDRJ
START
RAMPUP
EQU
EQU
EQU
EQU
EQU
$1
$3
$258
$25A
$26A
ORG
movb
ldaa
staa
staa
movb
clrb
stab
incb
bsr
$2000
#2,DDRJ
;enable LED bank
#$0F
PORTP
DDRP
;turn off numeric LEDs
#$FF,DDRB ;make port B all outputs
;starting step number
PORTB
;output accB to DAC
;bump ramp step number
DELAY
;wait a while
(marker for step 10)
RAMPUP
;repeat
bra
DELAY
WAIT
Delay1
DTIME
ldx
bsr
dex
bne
rts
pshx
ldx
dbne
pulx
rts
FDB
END
DTIME
Delay1
;load delay time into X
;twiddle thumbs a while
WAIT
;return to caller
#796
X,*
5000
;2~
;2~
;3~
;3~
;5~
preserve registers used here
iterations for 0.1ms.
796 loops * 3~/loop = 2388~
recover used registers
2388 + 12 = 2400~ = 0.1ms.
;delay time count for 0.5 sec.
Listing 1: DAC output program #1
DISCUSSION: The voltage ramp generated by this program is composed of 64 discrete voltage steps,
each step representing its equivalent binary input. You should be able to visually detect the steps on the
DMM. The binary input to the DAC is kept in accumulator B and is repeatedly incremented from 0 to $FF.
Note that when the count reaches $3F + 1 = $40, the DAC "thinks" its input has returned to 0 since only
the bottom 6 bits of port B are wired to the DAC. The rate of voltage change is determined by the word
constant stored at "DTIME".
8. Stop the program, change the delay time to 250 and re-run the program. Note how this affects the
ramp time on the DMM. Now connect the oscilloscope to your circuit at the same point as the DMM
and observe the waveform. Set the scope up for 2.0V/div., 2mS/div., and DC input with negative
triggering. Stop the program, shorten the delay time to 2 and re-run the program. Adjust the scope as
necessary to view at least one complete DAC output cycle. You should observe the complete
ascending ramp on the scope.
Q3.
What change to the program would be required to generate a descending ramp?
9. Using DBug-12's memory modify or Assembly command, change the "INCB" instruction to "DECB".
This may be done directly from the monitor by changing the contents of "RAMPUP+2" ($2015) to the
opcode for DECB, which is $_____. Restart the program and switch the scope to positive edge
triggering. You should then observe a descending voltage ramp on the scope.
10. Stop the program again and return to the editor. Insert the following instructions into the previous
program at the indicated pointer as shown on the previous listing.
RAMPDN
cmpb
bne
stab
bsr
decb
bne
#$3F
RAMPUP
PORTB
DELAY
RAMPDN
at max Vout yet?
keep increasing if not
output new step value
wait a while
decrement ramp step number
repeat until min Vout
Lab 6: Digital-to-Analog Output - Page 3
11. Assemble, download and re-run the modified program. You should now observe a triangle waveform
as the program steps from 0V up to 5V then back down to 0V. Note that the delay value at DTIME
should now be cut in half to see the entire waveform within the sweep time of the oscilloscope without
changing its timebase setting. Do this with the monitor’s memory modify command. You may at this
time (recommended) want to get an assembly of your current program.
12. Enter, assemble, download and run the new program in listing 2. The effect of this program is to
produce a sinusoidal wave form.
Q4.
What is the wave form's frequency? __________
* Sine Wave Generating Program
PORTB
EQU
$1
DDRB
EQU
$3
START
SINE
SIN1
SIN2
SIN3
SIN4
DACOUT
ORG
movb
ldx
ldab
ldaa
inx
nop
bsr
decb
bne
ldab
dex
ldaa
nop
bsr
decb
bne
ldab
ldaa
inx
coma
bsr
decb
bne
ldab
dex
ldaa
coma
bsr
decb
bne
bra
$2000
#$FF,DDRB
#SINTBL
#TBLLEN
0,X
staa
ldaa
dbne
rts
PORTB
#49
A,*
* sine table values
SINTBL
fcb
fcb
fcb
TBLLEN
equ
end
DACOUT
SIN1
#TBLLEN
0,X
;make port B all outputs
;point X to start of table
;init B to length of table
;fetch a table value
;bump X
;1 cycle delay
;output current value
;end of table yet?
;repeat if not
;reset B
;repeat above going backwards
;thru table
DACOUT
SIN2
#TBLLEN
0,X
DACOUT
SIN3
#TBLLEN
0,X
;reset B
;fetch a table entry
; bump X
;complement the value
;output it
;end of table yet?
;repeat if not
;reset B
;repeat above going backwards
;thru table
DACOUT
SIN4
SINE
;loop again if not
;output new data to DAC
;step delay
for 1/4 SINE wave
$21,$23,$26,$28,$2B,$2D
$2F,$31,$33,$35,$37,$39
$3A,$3B,$3C,$3D,$3E,$3F
*-SINTBL ;length of table (in bytes)
Listing 2: DAC output program #2
DISCUSSION: This program uses a "look-up" table of constant values to generate a sine wave signal.
The table was generated from the sine of the angles between 0 and 90 degrees in 5 degree increments.
Because the sine wave must reside within a 0 to 5 volt "window", each 90 degree segment of the sine
wave can only be generated by half (32) of the possible digital values. The first 90 degrees starts at 2.5V
and steps up to 5V. The second 90 degrees steps from 5V down to 2.5V. The third 90 degrees steps from
2.5V down to 0V, and finally, the fourth 90 degrees steps from 0V back up to 2.5V. The bottom five bits of
the digital value determine the digital voltage level while the sixth bit selects the top half or bottom half of
the sine wave. Study the program and its comments until you understand the logic behind the program.
Lab 6: Digital-to-Analog Output - Page 4
Q5.
Why do the two NOP instructions appear in the parts of the program that generate the first and
second quarters of the sine wave? Hint: try removing them!
13. Stop the program by pressing the reset button. Add the following simple, first-order low-pass filter to
the output of the op-amp then restart the program. Using both channels of the oscilloscope (channel 1
on Vout, channel 2 on Vout'), observe the effects of the filter.
Q6.
Explain below any differences in amplitudes or phase angle between the two waveforms.
VOUT
1kΩ
VOUT’
0.1uF
Fig. 2: Vout filter
14. Consider how this program programmatically generates the sine wave.
Q7.
Describe what changes to the program would be necessary to have it produce a cosine wave
instead of the sine wave.
15. Have the final two steps of this lab checked off by the instructor.
Instructor Signoff: ______________
Lab 6: Digital-to-Analog Output - Page 5