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ELEC 351L Electronics II Laboratory Spring 2004 Lab #8: Input and Output Resistances of BJT Diff Amps Introduction In order to employ an amplifier as part of an electronic system, it is important to know the gain of the amplifier. It is almost always equally important to know its input and output resistances as well, because these two parameters dictate how much voltage will be developed across the input of the amplifier and across its load. Many methods can be used to measure the input and output resistances of a wide variety of amplifier circuits; however, diff amps can present a measurement challenge. Some of the special properties of diff amps (for example, the requirement to maintain zero input bias voltages) preclude the use of more straightforward techniques. In this lab experiment you will investigate some of the special considerations involved in measuring the input and output resistances of a diff amp. Theoretical Background Figure 1 shows the basic diff amp circuit that was investigated in the previous lab exercise. Two resistors (RS1 and RS2) have been added to represent possibly non-negligible source resistances, that is, the Thévenin equivalent resistances of one or both signal sources. If a single floating VCC RC RC vOUT1 vOUT2 RS1 RS2 vs1 IREF R1 Q1 Q2 vin1 vs2 vin2 Io QA QB VEE Figure 1. Differential amplifier with resistor pull-up loads. Resistors RS1 and RS2 represent the output resistances of the two signal sources. 1 (i.e., differential) source were driving the circuit, RS1 and RS2 would be combined into a single source resistance RS. In Figure 1, the equivalent source voltages are represented by node voltages vs1 and vs2, and the actual input voltages of the diff amp are represented by vin1 and vin2. The single-ended input resistances rin1 and rin2 can be determined with the aid of the small-signal model of the diff amp shown in Figure 2. Implicit in Figure 2 is the assumption that Q1 and Q2 are matched, as are the pull-up resistors (RC). The BJT output resistances rce have been included to allow the derivation of more accurate expressions for the output resistances. Each input has its own single-ended input resistance (rin-se1 and rin-se2), but because of the symmetry of the circuit, they are equal in value. The amplifier also has a differential input resistance rin-diff, but we will not consider it here because it is especially difficult to measure. vout1 vout2 vin1 vin2 rce rce RC r RC oib1 r oib2 ib1 ib2 in rn Figure 2. Small-signal model of the diff amp. The triangles represent ground connections. They are used instead of the traditional symbol in order to save space. The single-ended input resistance of the first port is defined as rin se1 vin1 , ib1 where it is assumed that vin2 = 0. (All independent sources must be deactivated in order to find a Thévenin equivalent resistance.) An expression for rin-se1 can be found easily by applying KVL to obtain vin1 ib1r ib 2 r . Recall that, when vin2 = 0, the right-hand side of the circuit acts in the small-signal sense like a very low resistance (r / o) in parallel with rn. Thus, almost none of ib1 flows through rn, and ib2 ≈ −ib1. Consequently, vin1 ib1r ib1r 2ib1r , 2 and rin se1 2ib1r 2r . ib1 Likewise, rin-se2 = 2r. The single-ended output resistance rout-se1 is found by deactivating all of the input voltages and applying a test source vt to the first output port, as shown in Figure 3. The output resistance is then defined as v rout se1 t . it i1 it rce r rce + − RC vt oib1 RC ve ib1 r oib2 ib2 rn Figure 3. Small-signal model of the diff amp with test source used to find the singleended output resistance of port #1. Applying KCL to the upper-left node of Figure 3 (i.e., to the positive side of vt) yields it vt i1 , RC where i1 vt v e o ib1 , rce and where ve is the small-signal voltage across rn. The right-hand side of the circuit (Q2) acts as an equivalent small-signal resistance of r / o in parallel with rn, which is also in parallel with r on the left-hand side. Consequently, the approximate equivalent resistance req measured from the ve node to ground is given by 3 r req r rn Since i1 also flows through req, i1 o r o . ve ve o . req r Equating this to the other expression for i1 given above yields i1 v e o vt v e v ve v o ib1 t o e , r rce rce r where we have used the relationship ib1 ve . r Solving for ve, v e o vt v e v o e r rce r ve 2ve o vt ve r rce rce 2 v 1 o ve t rce rce r vt vt r 1 vt , 2 o rce 1 rce 2 o 2 o rce 1 r rce r which implies that ve is a tiny fraction of vt. Thus, we can assume that the voltage across rce is approximately equal to vt. Now we can express it totally in terms of vt as it v v vt v v v v r , t o ib1 t t o e t t o vt RC rce RC rce r RC rce r 2 o rce which reduces to it vt v v v v t t t t . RC rce 2rce RC 2rce The single-ended output resistance is therefore rout se1 vt 1 RC 2rce . 1 1 it RC 2rce 4 If RC is large enough, the existence of the resistance rce could reduce the output resistance by a significant amount. The presence of rce also leads to gain values that are lower than expected. The differential output resistance rout-diff can be found using the small-signal model shown in Figure 4. By symmetry, i1 = i2 and ib1 = ib2. The latter is only possible if ve = 0 (i.e., the ve node becomes a virtual ground). This in turn implies that ic1 = −ic2. Applying KCL yields it ic1 i1 , and applying KVL yields vt ic1 RC ic 2 RC 2ic1 RC and vt i1rce i2 rce 2i1rce . The latter is true because oib1 = oib2 = 0. Thus, vt v t . 2 RC 2rce it The differential output resistance is therefore rout diff vt it i1 1 1 1 2 RC 2rce 2RC rce . it i2 + − rce r ic1 vt RC oib1 ve ib1 ic2 rce RC r oib2 ib2 rn Figure 4. Small-signal model of the diff amp with test source used to find the differential output resistance. 5 Experimental Procedure Reconstruct the diff amp circuit you investigated in Lab #7 (Figure 1), using the CA3046 transistor array and the same bias conditions and power supply voltages. Remember to include suitable bypass capacitors across the power supply leads. Given the known circuit quantities and estimates based on the data sheet, calculate expected (analytical) values for the single-ended input and output resistances rin-se1 and rout-se1. Also determine the expected differential output resistance rout-diff. Assume that the bias conditions of the amplifier will not be affected significantly as long as the node voltages at the bases of Q1 and Q2 in Figure 1 are no higher than 10 mVDC. Use reasonable approximations of unknown quantities (or even better, consult the data sheet) to determine how much resistance could be connected between the base of each BJT and ground without raising the DC bias voltage at either base to more than 10 mV. The data sheet for the CA3046 is available at the ELEC 351 Lab web site. Apply a sinusoidal input voltage at a frequency of 10 kHz to input vin1 of the diff amp. Use the voltage divider circuit shown in Figure 5 to limit the input voltage. Devise a method to measure the single-ended input and output resistances rin-se1 and rout-se1. Compare the measured values to the analytical values calculated previously. Offer a plausible explanation for any discrepancy. RS RA vin1 vs + − 50 RB Figure 5. Voltage divider for reducing the output voltage from a function generator. Devices vs and RS together represent the function generator. Resistor values RA and RB must be chosen to reduce the voltage by an appropriate amount while simultaneously creating an appropriate source resistance. Measure the differential-mode output resistance rout-diff. You will need to devise a method to ensure that the bias conditions of the diff amp are preserved while you make your measurement. Compare the measured values to the analytical values calculated previously. Offer a plausible explanation for any discrepancy. 6