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PN Junctions Theory
Dragica Vasileska
Department of Electrical Engineering
Arizona State University
1. PN-Junctions: Introduction to some
general concepts
2. Current-Voltage Characteristics of an
Ideal PN-junction (Shockley model)
3. Non-Idealities in PN-Junctions
4. AC Analysis and Diode Switching
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
1. PN-junctions - General Consideration:
• PN-junction is a two terminal device.
• Based on the doping profile, PN-junctions can be
separated into two major categories:
- step junctions
- linearly-graded junctions
ND  N A
ND  N A
ax
n-side
p-side
Step junction
p-side
n-side
Linearly-graded junction
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(A) Equilibrium analysis of step junctions
EC
qVbi
Ei
EF
EV
p-side
(x)
n-side
p p 0  ni expEi  E F k BT 
W
+
qND
-qNA -
x
V (x)
Emax
 N AND 
k BT  p p 0 nn0 


Vbi 
ln

V
ln
T
 n2 
 n2 
q




i
i
(b) Majority- minority carrier
relationship:
Vbi
E (x)
 xp
(a) Built-in voltage Vbi:
qVbi   Ei  E F  p   E F  Ei n
nn0  ni exp E F  Ei  k BT 
x
xn
pn0  p p 0 exp Vbi / VT 
n p 0  nn0 exp Vbi / VT 
x
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(c) Depletion region width:
 Solve 1D Poisson equation using depletion charge
approximation, subject to the following boundary conditions: V ( x p )  0, V ( xn )  Vbi , E ( xn )  E ( x p )  0
qN A

x  x p 2
p-side: V p ( x) 
2k s  0
qN D
n-side: Vn ( x)  
 xn  x 2  Vbi
2k s  0
 Use the continuity of the two solutions at x=0, and
charge neutrality, to obtain the expression for the depletion
region width W:
xn  x p  W 
V p (0)  Vn (0)   W  2k s 0 ( N A  N D )Vbi
qN A N D

N A x p  N D xn 
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(d) Maximum electric field:
The maximum electric field, which occurs at the
metallurgical junction, is given by:
Emax
dV

dx
x 0
qN A N DW

k s 0 ( N A  N D )
(e) Carrier concentration variation:
15
N A  N D  1015 cm 3
Wcalc  1.23 mm
Emax( DC )  9.36 kV / cm
Concentration [cm-3]
10
13
10
11
10
-3
n [cm ]
-3
Emax( sim)  8.93 kV / cm
p [cm ]
9
10
7
10
5
10
0
0.5
1
1.5
2
2.5
3
3.5
Distance [mm]
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
N A  N D  1015 cm 3
Wcalc  1.23 mm, Emax( DC )  9.36 kV / cm, Emax( sim)  8.93 kV / cm
5x10
15
0
Electric field [kV/cm]
-3
(x)/q [cm ]
10
14
0
-5x10
14
-10
15
0
0.5
1
1.5
2
2.5
Distance [mm]
3
3.5
-2
-4
-6
-8
-10
0
0.5
1
1.5
2
2.5
Distance [mm]
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
3
3.5
N A  1016 cm 3 , N D  1018 cm 3
 0.328 mm, Emax( DC )  49.53 kV / cm, Emax( sim)  67 kV / cm
Wcalc
10
Electric field [kV/cm]
5x10
17
16
-3
(x)/q [cm ]
10
0
-5x10
-10
16
17
0.6
0.8
1
1.2
Distance [mm]
1.4
0
-10
-20
-30
-40
-50
-60
-70
0.6
0.8
1
1.2
Distance [mm]
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
1.4
(f) Depletion layer capacitance:
 Consider a p+n, or one-sided junction, for which:
2k s 0 Vbi  V 
W
qN D
 The depletion layer capacitance is calculated using:
dQc qN D dW
qN D ks 0
1 2(Vbi  V )
C


 2
dV
dV
2(Vbi  V )
qN D ks 0
C
1 C2
Measurement setup:
1
slope 
ND
Reverse
bias
vac ~
Forward bias
Vbi  V
W
V
V
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
dW
(B) Equilibrium analysis of linearly-graded junction:
12k s 0 Vbi  V 
W 

qa


1/ 3
(a) Depletion layer width:
(c) Maximum electric field: Emax
(d) Depletion layer capacitance:
qaW 2

8k s 0
1/ 3


C

12

V

V

bi


qaks202
Based on accurate numerical simulations, the depletion
layer capacitance can be more accurately calculated if Vbi
is replaced by the gradient voltage Vg:
 a 2 k s 0VT 
2
Vg  VT ln 
3 
3
 8qni 
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(2) Ideal Current-Voltage Characteristics:
Assumptions:
• Abrupt depletion layer approximation
• Low-level injection  injected minority carrier density
much smaller than the majority carrier density
• No generation-recombination within the space-charge
region (SCR)
(a) Depletion layer:
W
EC
qV
E Fn
E Fp
np  ni2 exp V / VT 
n p (  x p )  n p 0 exp V / VT 
pn ( xn )  pn 0 exp V / VT 
EV
 xp
xn
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(b) Quasi-neutral regions:
• Using minority carrier continuity equations, one arrives at
the following expressions for the excess hole and electron
densities in the quasi-neutral regions:
V / VT
pn ( x )  pn 0 (e
V / VT
n p ( x )  n p 0 (e
 1)e
 ( x  xn ) / L p
 1)e
n p ( x)
( x  x p ) / Ln
pn (x )
Forward bias
Space-charge
region W
pn 0
n p0
 xp
xn
x
Reverse bias
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Corresponding minority-carriers diffusion current densities
are:
diff
J p ( x)
J ndiff ( x )

qD p pn 0

qDn n p 0
Lp
Ln
V / VT
(e
V / VT
(e
 1)e
 1)e
 ( x  xn ) / L p
( x  x p ) / Ln
Shockley model
diff
J tot  J diff
p ( xn )  J n (  x p )
majority J ndiff  J ndrift
drift
majority J diff

J
p
p
J tot
minority J diff
p
minority J ndiff
 xp
xn
x
No SCR generation/recombination
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(c) Total current density:
• Total current equals the sum of the minority carrier diffusion currents defined at the edges of the SCR:
I tot 
I
diff
diff
I p ( xn )  I n (  x p )

Ge Si GaAs

 D p pn 0 Dn n p 0  V / V
 e T 1
 qA

 L

L
p
n 

• Reverse saturation current IS:
 D p pn 0 Dn n p 0 
 Dp

D
2
n
  qAni 

I s  qA


 L

L N

L
L
N
p
n 
n A

 p D
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
V
(d) Origin of the current flow:
Reverse bias:
Forward bias:
W
EC
Ln
qVbi  V 
qV
E Fp
EC
E Fn
qV
qVbi  V 
E Fp
EV
E Fn
EV
Lp
W
Reverse saturation current is
due to minority carriers being
collected over a distance on the
order of the diffusion length.
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(e) Majority carriers current:
• Consider a forward-biased diode under low-level injection
conditions:
Quasi-neutrality requires:
nn (x )
nn 0

nn ( x )  pn ( x )
This leads to:
pn (x )
pn 0
x
xn
J ndiff ( x )
Dn diff

J p ( x)
Dp
• Total hole current in the quasi-neutral regions:
tot
J p ( x)

diff
J p ( x) 
drift
J p ( x)

diff
J p ( x)
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Electron drift current in the quasi-neutral region:
J ndiff ( x )
 Dn
 diff
1


 J tot 
 1 J p ( x ), E ( x ) 
J ndiff ( x )
D

qn( x )m n
p


J ndrift (x )
J tot
J ntot ( x )  J ndiff ( x )  J ndrift ( x )
J ndiff ( x )  J diff
p ( x)
J diff
p (x )
x
J ndiff (x )
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(f) Limitations of the Shockley model:
• The simplified Shockley model accurately describes IVcharacteristics of Ge diodes at low current densities.
• For Si and Ge diodes, one needs to take into account
several important non-ideal effects, such as:
 Generation and recombination of carriers within the
depletion region.
 Series resistance effects due to voltage drop in the
quasi-neutral regions.
 Junction breakdown at large reverse biases due to tun-
neling and impact ionization effects.
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
3. Non-Idealities in PN-junctions:
(A) Generation and Recombination Currents
J scr
 Continuity equation for holes:
p
1 J p

 Gp  Rp
t
q x
 Steady-state and no light genera-
tion process: p t  0 , G p  0
• Space-charge region recombination current:
xn
xn
xp
xp
 dJ p ( x ) J p ( xn )  J p (  x p )   q  R p dx
xn
J scr  q  R p dx
xp
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
Reverse-bias conditions:
• Concentrations n and p are negligible in the depletion
region:
 ni2
ni
 Et  Ei 
 Ei  Et 
   n exp

R
  ,  g   p exp
 p n1   n p1
g
 k BT 
 k BT 
Generation lifetime
• Space-charge region current is actually generation current:
J scr   J gen
qniW
qniW

 J gen 
 Vbi  V
g
g
• Total reverse-saturation current:

V / VT
J  Js e


 1  J scr    J s  J gen
V VT

EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Generation current dominates when ni is small, which is
always the case for Si and GaAs diodes.
I (log-scale)
AJ s
V (log-scale)
AJ gen
IV-characteristics
under reverse bias conditions
EC
E Fp
EV
E Fn
W
Generated carriers are
swept away from the
depletion region.
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
Forward-bias conditions:
• Concentrations n and p are large in the depletion region:
np
2 V / VT
 ni e

V /V

ni2 e T  1
R
 p n  n1    n  p  p1 
• Condition for maximum recombination rate:
V / 2VT
Recombination lifetime
n  p  ni e
V /V
ni2 e T
ni V / 2VT
Rmax 

e
,  rec   p   n
n p  p n  rec
• Estimate of the recombination current:
max
J scr
qniW V / 2VT

e
 rec
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Exact expression for the recombination current:
J scr
qni  V / 2VT

1
qN D 2Vbin  V 

e
, 
VT
, Enp 
rec
2
Enp
k s 0
• Corrections to the model:
J scr
qni  V / mrVT

e
 rec
• Total forward current:

V / VT
J  Js e



qni  V / mrVT
V / VT
1 
e
 J s,eff e
1
 rec
  ideality factor. Deviations of  from unity represent
an important measure for the recombination current.
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Importance of recombination effects:
Low voltages, small ni  recombination current dominates
Large voltages  diffusion current dominates
log(I)
AJ scr
AJ
V
AJ d
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(B) Breakdown Mechanisms
• Junction breakdown can be due to:
 tunneling breakdown
 avalanche breakdown
• One can determine which mechanism is responsible for the
breakdown based on the value of the breakdown voltage
VBD :
 VBD < 4Eg/q  tunneling breakdown
 VBD > 6Eg/q  avalanche breakdown
 4Eg/q < VBD < 6Eg/q  both tunneling and
avalanche mechanisms are responsible
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
Tunneling breakdown:
• Tunneling breakdown occurs in heavily-doped pnjunctions in which the depletion region width W is about
10 nm.
Zero-bias band diagram:
EF
EC
W
EV
Forward-bias band diagram:
EFn
EFp
EC
EV
W
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Tunneling current (obtained by
using WKB approximation):
Reverse-bias band diagram:
* 3/ 2 

4
2
m
Eg 
2m q FcrVA

It 
exp 
2 2 1/ 2

3qFcr 
4  E g


* 3
EF
p
EFn
EC
EV
Fcr  average electric field in
the junction
• The critical voltage for
tunneling breakdown, VBR, is
estimated from:
I t (VBR )  10I S
• With T, Eg and It .
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
Avalanche breakdown:
• Most important mechanism in junction breakdown, i.e. it
imposes an upper limit on the reverse bias for most diodes.
• Impact ionization is characterized by ionization rates an and
ap, defined as probabilities for impact ionization per unit
length, i.e. how many electron-hole pairs have been
generated per particle per unit length:

Ei 

ai  exp 
 qlFcr 
- Ei  critical energy for impact ionization to occur
- Fcr  critical electric field
- l  mean-free path for carriers
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
Avalanche mechanism:
EF
p
EFn
EC
EV
Generation of the excess electron-hole
pairs is due to impact ionization.
Expanded view of the
depletion region
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Description of the avalanche process:
Jn
J p  an J n dx
dx
J n  an J n dx
Jp
Impact ionization initiated by electrons.
Jn
J p  a p J p dx
dx
J n  a p J p dx
Jp
Impact ionization initiated by holes.
dJ p
dJ n
 0,
0
dx
dx
dJ p
dJ n
dx
dx

J  J n  J p  const.
Multiplication factors for
electrons and holes:
J p (0)
J n (W )
Mn 
, Mp 
J n (0)
J p (W )
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Breakdown voltage  voltage for which the multiplication
rates Mn and Mp become infinite. For this purpose, one
needs to express Mn and Mp in terms of an and ap:
x

  an  a p dx '
W
1
1 
0
 dJ n

a
e
dx


a
J

a
J
n
 M
n n
p p
 dx
0
n

 dJ

x
  an  a p dx '
W
 p  an J n  a p J p

1
 dx
  a pe 0
dx
1 
 M p 0
The breakdown condition does not depend on which
type of carrier initiated the process.
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Limiting cases:
(a) an=ap (semiconductor with equal ionization rates):
W

1
1
 1  M   a n dx  M n  W
0
n

1   a n dx

0

W
1
1
1 
  a p dx  M p  W
 Mp 0
1   a p dx


0
(b) an>>ap (impact ionization dominated by one carrier):
W
 an dx
Mn  e 0
W
 1   an dx
0
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
Breakdown voltages:
• For one sided junction we can make
the following approximation:
(a) Step p+n-junction
p
W  Wn  W p  Wn

• Voltage drop across the depletion
region on the n-side:
n
 Wp
 Fmax
1
1
Vn  FmaxWn  VBD  FmaxW
2
2
Wn
• Maximum electric field:
k s 0 2
qN DW
Fmax 
 VBD 
Fmax
k s 0
2qN D
• Empirical expression for the
breakdown voltage VBD:
 F (x )
x
VBD
 Eg 

 60
 1.1 
3/ 2
 ND 
 16 
 10 
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
 kV 
 cm 
(b) Step p+-n-n+ junction
• Extension of the n-layer large:
p

n
n
VBD

1
 FmaxWm
2
• Extension of the n-layer small:
 Wp
 Fmax
1
1
VP  FmaxWm  F1 Wm  W1 
2
2
W1 Wm
 F (x )
• Final expression for the punchthrough voltage VP:
 F1
x
W1 
W1 
 2 

VP  VBD
Wm  Wm 
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(4) AC-Analysis and Diode Switching
(a) Diffusion capacitance and small-signal equivalent
circuit
• This is capacitance related to the change of the minority
carriers. It is important (even becomes dominant) under
forward bias conditions.
• The diffusion capacitance is obtained from the device
impedance, and using the continuity equation for minority
carriers:
dp
d 2 p
p
n
dt
 Dp
n
dx
2

n
p
• Applied voltages, currents and solution for pn:
V (t )  V0  V1eit , V1  V0
it
J (t )  J 0  J 1e , J 1  J 0
pn ( x, t )  pns ( x )  pn1 ( x )e
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
it
• Equation for pn1(x):
d 2 pn1 1  i p
d 2 pn1 pn1 ( x )

pn1 ( x )  0 
 2 0
2
2
Dp p
dx
dx
L p'
• Boundary conditions:
pn (, t )  pn 0  pn1 ()  0
 V0  V1eit 
pn 0V1
 V0 


pn (0, t )  pn 0 exp
 pn1 (0) 
exp 


V
VT
 VT 
T


• Final expression for pn1(x):
 x 
pn 0V1
 V0 

pn1 ( x, t ) 
exp  exp 


VT
V
L
 T
p' 

EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Small-signal hole current:
AqD p pn 0V1
dpn1
 V0 
I1   AqD p

1  i p exp   YV1
dx x 0
L pVT
 VT 
• Low-frequency limit for the admittance Y:
Y
AqD p pn 0
L pVT
 V0  1
exp 1  i p   Gd  iCdif

 VT  2
 V0  I s eV0 / VT
I
dI
Gd 
exp  


, I  Forward current
L pVT
VT
VT dV
 VT 
 V0  1 I
1 AqD p pn0
Cdif 
 p exp  
p
2 L pVT
 VT  2 VT
AqD p pn0
• RC-constant:
Rd Cdif 
p
2
The characteristic time constant is on
the order of the minority carriers lifetime.
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Equivalent circuit model for forward bias:
Cdepl
Rs
Cdif
Rd 
• Bias dependence:
Ls
1
Gd
C
Cdif
Cdepl
Va
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
(b) Diode switching
• For switching applications, the transition from forward bias
to reverse bias must be nearly abrupt and the transit time
short.
• Diode turn-on and turn-off characteristics can be obtained
from the solution of the continuity equations:
dpn
1
1 J p pn
1D
    J p  R p  

dt
q
q x
p

dQ p
Qp
dQ p Q p
 I p (t ) 
 I (t )  I p (t ) 

dt
p
dt
p
Qp(t) = excess hole charge
Valid for p+n diode
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
Diode turn-on:
• For t<0, the switch is open, and
the excess hole charge is:
p+

Q p ( t  0)  Q p ( 0 )  0
• At t=0, the switch closes, and
we have the following boundary
condition:
t=0
IF
Q p (0  )  Q p (0  )  0
• Final expression for the excess hole charge:
Q p (t )  A  Be
t /  p
t /  p 

 pIF 1 e


EEE 531: Semiconductor Device Theory I – Dragica Vasileska
n
• Graphical representation:
Q p (t )
pn ( x, t )
pIF
Slope almost constant
t increasing
pn 0
x
t
• Steady state value for the bias across the diode:

Va / VT
pn ( x )  pn 0 e

 IF 
Va  VT ln 1  
IS 


1 e
 x / Lp

Va / VT
 Q p  Aqpn 0 L p e
EEE 531: Semiconductor Device Theory I – Dragica Vasileska

1
Diode turn-off:
• For t<0, the switch is in position
1, and a steady-state situation is
established:
VF
IF 
R
p+
t=0
1
• At t=0, the switch is moved to
position 2, and up until time t=t1
we have:
VF
R
2
VR
R
pn (0, t )  pn 0  Va  0
• The current through the diode
until time t1 is:
VR
IR  
R
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
n
• To solve exactly this problem and find diode switching
time, is a rather difficult task. To simplify the problem, we
make the crucial assumption that IR remains constant even
beyond t1.
• The differential equation to be solved and the initial
condition are, thus, of the form:
 IR 
dQ p
dt

Qp
p
, Q p (0  )  Q p (0  )   p I F
• This gives the following final solution:
Q p (t )   p I R   p I F  I R e
t /  p
• Diode switching time:
Q p (trr )  0  trr
 IF 
  p ln 1  
 IR 
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
• Graphical representation:
Va (t )
pn ( x, t )
t
Slope almost
constant
t=0
pn 0
 VR
t=ts
ttrr
ts  switching time
trr  reverse recovery time
IF
x
 0.1I R
ts
 IR
EEE 531: Semiconductor Device Theory I – Dragica Vasileska
trr
t