Download 232ICfab-lecture

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts
no text concepts found
Transcript
Lecture on Integrated Circuits (ICs)
History
• 19th Century - Solid-State Rectifiers
• 1907 - Application of Crystal Detector in Radio
Sets
• 1947 - BJT Constructed by Bardeen and Brattain
• 1959 – Integrated Circuit Constructed by Kilby
• Complexity grows by Moore’s Law
In 1965, Gordon Moore predicted that the number
of transistors that can be integrated on a die would
double every 18 to 14 months .
Moore’s Law in Microprocessors
1000
2X growth in 1.96 years!
Transistors (MT)
100
10
486
1
386
286
0.1
0.01
P6
Pentium® proc
8086
8080
8008
4004
8085
0.001
1970
1980
1990
2000
2010
DRAM Chip Capacity
human memory
100000000
64,000,000
0.07 m
4X growth every 3 years!
16,000,000
10000000
0.1 m
Kbit capacity/chip
4,000,000
0.13 m
1000000
1,000,000
book
256,000
100000
0.35-0.4 m
64,000
16,000
10000
4,000
1000
0.18-0.25 m
encyclopedia
0.5-0.6 m
0.7-0.8 m
1.0-1.2 m
1,000
1.6-2.4 m
256
100
64
page
10
1980
1983
1986
1989
1992
1995
Year
1998
2001
2004
2007
2010
Resolution of Features of ICs
0.1
0.25
0.5
1.0
2.0
Chip technology described by the
dimensions of line width and typical
transistor size. Today, the chip
resolution is around 50 nano meters, or
0.05 micron.
IC Design and Manufacturing Process
Intellectual
Properties
Back-End Manufacturing
• Bonding
• Packaging
• Test equipment
Packages
Circuit Design
by Tools
Mask Design
Front-End Manufacturing
• Process Auto
• Lithography
• Etch/Doping
• Diffusion
• Deposition
Wafers
Power
Verification
Extraction
Physical Verification
Mixed Signal / Analog
Mask Synthesis / OPC
Languages
Assertions and Testbenches
Physical Implementation
Verification IP
Design Planning
Architecture Design
Design Database
Test
Synthesis
IP
Timing and Signal Integrity
Physical
IC Design Tasks
Silicon Crystal – Better than Gold
• Quartz, or Silica, consists of Silicon Dioxide
• Sand contains many tiny grains of quartz
• Silicon can be artificially produced by combining
silica and carbon in electric furnace
• Practical integrated circuits can only be fabricated
from single-crystal material
Crystal Growth
• Solid seed crystal is rotated and slowly extracted from a
pool of molten Si
• Requires careful control to give crystals desired purity and
dimensions
Ingot
Getting Wafers from Ingot
• Sliced by diamond-tipped saw into thin wafers
• Etch wafers in chemical to remove any unwanted
• Smooth surface
Photolithography
Photolithography is a technique that is used to define
the shape of micro-machined structures on a wafer.
Lithography Machine
• Make “mask” defining electrical circuitry.
• Coat wafer with “photoresist” (sensitive to UV light)
where the mask is not present.
UV light
reduction lens
Wafer
Stop
Start
Oxidation of Silicon (SiO2)
• Thick ( 1µm) oxides are used as insulation
• Etching: Process where unwanted areas of films are
removed by either dissolving them in a wet chemical
solution. Wanted areas are protected by resist.
• Doping: Process where certain material is implanted into
substrate.
Clean Room
• First used for surgery room to avoid bacteria
contamination
• Adopted in semiconductor industry in 1950
• Smaller device needs higher grade clean room
• Less particle, more expensive to build
– Class 10: less than 10 particles with diameter larger than
0.5 m per cubic foot
– Class 1: less than 1 such particles per cubic foot.
– 0.18 m device require higher than Class 1 grade clean
room.
Effect of Particles
Particle on
Mask
Film
Substrate
Cleanroom Structure
Makeup Air
Makeup Air
Fans
Equipment Area
Class 1000
Process
Tool
Equipment Area
Class 1000
HEPA Filter
Class 1
Process
Tool
Process Area
Return Air
Raised Floor with
Grid Panels
Pump, RF
and etc.
Wafer with Circuit Fabricated
Bonding Pad Configurations
Peripheral Bonding Pads
Area Array Bonding Pads
Pads Range from 125 m x 125 m
down to 25 m x 25 m
Package Types
Dual In Line
Package (DIP)
Ball Grid Array (BGA)
Single In Line
Package (SIP)
Zig Zag In Line
Package (ZIP)
Small Outline Transistor (SOY)
Quad Flat Pack a(DIP)
Pin Grid Array (PGA)
Ball Grid Array Solder
Gold Wire Bonding
Assembled IC
Ball Grid Array (BGA) Package
Using ICs on Circuit Board
Surface mount
Tombstone
Dead-bug
Via hole mount
Wave Soldering
IC
PCB
What’s Next?
Who Work in IC Industry?
•
•
•
•
•
•
•
•
•
•
Mechanical engineers
Chemical engineers
Electrical engineers
Systems engineers
Civil engineers
Physicists
Chemists
Material Scientists
Mathematicians
Well, lawyers, finance majors, etc. too.
Good Luck and God Bless!!