Download SINGLE PHASE CURRENT SOURCE INVERTER (C.S.I)

Power Electronics Laboratory
SINGLE PHASE CURRENT SOURCE INVERTER (C.S.I)
OBJECT:
• To study the gate firing pulses.
• To observe and measure the voltages across the Thyristors and across the Load
for a current source Inverter (CSI).
• To study the effect of the isolating diodes.
• To study the effect of the commutating inductance L.
• Study of a voltage source inverter (V.S.I).
APPARATUS:
1. Experimental setup.
2. D.C regulated Power supply.
3. Oscilloscope.
4. Volt meter MC - 60V, MC Ammeter 0 - 3 Amps., Volt meter MI – 60V,
MI – Ammeter 0 – 3 Amps.
5. A single phase variac or a variable inductance, 50Ω rheostat.
Study of gate firing pulses.
PROCEDURE:
1. Switch on power to the trigger circuit only.
/
2. Clip on ground leads of probes to cathodes of Th1 and Th1 ‘Live’ leads are to be
connected to the respective gates. Observe the details of the firing pulses.
/
3. Shift probe s from Th1 to Th2 . Observe and measure the details of the pulse and
their relative timings.
/
4. Repeat (3) with Th1 and Th 2 . Switch the firing pulses to all the SCRs. Indicating
their relative timings. Remove all probes.
Observation of load and thyristor voltages (for a Cuircuit Source Inverter (C.S.I)
1. Connect a resistive load (50Ω, 4.1 Amp.) on the load. Switch on trigger circuit.
Next switch on DC supply to power circuit (about 30V). (If the circuit performs
properly a low buzz will be heard from the DC line chowk).
2. Clip ground lead of oscilloscope to X and the two line leads to Y and Z. Trace *1
gives load voltage and trace *2 the voltage across the Thyristor Th1 .
3. Switch both the waveform in details.
4. Adjust oscilloscope concentrate on the turn – off time offered by the circuit. Th1
(mainly adjust time base and triggering of oscilloscope).
5. Vary load resistance and measure input current, load current, input voltage output
dv
voltage and turn – off time ' t q 's ' and
of reapplied forward voltage.
dt
6. Repeat B1 and B5 with an inductance in series with the load.
Study of effect of Isolating diodes
1. Connect the isolating diodes as shown in fig. 2.
2. Connect a resistive load (50Ω) and repeat B5. Observe also the voltage across the
commutation Capacitor C1 and C2 . Compare ‘t’ of B-5 & C-2 the equal value of
DC supply voltage and load resistance.
3. Repeat B-6.
To study the off – set of the commutation inductance
1. Connect a variable inductance ‘L’ in series with the DC. Supply voltage, 0.1 ohm
‘shunt’ is connected in series. Connect the Power circuit as in Fig. 1.
dv
2. With load resistance and DC supply voltage kept constant observe t q and
for
dt
dv
. (Ground leads of
various values of the inductance. Tabulate t q Vs
dt
oscilloscope probes are connected to Z and Live1 to P and Live2 to X to
simultaneously observe the two quantities).
Study of a Voltage source Inverter (VSI)
1. Connect up power circuit as per fig. 3. The load is the 50Ω resistance.
2. Observe voltage waveform across the capacitors, the load resistance and the
thyristor. Note dv/dt of reapplied forward voltage.
3. Measure di/dt through any of the thyristors by connecting the 0.1 ohm in series
with it and observing voltage waveform across it.
Questions:
1. Why do the firing pulse at the gate of the thyristor change their shape and
amplitude when the thyristor conducts?
2. Why does the load voltage increase when the load is reduced?
3. What is the relationship between the triggering period ‘T’ and the R-C time
constant it the maximum voltage across the capacitor (C.S.I.) is twice the supply
voltage?
di dv
4. Compare the
ratings of the thyristors in similarly rated C.S.I. and V.S.I.
,
dt dt
Experiment No.12: Study Of Single Phase ASCI Current Source Inverter
Fig.1:
Suppose initially load current was flowing through Th2’, D2’, D2 and Th2.i.e
.
Here we have assumed vL is remaining constant at vL0 in the commutation period. As the
load is of lagging power factor vL0 is negative. Now Th1 and Th1’ are triggered. For
making those on C1 and C2 should have the polarity shown below.
Fig.2:
As soon as Th1 and Th1’ are on negative voltage will come across Th2 and Th2’. So
these will stop conducting.
Mode I
Fig.3:
Current will follow this path until D1 and D1’ are forward biased. Capacitor voltage will
decrease linearly as discharge current is constant.
Here
as
and
diodes will start conducting.
Mode II
Fig.4:
as it was conducting. When
then all for
Here C1 and C2 are connected in parallel fashion. Hence
;
and
; as C1=C2.Now,
From these two equations we get,
By solving this we have,
When
current starts flowing through Th1’, D1’, D1 and Th1.Capacitor voltage
remains fixed at that value.
Fig.5:
Resistive load:
Fig.6:
1. Connect the circuit as shown above.
2. Check the current waveforms through the load and C1 and voltage
waveform across C1. Study the waveforms during commutation period.
Here mode I is absent.
3. During commutation period:
Fig.7:
Here,
From these two equations we get,
By solving this we get,
Fig.8:
R-L load:
1. Connect inductance in series with the R load.
2. Check the waveforms stated above. Commutation time will increase in
this case.
Mode I
Fig.9:
When
Mode II
Fig.10:
then four diodes will start conducting.
Here,