Download loss-free resistor-based power factor correction using a

LOSS-FREE RESISTOR-BASED POWER FACTOR CORRECTION
USING A SEMI-BRIDGELESS BOOST RECTIFIER IN SLIDING-MODE
CONTROL
ABSTRACT:
In this paper, a loss-free resistor based on a semi bridgeless rectifier is
proposed for power factor correction applications. This particular bridgeless
rectifier type is composed of two different boost cells which operate
complementarily during each half-line cycle. In case of two unbalanced inductors,
many control techniques can produce different inductor current ripples during each
half-line cycle that can result in the addition of a dc component to the line current.
This paper demonstrates that the application of sliding-mode controled by means
of hysteretic controllers results in a first-order stable system that can mitigate these
harmful consequences due to its capability to ensure the symmetry of the line input
current waveform for both positive and negative half-line cycles. Thus, the system
does not absorb any dc component from the grid and it is also capable of reducing
dramatically the amplitude of the third harmonic. The theoretical predictions have
been validated by means of PSIM simulations and experimentally on a prototype
of 1 kW which has been controlled using only one sliding control surface.
INTRODUCTION:
Power factor correction (PFC) is one of the most active research lines in the field
of power processing because electronic equipment must guarantee the compliance
of standard regulations.
For the last 20 years, many power dc–dc converters have been proposed for PFC
applications. The solution is not unique but it usually becomes a tradeoff between
cost and quality of the line current waveform.
The most popular PFC active power circuit consists of a boost converter connected
to the grid by a diode bridge rectifier, because of its main advantages: grounded
transistor, simplicity, and high efficiency. However, the main drawback of this
topology is the use of an input diode bridge that produces the largest share of the
total losses.
The need for a higher efficiency from the PFC stage has led circuit designers to
develop lower power losses alternatives which avoid the use of the diode bridge,
known as bridgeless topologies. Several boost-based bridgeless PFC converters are
evaluated in terms of number of components, power factor (PF), efficiency and
power losses. A performance evaluation of bridgeless boost-based rectifiers is
presented
EXISTING SYSTEM:
Compared to the conventional PFC boost converter, one diode is eliminated
from the line-current path, so that the line current only flows through two
semiconductors and, therefore, conduction losses are reduced. When the AC input
voltage goes positive, the gate of S1 is driven high and current flows from the
input through the inductor LB, storing energy. When S1 turns off, energy stored in
the inductor gets discharged and the current flows through diode D1, through the
load and returns through the body diode of switch S2. During the negative half
cycle, switch S2 is operated. When switch S2 turns on, current flows through the
inductor, storing energy. When S2 turns off, energy stored in inductor is released
and the current flows through D2, through the load and back to the mains through
the body diode of switch S1. Thus, in each half line cycle, one of the MOSFET
operates as an active switch and the other one operates as a diode. The difference
between the bridgeless PFC and conventional PFC is that in bridgeless PFC
converter the inductor current flows through only two semiconductor devices, but
in conventional PFC circuit the inductor current flows through three semiconductor
devices.
PROPOSED SYSTEM:
A modification of the basic bridgeless PFC boost rectifier by means of the
addition of two slow recovery diodes (DA, DB) and a second inductor (L2), this
resulting in two dc–dc boost circuits, one for each half-line cycle. This topology,
known as semi-bridgeless boost rectifier or dual-boost rectifier, is a more suitable
solution for practical implementation than the basic bridgeless topology in terms of
sensing the input voltage and current variables. Basically, the semi-bridgeless
rectifier is configured by two different boost converters, with an extra diode for
each boost, that operate during each half-line cycle. Therefore, the two active
switches can be controlled independently by the same control signal or other gating
techniques. It has been seen that a synchronous rectification only contributes to
decrease power losses in low power cases but this improvement is lost when the
on-state resistance increments as a consequence of temperature rise-up of the
MOSFET
ADVANTAGES:
 Less conduction losses.
BLOCK DIAGRAM:
TOOLS AND SOFTWARE USED:
 MPLAB – microcontroller programming.
 ORCAD – circuit layout.
 MATLAB/Simulink – Simulation
CONCLUSION:
In this paper, an LFR based on a semi-bridgeless boost rectifier has been
synthesized using SMC with only one sliding control surface that uses the
continuous-time signal of the input current sensed by a Hall effect sensor. The
application of SMC ensures the whole system stability at the same time that
reduces the order of the system to a first-order system. Moreover, it has been
demonstrated that the implementation of SMC by means of hysteretic comparators
is capable of mitigating the harmful consequences of having two unbalanced
inductors, i.e., different current ripples for each half-line cycle and the injection of
a dc component to the absorbed line current. It has been also seen that the
implementation of SMC results in the reduction of the third harmonic amplitude.
REFERENCES:
[1] Limits for Harmonic Current Emissions (Equipment Input Current _16 A Per
Phase), IEC 61000-3-2, Part 3–2, 2005.
[2] M. Matsuo, K. Matsui, L. Yamamoto, and F. Ueda, “A comparison of various
DC-DC converters and their application to power factor correction,” in Proc. 26th
Annu. Conf. IEEE Ind. Electron. Soc., vol. 2, 2000, pp. 1007–1013.
[3] O. Garcia, J. A. Cobos, R. Prieto, P. Alou, and J. Uceda, “Single phase power
factor correction: A survey,” IEEE Trans. Power Electron., vol. 18, no. 3, pp. 749–
755, May 2003.
[4] F.Musavi,W. Eberle, andW.G.Dunford, “Efficiency evaluation of singlephase
solutions for AC-DC PFC boost converters for plug-in-hybrid electric vehicle
battery chargers,” in Proc. IEEE Veh. Power Propulsion Conf., 2010, pp. 1–6.
[5] F. Musavi, M. Edington, W. Eberle, and W. G. Dunford, “Evaluation and
efficiency comparison of front end AC-DC plug-in hybrid charger topologies,”
IEEE Trans. Smart Grid, vol. 3, no. 1, pp. 413–421, Mar. 2012.