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Microprocessors
Q 1.Fill in the blanks:
1. A Microprocessor only understands ________.
(1 marks x 10)
2. The microprocessor is constructed on a single __________ circuit
3. A ____________semiconductor memory have both Read and Write capabilities.
4. Accumulator stores the _______________.
5. Interrupts are used in _________________.
6. __________ converts an Assembly language program into Binary Code.
7. Nand and ____________are universal gates.
8. ALU stands for ____________________.
9. 8085 is a _________ bit microprocessor.
10. Instruction CLA is used to __________ Accumulator.
11. A flip flop stores only __________________bit of data.
12. An 8 bit register is a combination of 8___________.
13. IC=____+ EC.
14. Address Bus is a ____ -directional Bus.
15. The address bus in 8085 microprocessor has _______________address lines.
16. A register is a string of devices that ______________ data.
17. The program must be coded in ________ before it goes into computer.
18. Memory devices provide a mean of ___________ binary numbers.
19. The binary no 1010 equals _____in decimal.
20. The decimal number 39 equals____________ in binary.
21. ______ is an instruction used to end an assembly language program.
22. ___________ status flag is used to show the sign of the result.
23. 8085 requires __________ supply to work.
24. Serial In Data pin is used to get serial data from serial _________.
25. _________ command is used to jump if the result is not Zero.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
MACHINE CODES
INTEGRATED
RAM
RESULT
MICROPROCESSOR
ASSEMBLER
NOR
AIRTHMETIC & LOGIC UNIT
8-BIT
CLEAR
ONE
8 STORAGE LOCATIONS
FC
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
UNI
16
STORES
BINARY LANGUAGE
STORING
10
100111
HLT
Sign
+5v
Input devices
JNZ
1 of 2
26. Q 2.True or false
(1 marks x 10)
1. The base of octal number system is 16.
2. A microcontroller has CPU, RAM & ROM on a single chip.
3. A 16:1 multiplexer IC has 16 inputs, one output and four control signals.
4. The base of octal number system is 2.
5. If both the inputs are 1 in case of OR gate then the output is 0.
6. A Latch is a memory element.
7. 8085 Microprocessor contains six 8-bit GPR’s.
8. Base of Hex decimal no. System is 16.
9. 8085 is a 16–bit general-purpose microprocessor.
10. Register B & D can be used to form a B-D register pair.
11. HLT instruction is used to start an Assembly language program.
12. A register pair can be used to store 16-bit Data.
13. Parity is a status flag used in 8085.
14. Two’s complement of 110101 is 001011
15. Accumulator is used to store 8-bit data.
16. RAM is read only memory.
17. MVI is a data transfer group instruction.
18. In 8085 we have 32-bit address bus.
19. SIM instruction is 1 byte instruction.
20. Instruction register is used to store instruction before decoding.
21. The base of a binary number is 2.
22. A latch is a type of flip flop without a clock pulse.
23. Cache memory increases the speed of processing.
24. An 8085 is a microprocessor that has RAM and ROM available on the chip itself.
25. 8051 is a 16- bit microcontroller.
1.
2.
3.
4.
5.
FALSE
TRUE
TRUE
FALSE
FALSE
6.
7.
8.
9.
10.
TRUE
TRUE
TRUE
FALSE
FALSE
11.
12.
13.
14.
15.
FALSE
TRUE
TRUE
TRUE
TRUE
Q 3.Multiple Choice Questions
16.
17.
18.
19.
20.
FALSE
TRUE
FALSE
TRUE
TRUE
21.
22.
23.
24.
25.
TRUE
TRUE
TRUE
FALSE
FALSE
(1 marks x 10)
1. One Byte is equal to
A. 1 bit
B. 2 bits
C. 8 bits
D. 4 bits
2. The binary equivalent of decimal number 175 is
A. 111101012
B. 111000102
C. 101011112
D. 101010102
3. The gate in which if both the inputs are same output is 0 and if both are different output is 1 is an
A. OR gate
B. XOR gate
4. In microprocessors PC stands for
A. Program Counter
B. Pre Counter
C.
D.
NOT gate
AND gate
C. Post counter
D. Personal computer
5. SRAM stands for
2 of 2
A. Static RAM
B. Small RAM
C. Slow RAM
D. Single RAM
6. A memory chip has 16 address and 8 data lines then the no. of locations on which 8 bit data can be stored
is
A. 216
B. 28
C. 162
D. 82
7. TTL is
A. Totem Transistor Logic
B. Transistor Diode Logic
C. Transistor transistor logic
D. Transistor Telephone Logic
8. Which of the following is not a interrupt of 8085 microprocessor
A.
B.
TRAP
RST 9.5
9. AND gate output is given by
A.
B.
A+B
A/B
C. RST 7.5
D. RST 5.5
C. A.B
D. A-B
10. A.B.C.D. output can be achieved with the help of
A. AND
B. NOR
C. NAND
D. All
11. A half adder is used to
A. Add 2 binary digits & to produce a carry.
B. Add three binary digits.
C. Both A and B
D. None
12. A full adder performs addition on
A. Two bits
B. Three bits
C. Four bits
D. None
13. The number system with BASE two is known as?
A. Binary no. system
B. Octal no. system
14. The full form of RTL is
A. Resistor transistor logic
B. Both are true
C. Hexa no. system
D. Decimal no system
C. Resistor transformer logic
D. None
15. The parity of the binary number 110011
A. Even
B. Float
C. Odd
D. None
16. A CPU does not contain
A. Main Storage
B. Special purpose registers
C. Arithmetic unit
D. None of these
17. A single binary digit is called
A. Byte
B. Logic
C. bit
D. data
18. In Microprocessor architecture, flag indicates
A. Data condition
C. Status of the result of the arithmetic operation
B. Logic condition
D. Status of the PC.
19. Data bus in 8086 is
A. 8 bit
B. 24 bit
C. 16 bit
D. 32 bit
20. One nibble is equal to
A. 1 bit
B. 2 bits
C. 8 bits
D.4 bits
21. An encoder converts decimal numbers into
A. Hexadecimal
C. Octal
3 of 2
B. Binary
D. Gray code
22. Which of the following is not a characteristics of logic families
A. Fan out
C. Power dissipation
B. Propagation delay
D. Reactance
23. 8086 microprocessor has
A. 16 address and 8 data lines
B. 20 address and 16 data lines
C. 8 address and 16 data lines
D. 16 address and 20 data lines
24. Stack is
A. FIFO
B. FOFI
C. LIFO
D. LILO
25. HLT instruction is used to
A. Start
B. Stop
C. No operation
D. None of above
26. Which of this is not a Register in 8085
A. A
B. B
C. H
D. G
27. Which is not a bus
A. Address
B. Logic
C. Data
D. Control
28. Local frequency of 8085
A. 3MHZ
B. 10MHZ
C. 2GHZ
D. 2.6GHZ
29. Which of these is a hardware interrupt signal
A. RST
B. RST 6.5
C. INTA
D. INT 6.5
30. GROUP OF WIRES ARE CALLED
A. PATH
B. DATA
C. BUS
D. SIGNAL
31. 8085 IS A ____BIT MICROPROCESSOR
A. 4
B. 8
C. 12
D. 16
32. OP CODE IS
A. OPERATOR CODE
B. OPERATION CODING
C. OPERATION CODE
D. OPRAND CODE
33. THERE ARE__________FLAGS IN 8085
A. 5
B. 10
C. 2
D. NONE
34. WHICH OF THESE IS/ARE ADRESSING MODES OF 8085
A. DIRECT
B. INDIRECT
C. NONE OF THESE
D. BOTH A,B
35. _________ IS NON MASKABLE INTRRUPT IN 8085
A. RST 7.5
B. TRAP
C. RST 6.5
D. RST 5.5
36. SIZE OF ADDRESS BUS IN 8085
A. 16-BIT
B. 20-BIT
C. 22-BIT
D. 24-BIT
37. HOW MANY PINS ARE THERE IN 8085
A. 20
B. 30
C. 40
D. 50
4 of 2
38. WHICH OF THESE IS NOT AN AIRTHMETIC INSTRUCTION
A. ADD B
B. SUB B
C. AND B
D. NONE OF THESE
39. WHICH OF THESE IS NOT AN LOGICAL INSTRUCTION
A. XOR B
B. ORA B
C. INR B
D. AND B
40. TO COMPLEMENT CONTENTS OF ACCUMULTOR THE COMMAND IS
A. CMA
C. RAR
B. CLA
D. RAL
41. TO STORE RESULT OF ACCUMULTOR IN MEMORY THE INSTRUCTION IS
A. LDA <addr>
C. MOV A,M
B. STA <addr>
D. MVI A 05H
42. TO ROTATE ACCUMULTOR LEFT THROUGH CARRY THE COMMAND IS
A. RRC
C. RAR
B. RAL
D. RLC
43. COMMAND TO ROTATE ACCUMULTOR RIGHT WITHOUT CARRY IS
A. RRC
C. RAR
B. RAL
D. RLC
44. PIN NO.40 IN 8085 IS LABELED AS
A. VCC
B. INTA
C. INTR
D. VSS
45. PIN NO. 1 OF 8085 IS
A. S0
B. S1
46. Adressing modes supported by 8085 are
A. Direct
B. Indirect
C. X1
D. X2
C. Implicit
D. All of Above.
47. Instructions of 8085 Microprocessor can be
A. Data Transfer
B. Logical
C. Both A & B.
D. None of Above.
48. Data Bus of 8085 Microprocessor is pin no.
A. 12 to 19
B. 4 & 5
C. 21 To 28
D. 12 to 28
49. To perform a write operation 8085 microprocessor sets the write signal to
A. High
C. Both A & B.
B. Low
D. None of above.
50. Microprocessor 8085 contains
A. General Purpose Register
B. ALU
1.
2.
3.
4.
5.
6.
7.
8.
C
C
B
A
A
A
C
B
9.
10.
11.
12.
13.
14.
15.
16.
C
D
A
B
A
A
A
A
17.
18.
19.
20.
21.
22.
23.
24.
C. Timing & control
D. All of above.
C
C
C
D
B
D
B
C
25.
26.
27.
28.
29.
30.
31.
32.
B
D
B
A
B
C
B
C
33.
34.
35.
36.
37.
38.
39.
40.
A
D
B
A
C
C
C
A
41.
42.
43.
44.
45.
46.
47.
48.
B
B
A
A
C
D
C
A
49.
50.
B
D
5 of 2
Microprocessor System (Bsc-4)
6/42
Section-1
[5 Marks Questions]
Q1. What is the microprocessor?
Ans. The microprocessor is one of the main component of digital computer. It acts as a brain of the
computer. It is used to perform operation and control other devices attached to the computer. 8085 is a
Microprocessor developed by Intel. It is a one-address microprocessor. 3 MHz is the maximum clock
frequency for 8085.
Q2.
Define Register.
Ans. Registers are collection of flip-flops located with in the CPU, used to the store instructions, data and
intermediated results. These register stores small amount of data but are very fast than storage systems.
One register may store 8-bit, 16-bit data, generally. The size of register and number of register in a CPU
depends on the Architecture of CPU and may very with the CPU. Registers are generally designated by
capital letters to denote the function of Register. For e.g. MAR designates memory address Register.
Q3. What are the various registers in 8085?
Ans. Accumulator register, Temporary register, Instruction register, Stack Pointer, Program Counter,
general purpose registers (B, C, D, E, H, L) are 8-bit registers but program counter and stack pointer are
the 16 bit registers.
Q4. Calculate the address lines required for an 8K-byte(1024x8=8192 register) memory chip.
Ans. Number of address line x=log 8192/log2= 13 address lines
Q5. How many memory locations can be addressed by a microprocessor with 14 address lines?
Ans. The microprocessor with its 14 address line is capable of addressing 214= 16384 memory location.
Q6. What is Stack and stack pointer?
Ans. LIFO (Last In First Out) stack is used in 8085.In this type of Stack the last stored information can be
retrieved first. Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the
address of the top of the stack.
Q7. What is Tri-state logic?
Ans. Three Logic Levels are used and they are High, Low, High impedance state. The high and low are
normal logic levels & high impedance state is electrical open circuit conditions. Tri-state logic has a third
line called enable line.
Q8. In what way interrupts are classified in 8085?
Ans. In 8085 the interrupts are classified as Hardware and Software interrupts. There are 12 interrupts in
8085.
Hardware interrupt: - TRAP, RST7.5, RST6.5, RST5.5, and INTR.
Software interrupts. RST0, RST1, RST2, RST3, RST4, RST5, RST6, RST7.
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
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Microprocessor System (Bsc-4)
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Q9. Why crystal is a preferred clock source? Which Pins are used to connect 8085 with crystal?
Ans. Because of high stability, large Q (Quality Factor) & the frequency that doesn’t drift with aging.
Crystal is used as a clock source most of the times.
X1 & X2, pin no.1 & pin no. 2 respectively are used to connect intel 8085 microprocessor with Crystal
which is an external clock generator.
Q10.What is data-bus and address-bus?
Ans. A group of lines used to transfer bits between the microprocessor and other component of the
computer. Data bus is used to transfer data and address bus is used to transfer address.
Q11. What is register array?
Ans. This area of the microprocessor consists of various registers identified by letters such as B, C, D, E,
H and L. these registers are primarily used to store data temporarily during the execution of a program and
are accessible to the user through instructions.
Q12.What is control unit?
Ans. The control unit provides the necessary timing and control signals to all the operations in the
microprocessor. It controls the flow of the data between the microprocessor and memory and peripherals.
Q13.What is system bus? Why is the data bus bi-directional?
Ans. The system bus is a communication path between the microprocessor and peripherals. It is nothing
but a group of wires to carry bits
Data Bus transfers data between the microprocessor and the memory
And I/O attached to the system. So data is transfer in both directions from microprocessor to memory
and I/O devices. That is reason data bus is bi-directional.
Q14. Define instruction and program.
Ans. An instruction is a command given to the computer to perform a specified operation on given data.
The set of instruction is called program.
Q15. Define opcode and operand.
Ans.
Each instruction consists of following two parts:
Op-code: Op-code is the operation code. Op-code specifies the operation to be performed on the
operands. For e.g. addition, subtraction, multiplication, logical and, logical or etc. For Example:
MOV A,B (Opcode of MOV A,B is 78.)
ADI 35H
(Opcode of ADI is C6.)
Operand: Operand is that part of the instruction on which operation is to be performed. Each instruction
has one or more operands. For Example:
MOV A,B ( In this instruction A & B are operands.)
ADI 35H
(In this instruction 35H is operand.)
Q16.
Ans.
Write different types of instruction of Intel 8085 according to size.
According to the word size the Intel 8085 instructions are classified into the following three types:
a) 1- bye instruction.
b) 2- bye instruction.
c) 3- bye instruction.
Q17. Define instruction cycle and Machine cycle?
Ans. The instruction cycle consists of necessary steps that a CPU performs to fetch an instruction and to
execute it. The total time required to execute an instruction is given by: IC=FC+EC.
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Microprocessor System (Bsc-4)
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The fetch cycle is of fixed duration. Whereas the execute operation is of Variable duration.
Machine cycle is defined as the time required to complete one operation of accessing memory, I/O.
or acknowledging an external request. This cycle may consist of three to six T-states.
Q18. Explain different types of flags used in 8085.
Ans.The Intel 8085 microprocessor contains five flip-flops to serve as status flags. The flip-flops are set or
reset according to the conditions, which arise during an arithmetic or logical operation. The five status flags
of Intel 8085 are:
(i) Carry Flag (CS)
(ii) Parity Flag (P)
(iii) Auxiliary Carry Flag (AC)
(iv) Zero Flag (Z)
(v) Sign Flag (S)
Q19. Explain PSW.
Ans. The five bits indicates the five flip-flops and three bits are undefined. The combination of these 8bits is called PSW (program status word).
Q20. What do you mean by timing Diagram?
Ans. The necessary steps which are carried out in a machine cycle can be represented graphically. Such
a graphical representation is called timing diagram.following is an example of timing diagram: -
Q21. What does it mean by embedded system?
Ans. An embedded system is a special-purpose system in which the computer is completely
encapsulated by or dedicated to the device or system it controls. Unlike a general-purpose computer, such
as a personal computer, an embedded system performs one or a few pre-defined tasks, usually with very
specific requirements. Since the system is dedicated to specific tasks, design engineers can optimize it,
reducing the size and cost of the product. Embedded systems are often mass-produced, benefiting from
economies of scale.
Q22. List the four externally initiated operations in 8085.
Ans. The 8085 can respond to four externally initiated operations: Reset, Interrupt, Ready, and Hold.
1.
Reset: On receiving this signal microprocessor reset the Program Counter to
zero and resets the Interrupt Enable and HLDA flip-flops.
2. Interrupt: - Through Interrupt signals by which an external device can get attention of the
microprocessor.
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Microprocessor System (Bsc-4)
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3. Ready: - This Signal indicates that the memory or peripheral is ready to send or receive
data. When a Device is ready this signal is set to high by the device.
4. Hold: - This signal is used by another Master for requesting the use of Address and
Data Buses. CPU upon receiving the Hold request will relinquish the control of buses.
Q23. Define Zero Flag.
Ans. The zero status flag Z is set to 1, if the result of an arithmetic or logical operation is 0,if the result is
not zero, the flag is set to 0.
Q24. Explain TRAP & RST 7.5 interrupt.
Ans. TRAP has highest priority and cannot be masked or disabled. A rising-edge pulse will cause a
jump to location 0024H.
RST 7.5 Its priority is less then TRAP, So it has 2nd no priority and can be masked or disabled.
Rising-edge pulse will cause a jump to location 7.5 * 8 = 003CH.
This interrupt is latched internally and must be reset before it can be used again.
Q25. What is the memory word size required in an 8085 system?
Ans. Memory is a group of registers, arranged in a sequence, to store bits. The 8085 MPU requires an 8bit wide memory word and use the 16-bit address to select a register called memory location.
Q26.What is the function of the WR & RD signals on the memory chip?
Ans. Both Signals are control signals. WR signal is used to indicate a data write operation into a
memory chip or output device. The RD signal is used to to indicate a data read data operation from a
memory chip or input device.
Q27. What is the purpose of Immediate Addressing mode?
Ans. In immediate addressing mode the operand is specified within the instruction itself. Example:
MVI B, 05H (Move 05H into register B Immediately. The opcode is 06,05).
ADI 34 (Add 34H immediately in the Accumulator. The opcode is C6,34).
Q28. If the Intel 8085 microprocessor adds 89H and 79H specify the content of accumulator and
status of S, Z and CY flags.
Ans. The binary code of 89H=10001001
79H=01111001
By adding we get the result = 100000010
So the content of accumulator is 00000010=02H
So the content of S flag=0
So the content of Z flag=0
So the content of CY flag=1
Q29. The following instructions subtract two unsigned numbers in Intel 8085. Specify the content
of accumulator and status of S and CY flags.
MVI A, F8H
SUI 69H
Ans. The binary code of F8H=11111000
69H=01101001
By subtracting we get the result = 10001111
So the content of accumulator is 10001111=8FH
So the content of S flag=0 CY flag=0
Q30. Write the instruction to load 2050H in the register pair BC. Increment the number using
instruction INX B and illustrate whether the INX B instruction is equivalent to the instruction INR B
and INR C.
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Microprocessor System (Bsc-4)
10/42
Ans.
LXI B, 2050H with this 2050 is loaded into BC register.
When we use INX B. the result is 2051.
And when we use INX B and INX C the result is 2151.
Q31.
Ans.
Write basic types of instructions in Instruction Set of 8085.
8085 instruction set consists of the following instructions:
1.
Data Movement Instructions.
2.
Arithmetic Instructions - add, subtract, increment and decrement.
3.
Logic - AND, OR, XOR and rotate.
4.
Control Transfer - conditional, unconditional, call subroutine, return from subroutine and
restarts.
5.
Input/Output Instructions.
Other - setting/clearing flag bits, enabling/disabling interrupts, stack operations, etc
Q32.
Ans.
What is an interrupt? Write different types of interrupts.
Interrupt is a process where an external device can get the attention of the microprocessor.
Interrupts can be classified into two types:
•Maskable Interrupts (Can be delayed or Rejected)
•Non-Maskable Interrupts (Can not be delayed or Rejected)
Q33. What are ARITHMETIC instructions?
Ans. The arithmetic instructions usually include addition, subtraction, division, multiplication,
incrementing, and decrementing although division & multiplication were not available in most early CPU’s.
There are two flags used with arithmetic that tell the program what was the outcome of an instruction. One
is the Carry (C) flag. The other is the Zero (Z) flag.
Q34. What are LOGICAL instructions.
Ans. In microprocessors there are other mathematical instructions called logical instructions. These are
OR , AND, XOR, ROTATE, COMPLEMENT and CLEAR. These commands are usually not concerned with
the value of the data they work with, but, instead, the value, or state, of each bit in the data
Q35. Explain Compliment & Clear operation.
Ans. Compliment (CMA)Complimenting a number results in the opposite state of all the 1's and 0's.
Take the number 1111b. Complimenting results in 0000b.
Clear(CLA):- This instruction clears, or zero's out the accumulator. This is the same as moving a 0
into the accumulator. This also clears the C flag and sets the Z flag
Q36. What is BRANCHING instructions?
Ans. There are also program flow commands. These are branches or jumps. They have several different
names reflecting the way they do the jump or on what condition causes the jump, like an overflow or under
flow, or the results being zero or not zero. But all stop the normal sequential execution of the program, and
jump to another location,
Q37. W.A.P. to place 05 in register B.
Ans.
Memory
Machine
Address
Codes
2000
06,05
MVI
2002
76
HLT
Mnemonics
Operands
B,05H
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
Q38. W.A.P. to place 05 in register A then moves it to B.
Ans.
Memory
Machine
Mnemonics
Address
Codes
2000
3E,05
MVI
A,05H
2002
47
MOV
B,A
2003
76
HLT
11/42
Operands
Q39. W.A.P. to Load the content of memory location FC50H directly to the accumulator, then
transfer it to register B.
Ans.
Memory
Machine
Mnemonics
Operands
Address
Codes
2000
3A,50,FC
LDA
FC50
2003
47
MOV
B,A
2004
76
HLT
Q40. W.A.P. to
Shift an 8-bit number by one bit.
Ans.
Memory
Machine
Mnemonics
Address
Codes
2000
3A,01,25
LDA
2501 H
2003
87
ADD
A
2004
32,02,25
STA
2502 H
2007
76
HLT
Q41. Addition of 2 8-bits number, sum 8-bits.
Ans.
Memory
Machine
Mnemonics
Address
Codes
2000
21,01,5
LXI
H,2501 H
2003
7E
MOV
A,M
2004
23
INX
H
2005
86
ADD
M
2006
32,03,25
STA
2503 H
2009
76
HLT
Q42. Subtraction of 2 8-bits numbers.
Ans.
Memory
Machine
Address
Codes
2000
21,01,5
LXI
2003
7E
MOV
2004
23
INX
2005
96
SUB
2006
23
INX
2007
77
MOV
2008
76
HLT
Mnemonics
Operands
Operands
Operands
H,2501 H
A,M
H
M
H
M,A
Q43. W.A.P. to Load the content of memory location FC50H to register C.
Ans. Memory
Machine
Mnemonics
Operands
Address
Codes
2000
21,50,FC
LXI
H,FC50
2003
4E
MOV
C,M
2004
76
HLT
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
12/42
Q44. W.A.P. to Load the content of memory location FC50H directly to the accumulator, then
transfer it to register B.
Ans.
Memory
Machine
Mnemonics
Operands
Address
Codes
2000
3A,50,FC
LDA
FC50
2003
47
MOV
B,A
2004
76
HLT
Q45. W.A.P. to 05 in accumulator. Increment it by one and then store the result in memory
location FC50H.
Ans.
Memory
Machine
Mnemonics
Operands
Address
Codes
2000
3E,05
MVI
A,05
2002
3C
MOV
A
2003
32,50,FC
STA
FC50H
2006
76
HLT
Q46.
Ans.
Differentiate control bus, data bus and address bus.
Difference between control bus, data bus and address bus:
Control Bus: Control Bus is used to send the control information. The information like
whether to read or to write data on to the memory or I/O device.
Data Bus: Data bus is used to transfer the actual data from I/O device to memory or from
memory to any I/O device.
Address Bus: Address Bus contains the address of the memory or I/O device where to
read or to write the data.
Q47. State practical uses of the six general-purpose registers
Ans. The use of six general purpose registers is:
1.
These registers are used to store the memory address where to send or to receive the data.
2.
These registers are used to one of the two operands, which are required during the execution of any
arithmetic or logical instruction.
3.
These registers are used to store the intermediate results of any arithmetic or logical instruction.
Q48. Explain the purpose of the Accumulator?
Ans. Purpose of Accumulator: When any arithmetic or logical instruction is executed, one of the
operand is always stored in the accumulator. After the execution of logical or arithmetic instruction result is
also stored in accumulator.
Q49. What is the need of an addressing mode?
Ans. Computers use addressing mode techniques for the purpose of accommodating one or both of the
following provisions:
1.
To give programming versatility to the user by providing such facilities as pointers to memory,
counters for loop control, indexing of data, and program relocation.
2.
To reduce the number of bits in the addressing field of the instruction.
Q50. What is the difference between machine language and assembly language?
Ans. Assembly Language: In assembly language, the user employs symbols for the operation part, the
address part, and other parts of the instruction code. Each symbolic instruction can be translated into one
binary coded instruction. This translation is done by a special program called an assembler. Assembly
language program is not machine dependent. The execution time required for assembly language program
is more as compared to machine language.
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Machine Language: In machine language program is written in the form of 0’s and 1’s. Machine language
program executes fast as compared to assembly language program. Machine language program is
machine dependent i.e. program written for one machine will not run on another machine. Debugging is
difficult in machine language program.
Q51. Define Register.
Ans. Registers are collection of flip-flops located with in the CPU, used to the store instructions, data and
intermediated results. These register stores small amount of data but are very fast than storage systems.
One register may store 8-bit, 16-bit data, generally. The size of register and number of register in a CPU
depends on the Architecture of CPU and may very with the CPU. Registers are generally designated by
capital letters to denote the function of Register. For e.g. MAR designates memory address Register.
Q52. What does CPU do after detecting an interrupt signal?
Ans. An interrupt indicates that an event requires the processor’s attention has occurred causing that
processing to suspend and save its current activity, then branch to an interrupt service routine.
Q53. Define machine language.
Ans. The low level language, which consists of binary, codes and is directly understood by computer.
The instructions of machine language are also called binary codes. This is machine dependent language
and programmers for this language had complete knowledge of hardware program written for one machine
may not execute on other machine.
Q54. Explain Reduced Instruction Set Computer(RISC) in Detail.
Ans. RISC (Reduced Instruction Set computer): - When computers use few instructions with simple
constructs, so that they can be executed much faster with in the CPU without having to use memory as
often. This type of computer is classified as a reduced instruction set computer or RISC. In this, RISC
architecture attempt to reduce execution time by simplifying the instruction set of computer. Following are
the characteristics of the RISC processor:
1. Relatively few instructions are used.
2. Fewer addressing modes are used.
3. Memory access is limited to load & store the instructions.
4. All operations done within register of CPU.
5. Fixed length, easily decodable instruction format is used.
6. Single cycle instruction execution is preferred.
7. Hardware rather than microprogrammed control is used.
8. Also, large no of registers in processor unit.
9. Use instruction Pipeline.
10. Uses compiler for efficient translation of high-level language into machine language
program.
Q55. Explain Complex Instruction Set Computer (CISC) in detail.
Ans. Complex Instruction Set Computer (CISC): - To increase compilation speed & improve overall
computer performance. We use complex instruction set computer. It also incorporates variable length
instruction format. So more number of instructions & addressing modes are incorporated into computer. To
have above functions to be performed CISC processor uses:
1. Large no of instructions-typically from 100 to 250 instructions.
2. Uses also rarely used instructions
3. More number of addressing modes typically from 5 to 20 different modes.
4. Uses variable length instruction formats.
5. Uses instructions that manipulate operands in memory.
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Section- 3
[10 Marks Questions]
Q1. Explain the 8085 microprocessor in detail.
Ans.The microprocessor itself is usually a single integrated circuit (IC). Intel 8085 is an 8bit, NMOS
Microprocessor. Its 40-pin I.C package fabricated on a single LSI chip. The Intel 8085 uses a single +5v
D.C supply for its operation. Its clock speed is about 3 MHz. The clock cycle is of 320ns. It has 16 address
and 8 data lines
8085 microprocessor has following specifications
Single + 5V Supply
Introduced on March 1976
8-bit microprocessor
6500 Transistors
On Chip Clock Generator (with External Crystal or RC Network)
On Chip System Controller;
Advanced Cycle Status Information Available for Large System Control
4 Vectored Interrupts (One is Non Mask able)
Serial In/Serial Out Port
Decimal, Binary, and Double Precision Arithmetic
Direct Addressing Capability to 64K bytes of memory
Q2.
Explain different type of buses in 8085 microprocessor
ANS:
Buses simply know as group of wires. There are three buses associated with the memory subsystem. One
is the address bus, the second is the data bus, and the third is the control bus. Busses transport data
and address everywhere. All three are connected to the memory subsystem. In the 8085 CPU, the address
bus is 16 bits wide. It acts to select one
of the unique 216
(64K) memory locations. The control bus
determines
whether this will be a read or a write. In
the case of an
instruction fetch, the control bus is set up
for
a
read
operation. Data is read or written through
the data bus,
which is 8 bits wide. This is why all
registers
and
memory are 8 bits wide, it's the width of
the data bus on
the 8085 CPU.
A bus is just a group of connections that
all
share
a
common function. Instead of speaking of
each
bit
or
connection in the address separately, for
example, all 16
are taken together and referred to simply
as the address
bus. The same is true for the control and data buses. Address bus is unidirectional but data bus is bi
directional
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Q3. Draw the block diagram of 8085 microprocessor.
Ans.
Q4. Calculate
the number of
chips needed
to design 8kbyte memory if
the
memory
chip size is
1024x1.
Ans. The chip
1024x1
has
1024 registers
and
each
register
can
store 1 bit with
one data line.
We need 8 data
line for byte size
memory there
for 8 chips are
required for 1kbyte
memory.
For
8k-byte
memory, we will
need 64 chips.
We can arrive at
the
same
answer
by
dividing 8K-byte
by
1kx1
as
follows:
8192x8%1024x1=64
Q5.
Explain the different type of registers used in 8085
Ans.Registers Used In Intel 8085:
Intel 8085 microprocessor has the following
(I) One 8-bit accumulator (ACC) i.e. Register A
(ii) Six 8-bit general-purpose registers. These are
(iii) One 16-bit stack pointer, SP
(iv) One 16-bit program counter, PC
(v) Instruction register
(vi) Temporary register
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registers:
B, C, D, E, H and L
Microprocessor System (Bsc-4)
16/42
Accumulator (ACC) The accumulator is an 8-bit register associated with the ALU. The register 'A' in
the 8085 is an accumulator. It is used to hold one of the operands of an arithmetic or logical operation. It
serves as one input to the ALU. The other operand for an arithmetic or logical operation may be stored
either in the memory or in one of the general-purpose registers. The final result of an arithmetic or logical
operation is placed in the accumulator.
General-Purpose Registers. The 8085 microprocessor contains six 8-bit general-purpose registers.
They are: B, C, D, E, H and L register. To hold 16-bit data a combination of two 8-bit registers can be
employed. The combination of two 8-bit registers is known as a register-pair. The valid register pairs in the
8085 are: B-C, D-E and H-L. The programmer cannot form a register-pair by selecting any two registers of
his choice.
Program Counter (PC) It is a 16-bit special-purpose register. It is used to hold the memory address
of the next instruction to be executed. It keeps the track of memory addresses of the instructions in a
program while they are being executed. The microprocessor increments the content of the program counter
during the execution of an instruction so that it points to the address of the next instruction in the program
at the end of the execution of an instruction.
Stack Pointer (SP). It is a 16-bit special function register. The stack is a sequence of memory
locations set aside by a programmer to store/retrieve the contents of accumulator, flags, program counter
and general-purpose registers during the execution of a program. Any portion of the memory can be used
as stack. Since the stack works on LIFO (last-in-first-out)
Instruction Register. The instruction register holds the opcode (operation code or instruction code) of
the instruction, which is being decoded and executed,
Temporary Register. It is an 8-bit register associated with the ALU. It holds data during an
arithmetic/logical operation. It is used by the microprocessor. It is not accessible to programmer.
The Intel 8085 microprocessor contains five flip-flops to serve as status flags. The flip-flops are set or reset
according to the conditions, which arise during an arithmetic or logical operation. The five status flags of
Intel 8085 are:
(I) Carry Flag (CS)
(ii) Parity Flag (P)
(iii) Auxiliary Carry Flag (AC)
(iv) Zero Flag (Z)
(v) Sign Flag (S)
Q6.
What is accumulator? Why it’s important in 8085?
Ans. The accumulator is an 8-bit register associated with the ALU. The register 'A' in the 8085 is an
accumulator. It is used to hold one of the operands of an arithmetic or logical operation. It serves as one
input to the ALU. The other operand for an arithmetic or logical operation may be stored either in the
memory or in one of the general-purpose registers. The final result of an arithmetic or logical operation is
placed in the accumulator
Q7.
What is stack pointer? Explain in details
Ans: Stack Pointer (SP) is a 16-bit special function register. The stack is a sequence of memory
locations set aside by a programmer to store/retrieve the contents of accumulator, flags, program counter
and general-purpose registers during the execution of a program. Any portion of the memory can be used
as stack. Since the stack works on LIFO (last-in-first-out)
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Q8.
Ans:
17/42
Explain the pin configuration of 8085 microprocessor.
PIN DESCRIPTION
The following describes the function of each pin:
A8 -A15 (Output)
Address Bus: The most significant 8 bits of the memory address or the 8 bits of the I/0 address.
AD0-AD7 (Input/Output)
Multiplexed Address/Data Bus; Lower 8 bits of the memory address (or I/0 address) appear on the bus
during the first clock cycle of a machine state. It then becomes the data bus during the second and third
clock cycles.
ALE (Output)
Address Latch Enable: It occurs during the first clock cycle of a machine state and enables the address to
get latched into the onchip latch of peripherals. The falling edge of ALE is set to guarantee setup and hold
times for the address information. ALE can also be used to strobe the status information.
SO, S1 (Output)
These are status signals sent by the microprocessor to distinguish the various TYPES of operations.
Explain the table below
S2
Operations
S1
0
0
HALT
0
1
WRITE
1
0
READ
1
1
FETCH
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S1 can be used as an advanced R/W status.
RD (Output 3state)
READ; indicates the selected memory or 1/0 device is to be read and that the Data Bus is available for the
data transfer.
WR (Output 3state)
WRITE; indicates the data on the Data Bus is to be written into the selected memory or 1/0 location.
READY (Input)
If Ready is high during a read or write cycle, it indicates that the memory or peripheral is ready to send or
receive data. If Ready is low, the CPU will wait for Ready to go high before completing the read or write
cycle.
HOLD (Input)
HOLD; indicates that another Master is requesting the use of the Address and Data Buses. The CPU, upon
receiving the Hold request, CPU will relinquishes the control of buses as soon as the completion of the
current machine cycle. Internal processing can continue. The processor can regain the buses only after the
Hold is removed.
HLDA (Output)
HOLD ACKNOWLEDGE; indicates that the CPU has received the Hold request and that it will relinquish
the buses in the next clock cycle. HLDA goes low after the Hold request is removed. The CPU takes the
buses one half-clock cycle after HLDA goes low.
INTR (Input)
INTERRUPT REQUEST; is used as a general purpose interrupt. It is sampled only during the next to the
last clock cycle of the instruction. If it is active, the Program Counter (PC) will be inhibited from
incrementing and an INTA will be issued. During this cycle a RESTART or CALL instruction can be inserted
to jump to the interrupt service routine. The INTR is enabled and disabled by software. It is disabled by
Reset and immediately after an interrupt is accepted.
INTA (Output)
INTERRUPT ACKNOWLEDGE; It is be used to activate the 8259 Interrupt chip or some other interrupt
port.
RST 5.5
RST 6.5 - (Inputs)
RST 7.5
RESTART INTERRUPTS; These three inputs have the same timing as INTR except they cause an internal
RESTART
to
be
automatically
inserted.
RST 7.5 ~~ Highest Priority
RST 6.5
RST 5.5 Lowest Priority
The priority of these interrupts is ordered as shown above. These interrupts have a higher priority than the
INTR.
TRAP (Input)
Trap interrupt is a nonmaskable restart interrupt. It is recognized at the same time as INTR. It is unaffected
by any mask or Interrupt Enable. It has the highest priority of any interrupt.
RESET IN (Input)
Reset sets the Program Counter to zero and resets the Interrupt Enable and HLDA flip-flops. None of the
other flags or registers (except the instruction register) are affected. The CPU is held in the reset condition
as long as Reset is applied.
RESET OUT (Output)
Indicates CPU is being reset. Can be used as a system RESET. The signal is synchronized to the
processor clock.
X1, X2 (Input)
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Crystal or R/C network connections to set the internal clock generator X1 can also be an external clock
input instead of a crystal. The input frequency is divided by 2 to give the internal operating frequency.
CLK (Output)
Clock Output for use as a system clock when a crystal or R/ C network is used as an input to the CPU. The
period of CLK is twice the X1, X2 input period.
IO/M (Output)
IO/M indicates whether the Read/Write is to memory or l/O register during Hold and Halt modes.
SID (Input)
Serial input data line the data on this line is loaded into accumulator bit 7 whenever a RIM instruction is
executed.
SOD (output)
Serial output data line. The output SOD is set or reset as specified by the SIM instruction.
Vcc
+5 volt supply.
Vss
Ground Reference
Q9. What is the program counter? Why it is used in 8085 microprocessor?
Ans. Program Counter (PC) it is a 16-bit special-purpose register. It is used to hold the memory address
of the next instruction to be executed. It keeps the track of memory addresses of the instructions in a
program while they are being executed. The microprocessor increments the content of the program counter
during the execution of an instruction so that it points to the address of the next instruction in the program
at the end of the execution of an instruction.
Q10. Explain the general-purpose register in 8085
Ans. The 8085 microprocessor contains six 8-bit general-purpose registers. They are: B, C, D, E, H and
L register. To hold 16-bit data a combination of two 8-bit registers can be employed. The combination of
two 8-bit registers is known as a register-pair. The valid register pairs in the 8085 are: B-C, D-E and H-L.
The programmer cannot form a register-pair by selecting any two registers of his choice.
Q11. What is the difference between instruction register and temporary register?
Ans. Instruction Register. The instruction register holds the opcode (operation code or instruction code)
of the instruction, which is being decoded and executed,
Temporary Register. It is an 8-bit register associated with the ALU. It holds data during an
arithmetic/logical operation. It is used by the microprocessor. It is not accessible to programmer
Q12.
Ans.
What is PWS (program status word)?
In above fig, five bits indicates five status flags and three bits are undefined. The combination of these 8bits is called program status word. PSW and accumulator are treated as a 16-bit unit for stack operation.
Q13
Ans:
What are the functions of ALE, IO/M, and SID signals in 8085 microprocessor?
ALE (OUTPUT)
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Address Latch Enable: It occurs during the first clock cycle of a machine state and enables the address to
get latched into the onchip latch of peripherals. The falling edge of ALE is set to guarantee setup and hold
times for the address information. ALE can also be used to strobe the status information.
IO/M (Output)
IO/M indicates whether the Read/Write is to memory or l/O Register during Hold and Halt modes.
SID (Input)
Serial input data line the data on this line is loaded into accumulator bit 7 whenever a RIM instruction is
executed.
Q14 Discuss the functions of ALU 8085
ANS. ALU (Arithmetic Logic Unit) is the area of the microprocessor where various computing functions
are performed on data. The ALU unit performs such as arithmetic operations as addition and subtraction,
and such logic operations as AND, OR and exclusive OR.
Q15 What is the difference between microcontroller, microcomputers and microprocessor
Ans. Microprocessor: It is a semiconductor device (integrated circuit) manufactured by using LSI
techniques. It includes the ALU, register arrays, and control circuits on a single chip. The term CPU is also
synonymous with microprocessor.
Micro controller: It is a device that includes microprocessor, memory and I/O signal lines on a single
ship, fabricated using VLSI technology.
Microcomputer:
A computer that is designed using a microprocessor as its CPU. It include
microprocessor, memory and I/O (input /output)
Q16. Specify the function of the address bus the direction of the information flow on the address
bus.
Ans. Address Bus provides a memory address to the system memory and I/O address to the system I/O
devices. The address bus is a group of 16 lines generally identified as A0 to A15. The address bus is
unidirectional: bits flow in one direction, form microprocessor to peripheral devises.
Q17. How many address lines are necessary to address two megabytes (2048K) of memory?
Ans. Each address line can assume only two logic stated (0 and 1), therefore we need to find the power
of 2 that will give us 2048K combinations. The problem can be restated as follows
Find x where 2x = 2048K. By taking log on both side
Log 2x =log (2048x1024)
xlog2 =log2097152
x= log2097152/log2= 21
There is need of 21-address line to access the two-megabyte memory
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Q18. Specify the four control signals commonly use by the 8085 MPU.
Ans.
Above fig shows four different control
generated by combining the signals RD,
IO/M. the signal IO/M goes low for the
operation. This signal is ANDed with RD
When both input signals go low, the output
go low and generate MEMR (memory
MEMW (memory write) control signals.
IO/M signal goes high, it indicates the
operation.
1.
Memory read: reads the data (or
form memory
2. Memory write: writes data (or instructions) form memory
3. I/O read: accepts data from input devices.
4. I/O write: sends data to output devices
Q19. List the four operations commonly performed by microprocessor.
Ans. Microprocessor performs primarily four type of operation
Memory read: reads the data (or instructions) form memory
Memory write: writes data (or instructions) from memory
I/O read: accepts data from input devices.
I/O write: sends data to output devices.
signals
WR
and
memory
and
WR.
of the gates
read)
and
When
the
peripheral I/O
instructions)
Q20. Why are the program counter and the stack pointer 16-bit registers?
Ans. Address line of 8085 microprocessor is 16-bit, so address is also 16-bit. Program counter (it stores
the address of next instruction to be executed) and stack pointer (its used as memory pointer for the stack
memory) by its definition it deals directly with address line. So to hold the 16-bit address it is 16-bit
registers.
Q21. What are the limitations of 8085 microprocessor?
Ans. The 8085 microprocessor can qualify as an MPU (micro processing unit), but with the following two
limitations. The low order address bus of the 8085 microprocessor is, multiplexed (time-shared) with data
bus. The bused need to be demultiplexed. Appropriate control signals need to be generated to interface
memory and I/O with the 8085. (Intel has some specialized memory and I/O devices that do not required
such control signals)
Q22. Explain the different type of instructions used in 8085 according to size.
Ans. Instruction Word Size: According to the word size the Intel 8085 instructions are classified into
the following three types:
(1) 1-byte instruction
(2) 2-byte instruction
(3) 3-byte instruction
One-Byte Instruction: - All one-byte instructions contain information regarding operands in the opcode
itself.Examples of one-byte instructions are:
ADD B: Add the content of register B to the content of the accumulator.
RAL:
Rotate the content of the accumulator left by one bit.
Two-Byte Instruction: - In a two-byte instruction the 1st byte of the instruction is its opcode and the 2nd
byte is either data or address. A two-byte instruction is stored in two consecutive memory locations.
Examples are:
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MVI B, 05: Move 05 to register B.
IN 01: Read data at port B.
Three-Byte Instruction: - In a three-byte instruction the 1st byte of the instruction is its opcode and the
2nd and 3rd bytes are either 16-bit date or 16-bit address. Examples are:
LXI H, 2400H: Load H-L pair with2400H.
LDA2500H: Get the content of memory location 2500H into accumulator.
Q23. What are Different types of instruction used in Intel 8085 according to operation?
Ans. An instruction is a command given to the computer to perform a specified operation on given data.
The instruction set of a microprocessor is the collection of the instructions that the microprocessor is
designed to execute. The instructions described in this chapter are of INTEL 8085. These instructions are
of Intel Corporation. They cannot be used by other microprocessor manufacturers. The programmer can
write a program in assembly language using these instructions.
These instructions have been classified into the following groups:
1. Data Transfer Group
2. Arithmetic Group
3. Logical Group
4. Branch Control Group
5. I/O and Machine Control Group.
1.
Data Transfer Group: Instructions, which are used to transfer data from one register to
another register, from memory to register or register to memory, come under this group. Examples
are: MOV, MVI, LXI, LDA, STA etc
2.
Arithmetic Group: The instructions of this group perform arithmetic operations such as
addition, subtraction, increment or decrement of the content of a register or memory. Examples are:
ADD, SUB, INK, and DAD etc.
3.
Logical Group: The instructions under this group perform logical operation such as AND,
OR, compare, rotate etc. Examples are: ANA, XRA, ORA, CMP, and RAL etc.
4.
Branch Control Group: This group includes the instructions for conditional and
unconditional jump, subroutine call and return, and restart. Examples are: JMP, JC, JZ, CALL, CZ,
RST etc.
5.
I/O and Machine Control Group: This group includes the instructions for input/output ports,
stack and machine control. Examples are: IN, OUT. PUSH, POP, HLT etc.
Q24. Explain the Different ADDRESSING MODES of intel-8085:
Ans. There are various techniques to specify data for instructions. These techniques are called addressing modes. Intel 8085 uses the following addressing modes:
1. Direct addressing.
2. Register addressing.
3. Register indirect addressing.
4. Immediate addressing.
1. Direct Addressing: - In this mode of addressing the address of the operand (data) is given in the
instruction itself. Example:
STA 2400 H (Store the content of the accumulator in the memory location 2400 H.
32,00,24In this instruction 2400H is the memory address where data is to be stored).
2. Register Addressing: -In register addressing mode the operand is in one of the general-purpose
registers. The opcode specifies the address of the register(s) in addition to the operation to be
performed. Examples:
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MOV A, B (Move the content of register B to register A.)
ADD B
(Add the content of register B to the content of register A).
3. Register Indirect Addressing: - In this mode of addressing the address of the operand is
specified by a register pair. Example:
LXI H, 2500 H
MOV A, M
4. Immediate Addressing: - In immediate addressing mode the operand is specified within the
instruction itself, example:
MVI A, 05
(Move 05 in register A. 3R, 05 is the code for this instruction).
5. Implicit Addressing: - There are certain instructions, which operate on the content of the
accumulator. Such instructions do not require the address of the operand. Examples are:
CMA, RAL, and RAR etc.
Q25. Explain the Flags Used In Intel-8085?
Ans. The Intel 8085 microprocessor contains five flip-flops to serve as status flags. The flip-flops are set
or reset according to the conditions, which arise during an arithmetic or logical operation. The five status
flags of Intel 8085 are:
(1) Carry Flag (CS)
(2) Parity Flag (P)
(3) Auxiliary Carry Flag (AC)
(4) Zero Flag (Z)
(5) Sign Flag (S)
1. Carry Flag (CS): After the execution of an arithmetic instruction if a carry is produced, the carry
flag CS is set to 1, otherwise it is 0. The any flag is set or reset in case of addition as well as
subtraction. After the addition of two 8-bit numbers, if the sum is larger than 8 bits, a carry is
produced; and the carry flag is set to 1. In case of subtraction, if borrow occurs, the case flag is set
to 1. The carry flag holds carry out of the most significant bit resulting from the execution of an arithmetic operation.
2. Parity Flag (P): The parity status flag P is set to 1, if the result of an arithmetic or logical operation contains even number of is. It is reset i.e. It is 0, if the result contains odd number of is.
3. Auxiliary Carry Flag (AC): The auxiliary carry flag AC holds carry out of the bit number 3 to the
bit number 4 resulting from the execution of an arithmetic operation.
4. Zero Flag (Z): The zero status flag Z is set to 1, if the result of an arithmetic or logical operation
is 0- if the result is not zero, the flag is set to 0.
5. Sign Flag (S): The sign flag S is set to 1, if the result of an arithmetic or logical operation is
negative. If the result is positive, the sign flag is set to 0.
Q26.
Ans.
Write various techniques to specify data for instruction.
The various techniques to specify data for instruction are.
1.
8-bit or 16-bit data may directly given in the instruction.
2.
The address of the memory location, IO port or IO device, where data is present may
beautiful given in the instruction.
3.
In some instruction only one register is specified. The content of the register is one of the
operand and other operand is in the accumulator.
4.
Some instructions specify two registers. The content of the registers are the required data.
5.
In some instruction data is implied.
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
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Microprocessor System (Bsc-4)
Q27.
Ans.
24/42
Draw Timing Diagram For opcode fetch Operation
Q28. Draw Timing Diagram For Memory Read Operation
Ans.
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
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Q29.
Ans.
Microprocessor System (Bsc-4)
25/42
Draw for memory writes operation.
Q30.
Ans.
Draw Timing Diagram For IO Read Operation
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Microprocessor System (Bsc-4)
Q31.
Ans.
26/42
Draw for IO writes operation.
Q32. Discuss instruction cycle, machine cycle and T- state.
Ans. Instruction cycle is defined, as the time required completing the execution of an instruction. The
8085-instruction cycle consists of one to six machine cycle or one to six operations.
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Machine cycle is defined, as the time required completing one operation of accessing memory, I/O. or
acknowledging an external request. This cycle may consist of three to six T-states.
T-state: T-state is defined as one subdivision of the operation performed in one clock period. These
subdivisions are internal states synchronized with the system clock, and each T-state is precisely equal to
one clock period. The terms T-state and clock period are often used synonymously.
Q33. What are different type of interrupt in 8085
Ans. In the 8085, as with any CPU that has interrupt capability, there is a method by which the interrupt
gets serviced in a timely manner. When the interrupt occurs, and the current instruction that is being
processed is finished, the address of the next instruction to be executed is pushed onto the Stack. Then a
jump is made to a dedicated location where the ISR is located. Some interrupts have their own vector, or
unique location where it's service routine starts. These are hard coded into the 8085 and can't be changed
(see below).
TRAP - has highest priority and cannot be masked or disabled. A rising-edge pulse will cause a jump to
location 0024H.
RST 7.5- 2nd priority and can be masked or disabled. Rising-edge pulse will cause a jump to location 7.5 *
8 = 003CH.
This interrupt is latched internally and must be reset before it can be used again.
RST 6.5 – 3rd priority and can be masked or disabled. A high logic level will cause a jump to location 6.5 *
8 = 0034H.
RST 5.5 – 4th priority and can be masked or disabled. A high logic level will cause a jump to location 5.5 *
8 = 002CH.
INTR – 5th priority and can be masked or disabled. A high logic level will cause a jump to specific location
as follows:
When the interrupt request (intr) is made, the CPU first completes its current execution. Provided no other
interrupts are pending, the CPU will take the inta pin low thereby acknowledging the interrupt. It is up to the
hardware device that first triggered the interrupt, to now place an 8-bit number on the data bus, as the CPU
will then read whatever number it finds on that data bus and do the following: multiply it by 8 and jump to
the resulting address location. Since the 8-bit data bus can hold any number from 00 – ffh (0 – 255) then
this interrupt can actually jump you to any area of memory between 0*8 and 255*8 i.e.: 0000 and 07ffh (a
2k space). N.b: this interrupt does not save the pc on the stack, like all other hardware and software
interrupts!
Q34. Write important Symbols and Abbreviations used in Intel 8085 instructions.
Ans.
Sr No
Symbol/Abbreviations
Meaning
1
addr
16-bit address of memory location
2
data
8-bit data
3
data 16
16-bit data
4
r,1,r2
One of the register
5
A,B,C,D,E,H,L
8-bit register
6
A
Accumulator
7
H-L
Register pair H-L
8
B-C
Register pair B-C
9
D-E
Register pair D-E
10
PSW
Program Status Word
11
M
Memory whose address is in H-L pair
12
H
Represents that num or add is in hexadecimal
13
Rp
One of the register pair
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Microprocessor System (Bsc-4)
14
15
PC
CS
28/42
16-bit program counter
Carry status
Q35. Specify the register content and flag status(S, Z, CY) after instruction ORA A is executed in
Intel 8085.
MVI A, A9H
MVI B, 57H
ADD B
ORA A
Ans.
A=0
B=57
S=0
Z=1
CY=1
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Q36. What is Assembly Language?
Ans. Inside the 8085, instructions are really stored as binary numbers, not a very good way to look at
them and extremely difficult to decipher. An assembler is a program that allows you to write instructions in,
more or less, English form, much more easily read and understood, and then converted or assembled into
hex numbers and finally into binary numbers.
The program is written with a text editor (NOTEPAD or similar), saved as an ASM file, and then assembled
by the assembler (TASM or MASM or similar) program. The final result is an OBJ file you download to the
8085. Here is an example of the problem of adding 2 plus 2:
mvi A,2
; move 2 into the A register
mvi B,2
; move 2 into the B register
add B
;add reg. B to reg. A, store result in reg. A
The first line moves a 2 into register A. The second moves a 2 into register B. This is all the data we need
for the program. The third line adds the accumulator with register B and stores the result back into the
accumulator, destroying the 2 that was originally in it. The accumulator has a 4 in it now and B still has a 2
in it. In the program above all text after the ‘;’ are treated as comments, and not executed. This is a very
important habit to acquire.
Q37. What are the instructions used in 8085 of Data Transfer Group.
Ans.
MOV n, rs
(Move data; Move the content of the one register to another).
MOV r, M. (Move the content of memory to register).
MOV M, r. (Move the content of register to memory).
MVI r, data. (Move immediate data to register).
MVI M, data. (Move immediate data to memory).
LXI rp, data 16. (Load register pair immediate).
LDA addr. (Load Accumulator direct).
STA addr. (Store accumulator direct).
LHLD addr. (Load H-L pair direct).
SHLD addr. (Store H-L pair direct)
LDAX rp. (LOAD accumulator indirect)
STAX rp. (Store accumulator indirect)
XCHG. (Exchange the contents of H-L with D-E pair)
Q38. What are the instructions used in 8085 of Arithmetic Group?
Ans.
ADD r. (Add register to accumulator)
ADD M. (Add memory to accumulator)
ADC r. (Add register with carry to accumulator.)
ADC M. (Add memory with carry to accumulator)
ADI data. (Add immediate data to accumulator)
ACI data. (Add with carry immediate data to accumulator)
DAD rp. (Add register paid to H-L pair)
SUB r. (Subtract register from accumulator)
SUB M. (Subtract memory from accumulator).
SBB r. (Subtract register from accumulator with borrow).
SBB M. (Subtract memory from accumulator with borrow).
SUI data. (Subtract immediate data from accumulator)
SBI data. (Subtract immediate data from accumulator with borrow).
INR r. (Increment register content)
DCR r. (Decrement register content)
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DCR M. (Decrement memory content)
INX rp. (increment register pair)
DCX rp (Decrement register pair)
DAA. (Decimal adjust accumulator)
Q39. What are the instructions used in 8085 of Logical Group ?
Ans.
The instructions of this group perform AND, OR, EXCLUSIVE-OR operations; compare, rotate or take
complement of data in register or memory.
ANA r. (AND register with accumulator)
ANA M. (AND memory with accumulator)
ANI data. (AND immediate data with accumulator)
ORA r. (OR register with accumulator)
ORA M. (OR memory with accumulator)
ORI data. (OR immediate data with accumulator)
XRA r. (EXCLUSIVE - OR register with accumulator)
XRA M. (EXCLUSIVE - OR memory with accumulator)
RRC. (Rotate accumulator right)
RAL. (Rotate accumulator left through carry)
RAR. (Rotate accumulator right through carry)
Q40.
Ans.
What are the instructions used in 8085 of Branch Group?
JMP addr (label). (Unconditional Jump: jump to the instruction specified by the address).
Conditional Jump addr (label).
JZ addr (label). (Jump if the result is zero)
JNZ addr (label). Jump if the result is not zero)
JC addr (label). (Jump if there is a carry)
JNC addr (label). (Jump if there is no carry)
JP addr (label). (Jump if the result is plus)
JM addr (label). (Jump if the result is minus)
JPO addr (label). (Jump if odd parity)
Q41. What are the instructions used in 8085 of Stack, I/O And Machine Control Group?
Ans.
IN port-address. (Input to accumulator from I/O port)
OUT port-address. (Output from accumulator to I/O port)
PUSH rp. (Push the content of register pair to stack)
POP rp. (Pop the content of register pair, which was saved, from the stack)
POP PSW. (Pop Processor Status Word)
HLT (Halt)
XTHL. (Exchange stack-top with H-L)
SPHL (Move the contents of H-L pair to stack pointer)
Q42. Explain the Types of Signals Used in Memory Chip.
Ans. Input and output signals common to most memory chips. Fig shows different signal categories found
in memory chips.
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
Data
Address
Read
Write
Chip enable/
Select
31/42
M
E
M
O
R
Y
Output disables
Power
supply
C
H
I
P
Other control
input/output
Q43. Explain the Data Transfer Instructions used in 8085.
Ans.Opcode Operand
Description
Copy from source to destination
MOV Rd, Rs This instruction copies the contents of the source register into the destination register
The contents of Rd, M the source register are not altered. If one of the operands is a memory location, its
location is specified by the contents of the HL registers.
Example: MOV B, C or MOV B, M
Move immediate 8-bit
MVI Rd, data The 8-bit data is stored in the destination register or
M, data memory. If the operand is a memory location, its location is
specified by the contents of the HL registers.
Example: MVI B, 57H or MVI M, 57H
Load accumulator
LDA 16-bit address The contents of a memory location, specified by a
16-bit address in the operand, are copied to the accumulator.
The contents of the source are not altered.
Example: LDA 2034H
Load accumulator indirect
LDAX B/D Reg. pair The contents of the designated register pair point to a memory
location. This instruction copies the contents of that memory
location into the accumulator. The contents of either the
register pair or the memory location are not altered.
Example: LDAX B
Load register pair immediate
LXI Reg. pair, 16-bit data The instruction loads 16-bit data in the register pair
designated in the operand.
Example: LXI H, 2034H or LXI H, XYZ
Load H and L registers direct
LHLD 16-bit address The instruction copies the contents of the memory location
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Microprocessor System (Bsc-4)
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pointed out by the 16-bit address into register L and copies
the contents of the next memory location into register H. The
contents of source memory locations are not altered.
Example: LHLD 2040H
Q44.
Ans.
Q45.
Ans.
Q46.
Ans.
Q47.
Ans.
Addition of 2 8-bits number, sum 16-bits.
Memory
Address
Machine
Codes
Mnemonics
Operands
2000
2003
2005
2006
2007
2008
200B
200C AHEAD
200F
2010
2013
21,01,5
0E,00
7E
23
86
D2,0C,20
0C
32,03,25
79
32,04,25
76
LXI
MVI
MOV
INX
ADD
JNC
INR
STA
MOV
STA
HLT
H,2501 H
C,00
A,M
H
M
AHEAD
C
2503 H
A,C
2504 H
Addition of 2 16-bits number, sum 16-bits.
Memory
Address
Machine
Codes
Mnemonics
Operands
2000
2003
2004
2007
2009
200A
200D
200E AHEAD
2011
2012
2015
2A,01,25
EB
2A,03,25
0E,00
19
D2,0E,20
0C
22,03,25
79
32,04,25
76
LHLD
XCHG
LHLD
MVI
DAD
JNC
INR
SHLD
MOV
STA
HLT
2501 H
2503 H
C,00
D
AHEAD
C
2505 H
A,C
2507 H
Find one’s complement of an 8-bit number.
Memory
Address
Machine
Codes
Mnemonics
Operands
2000
2003
2004
2007
3A,01,25
2F
32,02,25
76
LDA
CMA
STA
HLT
2501 H
2502H
Find one’s complement of an 16-bit number.
Memory
Address
Machine
Codes
Mnemonics
Operands
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
2000
2003
2004
7E
2005
2008
2009
200A
200B
200E
Q48.
Ans.
Q49.
Ans.
LXI
MOV
H, 2501 H
STA
INX
MOV
CMA
STA
HLT
2502H
H
A, M
2504
Find Two’s complement of an 8-bit number.
Memory
Address
Machine
Codes
Mnemonics
Operands
2000
2003
2004
2005
2008
3A,01,25
2F
3C
32,02,25
76
LDA
CMA
INR
STA
HLT
2501 H
A
2502H
Find Two’s complement of an 16-bit number.
Memory
Address
Machine
Codes
Mnemonics
Operands
2000
2003
21,01,25
06,00
MOV
2F
C6, 01
32,03,25
D2, 10, 20
04
23
7E
2F
80
32,04,25
76
LXI
MVI
H, 2501 H
B,00
2005
7E
2006
2007
2009
200C
200F
2010 GO
2011
2012
2013
2014
2017
Q50.
Ans.
21,01,25
2F
CMA
32,03,25
23
7E
2F
32,04,25
76
33/42
A, M
CMA
ADI
STA
JNC
INR
INX
MOV
CMA
ADD
STA
HLT
01
2503 H
GO
B
H
A, M
B
2504H
Shift an 8-bit number by two bit.
Memory
Address
2000
2003
2004
2005
2007
Machine
Codes
3A,01,25
87
87
ADD
32,02,25
STA
76
Mnemonics
Operands
LDA
ADD
2501 H
A
A
2502 H
HLT
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
Q51.
Ans.
Shift an 16-bit number by one bit.
Memory
Address
2000
2003
2004
2007
Q52.
Ans.
Machine
Codes
2A, 01, 25
29
22, 03, 25
SHLD
76
2004
2005
2007
Machine
Codes
2A, 01, 25
29
29
DAD
22,03,25
STA
76
2004
2005
23
BE
2006
2009
200A GO
200D
LDA
DAD
2501 H
H
2503 H
HLT
Mnemonics
Operands
LDA
DAD
2501 H
A
A
2502 H
HLT
Machine
Codes
21, 01, 25
7E
INX
CMP
D2, 0A, 20
7E
32,03,25
76
Mnemonics
Operands
LXI
MOV
H, 2501 H
A, M
H
M
JNC
MOV
STA
HLT
GO
A, M
2503 H
Mnemonics
Operands
LXI
MOV
H, 2501 H
A, M
To find Smaller of two numbers.
Memory
Address
2000
2003
2004
2005
23
BE
2006
2009
200A GO
200D
Q55.
Ans.
Operands
To find larger of two numbers.
Memory
Address
2000
2003
Q54.
Ans.
Mnemonics
Shift an 8-bit number by two bit.
Memory
Address
2000
2003
Q53.
Ans.
34/42
Machine
Codes
21, 01, 25
7E
INX
CMP
D2, 0A, 20
7E
32,03,25
76
H
M
JC
MOV
STA
HLT
GO
A, M
2503 H
Find the largest number from an array.
Memory
Machine
Mnemonics
Operands
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
Address
2000
2003
2004
2005
23
7E
2006
2007 LOOP
2008
2009
200C
200D GO
200E
2011
2014
Q56.
Ans.
2004
2005
23
7E
2006
2007 LOOP
2008
2009
200C
200D GO
200E
2011
2014
H, 2500 H
C, M
H
A, M
DCR
INX
CMP
JNC
MOV
DCR
JNZ
STA
HLT
C
H
M
GO
A, M
C
LOOP
2405 H
Machine
Codes
21, 00, 25
4E
INX
MOV
0D
23
BE
D2, 0D, 20
7E
0D
C2, 07, 20
32, 50, 24
76
Mnemonics
Operands
LXI
MOV
H, 2500 H
C, M
H
A, M
DCR
INX
CMP
JC
MOV
DCR
JNZ
STA
HLT
C
H
M
GO
A, M
C
LOOP
2405 H
Find the sum of series of 8-bit numbers, sum is 8-bit.
Memory
Address
2000
2003
2004
2006
2007
2008
2009
200C
200F
Q58.
Ans.
LXI
MOV
Find the smallest number from an array.
Memory
Address
2000
2003
Q57.
Ans.
Codes
21, 00, 25
4E
INX
MOV
0D
23
BE
D2, 0D, 20
7E
0D
C2, 07, 20
32, 50, 24
76
35/42
Machine
Codes
21, 00, 25
4E
3E, 00
MVI
23
INX
86
0D
C2, 06, 24
32, 50, 24
76
Mnemonics
Operands
LXI
MOV
H, 2500 H
C, M
A, 00
H
ADD
DCR
JNZ
STA
HLT
M
C
GO
2450 H
Find multiplication of 2 8-bits numbers , product is 16-bit.
Memory
Machine
Mnemonics
Operands
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
Address
2000
2003
Codes
2A, 00, 25
EB
2004
3A, 03, 25
LDA
2007
21,00,00
LXI
200A
0E,08
200C LOOP
29
200D
17
RAL
200E
D2, 0C, 20
JNC
2011
19
DAD
2012 GO
0D
2013
C2, 0C, 20
2016
22,04,25
SHLD
2019
76
HLT
LHLD
XCHG
MVI
DAD
36/42
2501 H
2503 H
H, 0000
C, 08
H
GO
D
DCR
JNZ
C
LOOP
2504
Q59. Write division of two 8 bit number using assembly language of Intel 8085.
Ans. Memory
Machine Mnemonics Operands
Comments
Address
Codes
2000
2003
2004
2006
2007
CMP
2009
2012
2013
2014
2017 LOOP
2020
2021
2024
21,50,41
46
0E,00
23
7E
B
DA,17,20
90
0C
C3,08,20
32,52,41
79
32,53,41
76
LXI
H,4150
MOV
B,M
Get dividend in RegisterB
MVI
C,00
Clear RegisterC as quotient
INX
H
MOV
A,M
Get the divisor in RegisterA 2008 NEXT B8
Compare RegisterA with B
JC
LOOP
Jump on carry, to loop
SUB
B
Subtract Registor A from B
INR
C
Increment content of Reg C
JMP
NEXT
Jump to next
STA
4152
Store the remainder
MOV
A,C
STA
4153
Store the quotient
HLT
Q60. Write a program in assembly language to find square of a Number.
Ans. Memory
Machine Mnemonics Operands Comments
Address
Codes
2000
2003
2006
2009
2010
2011
2012
2013
2014
2015
2016
2018
2021
21,00,62
11,00,61
01,00,70
BACK:
6F
7E
02
13
77
79
FE,05
C2,09,20
76
LXI
LXI
LXI
1A
MOV
MOV
STAX
INX
INX
MOV
CPI
JNZ
HLT
H, 6200H
D, 6100H
B, 7000H
Initialize lookup table pointer
Initialize source memory pointer
Initialize destination memory pointer
LDAX
D
Get the number
L, A
A point to the square
A, M
Get the square
B
Store the result in memory location
D
Increment source memory pointer
B
Increment destination memory pointer
A, C
05H
Check for last number
BACK
If not repeat
Terminate program Execution
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
37/42
Note: - This program will Find the square of the given numbers from memory
location 6100H and store the result at memory location 7000H.
Instructions of 8085 with opcode and size in bytes: Sr. No.
Mnemonics Operand
Opcode
Bytes
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
ACI
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADC
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADD
ADI
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANI
CALL
CC
CM
CMA
CMC
Data
A
B
C
D
E
H
L
M
A
B
C
D
E
H
L
M
Data
A
B
C
D
E
H
L
M
Data
Label
Label
Label
CE
8F
88
89
8A
8B
8C
8D
8E
87
80
81
82
83
84
85
86
C6
A7
A0
A1
A2
A3
A4
A5
A6
E6
CD
DC
FC
2F
3F
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
2
3
3
3
1
1
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
CMP
CMP
CMP
CMP
CMP
CMP
CMP
CMP
CNC
CNZ
CP
CPE
CPI
CPO
CZ
DAA
DAD
DAD
DAD
DAD
DCR
DCR
DCR
DCR
DCR
DCR
DCR
DCR
DCX
DCX
DCX
DCX
DI
EI
HLT
IN
INR
INR
INR
INR
INR
INR
INR
A
B
C
D
E
H
L
M
Label
Label
Label
Label
Data
Label
Label
B
D
H
SP
A
B
C
D
E
H
L
M
B
D
H
SP
Port-address
A
B
C
D
E
H
L
BF
B8
B9
BA
BB
BC
BD
BD
D4
C4
F4
EC
FE
E4
CC
27
09
19
29
39
3D
05
0D
15
1D
25
2D
35
0B
1B
2B
3B
F3
FB
76
DB
3C
04
0C
14
1C
24
2C
38/42
1
1
1
1
1
1
1
1
3
3
3
3
2
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
INR
INX
INX
INX
INX
JC
JM
JMP
JNC
JNZ
JP
JPE
JPO
JZ
LDA
LDAX
LDAX
LHLD
LXI
LXI
LXI
LXI
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
M
B
D
H
SP
Label
Label
Label
Label
Label
Label
Label
Label
Label
Address
B
D
Address
B
D
H
SP
A, A
A, B
A, C
A, D
A, E
A, H
A, L
A, M
B, A
B, B
B, C
B, D
B, E
B, H
B, L
B, M
C, A
C, B
C, C
C, D
C, E
34
3
13
23
33
DA
FA
C3
D2
C2
F2
EA
E2
CA
3A
0A
1A
2A
01
11
21
31
7F
78
79
7A
7B
7C
7D
7E
47
40
41
42
43
44
45
46
4F
48
49
4A
4B
39/42
1
1
1
1
1
3
3
3
3
3
3
3
3
3
3
1
1
3
3
3
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MVI
C, H
C, L
C, M
D, A
D, B
D, C
D, D
D, E
D, H
D, L
D, M
E, A
E, B
E, C
E, D
E, E
E, H
E, L
E, M
H, A
H, B
H, C
H, D
H, E
H, H
H, L
H, M
L, A
L, B
L, C
L, D
L, E
L, H
L, L
L, M
M, A
M, B
M, C
M, D
M, E
M, H
M, L
A, Data
4C
4D
4E
57
50
51
52
53
54
55
56
5F
58
59
5A
5B
5C
5D
5E
67
60
61
62
63
64
65
66
6F
68
69
6A
6B
6C
6D
6E
77
70
71
72
73
74
75
3E
40/42
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
MVI
MVI
MVI
MVI
MVI
MVI
MVI
NOP
ORA
ORA
ORA
ORA
ORA
ORA
ORA
ORA
ORI
OUT
PCHL
POP
POP
POP
POP
PUSH
PUSH
PUSH
PUSH
RAL
RAR
RC
RET
RIM
RLC
RM
RNC
RNZ
RP
RPE
RPO
RRC
RST
RST
RST
B, Data
C, Data
D, Data
E, Data
H, Data
L, Data
M, Data
A
B
C
D
E
H
L
M
Data
Port-Address
B
D
H
PSW
B
D
H
PSW
0
1
2
06
0E
16
1E
26
2E
36
00
B7
B0
B1
B2
B3
B4
B5
B6
F6
D3
E9
C1
D1
E1
F1
C5
D5
E5
F5
17
1F
D8
C9
20
07
F8
D0
C0
F0
E8
E0
0F
C7
CF
D7
41/42
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100
Microprocessor System (Bsc-4)
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
RST
RST
RST
RST
RST
RZ
SBB
SBB
SBB
SBB
SBB
SBB
SBB
SBB
SBI
SHLD
SIM
SPHL
STA
STAX
STAX
STC
SUB
SUB
SUB
SUB
SUB
SUB
SUB
SUB
SUI
XCHG
XRA
XRA
XRA
XRA
XRA
XRA
XRA
XRA
XRI
XTHL
3
4
5
6
7
A
B
C
D
E
H
L
M
Data
Address
Address
B
D
A
B
C
D
E
H
L
M
Data
A
B
C
D
E
H
L
M
Data
DF
E7
EF
F7
FF
C8
9F
98
99
9A
9B
9C
9D
9E
DE
22
30
F9
32
02
12
37
97
90
91
92
93
94
95
96
D6
EB
AF
A8
A9
AA
AB
AC
AD
AE
EE
E3
42/42
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
3
1
1
3
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
2
1
Prepared By. Vaishnoo Maa Computers, SCO 145, Chotti Baradari, Patiala.
Ph. 0175-2205100,2215100