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Low Voltage, 300 MHz Quad 2:1 Mux Analog HDTV Audio/Video Switch ADG794 FEATURES FUNCTIONAL BLOCK DIAGRAM Bandwidth: 300 MHz Low insertion loss and on resistance: 5 Ω typical On-resistance flatness: 0.7 Ω typical Single 3.3 V/5 V supply operation Low quiescent supply current: 1 nA typical Fast switching times tON, 7 ns tOFF, 5 ns TTL/CMOS compatible ESD protection 2 kV human body model (HBM) 200 V machine model (MM) 1 kV field-induced charged device model (FICDM) ADG794 S1A D1 S1B S2A D2 S2B S3A D3 S3B S4A D4 S4B EN IN 05150-001 1 OF 2 DECODER Figure 1. APPLICATIONS RGB switches HDTV DVD-R Audio/video switches GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG794 is a monolithic CMOS device comprising four 2:1 multiplexers/demultiplexers with high impedance outputs. The CMOS process provides low power dissipation yet gives high switching speed and low on resistance. The on-resistance variation is less than 1.2 Ω over the input signal range. 1. Wide bandwidth: 300 MHz. 2. Ultralow power dissipation. 3. Crosstalk: −70 dB (typical) at 10 MHz. 4. Off isolation: −65 dB (typical) at 10 MHz. The wide bandwidth of the ADG794 (300 MHz typical), coupled with low distortion (0.18% typical), makes the part suitable for switching analog audio/video signals. 5. ESD protection tested as per ESD Association Standards: The ADG794 operates from a single 3.3 V/5 V supply and is TTL logic compatible. The switches are controlled by the logic inputs IN and EN, as shown in Table 4. The EN pin allows the user to disable all switches. 2 kV HBM (ANSI/ESD STM5.1-2001) 200 V MM (ANSI/ESD STM5.2-1999) 1 kV FICDM (ANSI/ESD STM5.3.1-1999) These switches conduct equally well in both directions when on. In the off condition, signal levels up to the supplies are blocked. The ADG794 switches exhibit break-before-make switching action. The ADG794 is available in a 16-lead QSOP. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2004–2008 Analog Devices, Inc. All rights reserved. ADG794* Product Page Quick Links Last Content Update: 08/30/2016 Comparable Parts Reference Materials View a parametric search of comparable parts Product Selection Guide • Switches and Multiplexers Product Selection Guide Documentation Application Notes • AN-1024: How to Calculate the Settling Time and Sampling Rate of a Multiplexer • AN-802: ADG794 - A 2.5 V Input Signal Range Swithcing Solution for HDTV • AN-944: Signal Bandwidth vs. Resolution for Analog Video • AN-945: System Bandwidth vs. Resolution for Analog Video Data Sheet • ADG794: Low Voltage, 300 MHz Quad 2:1 Mux Analog HDTV Audio/Video Switch Data Sheet Design Resources Reference Designs Technical Support • CN0371 Submit a technical question or find your regional support number • • • • ADG794 Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints Discussions View all ADG794 EngineerZone Discussions Sample and Buy Visit the product page to see pricing options * This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page does not constitute a change to the revision number of the product data sheet. This content may be frequently modified. ADG794 TABLE OF CONTENTS Features ...................................................................................................1 ESD Caution ......................................................................................5 Applications............................................................................................1 Pin Configuration and Function Descriptions .................................6 Functional Block Diagram ...................................................................1 Terminology...........................................................................................7 General Description ..............................................................................1 Typical Performance Characteristics ..................................................8 Product Highlights ................................................................................1 Typical Application ...............................................................................9 Revision History ....................................................................................2 Test Circuits .........................................................................................10 Specifications..........................................................................................3 Outline Dimensions............................................................................12 Single Supply ......................................................................................3 Ordering Guide ...............................................................................12 Absolute Maximum Ratings.................................................................5 REVISION HISTORY 2/08—Rev A to Rev B 4/06—Rev. 0 to Rev. A Changes to Absolute Maximum Ratings Section, Table 3 .......... 5 Updated Outline Dimensions ....................................................... 12 Changes to Ordering Guide .......................................................... 12 Changes to Features Section ............................................................1 Changes to Product Highlights Section .........................................1 Changes to Specifications Section...................................................3 Changes to Typical Performance Characteristics .........................8 10/04—Revision 0: Initial Version Rev. B | Page 2 of 12 ADG794 SPECIFICATIONS SINGLE SUPPLY VDD = 5 V ± 10%, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, ∆RON 25°C B Version 1 TMIN to TMAX 0 to 2.5 5 7 0.4 8 1.2 On-Resistance Flatness, RFLAT(ON) 0.7 1.35 LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 tON, tON (EN) ±0.001 ±0.001 ±0.001 3 ns typ ns max ns typ ns max ns typ ns min dB typ dB typ MHz typ % typ pC typ pF typ pF typ pF typ CL = 35 pF; RL = 50 Ω VS = 2 V; Figure 11 CL = 35 pF; RL = 50 Ω VS = 2 V; Figure 11 CL = 35 pF; RL = 50 Ω VS1 = VS2 = 2 V; Figure 12 f = 10 MHz; RL = 50 Ω; Figure 14 f = 10 MHz; RL = 50 Ω; Figure 15 RL = 50 Ω; Figure 13 RL = 100 Ω CL = 1 nF; VS = 0 V; Figure 16 −65 −70 300 0.18 7.5 8 14 23 VDD = 5.5 V; digital inputs = 0 V or VDD 0.001 1 2 VS = 3 V/1 V; VD = 1 V/3 V; Figure 9 VS = 3 V/1 V; VD = 1 V/3 V; Figure 9 VD = VS = 3 V/1 V; Figure 10 VIN = VINL or VINH 1 1 nA typ nA typ nA typ VD = 0 V to 1 V; IS = −10 mA μA typ μA max pF typ 8 Off Isolation Channel-to-Channel Crosstalk Bandwidth −3 dB THD + N Charge Injection CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD VD = 0 V to 1 V; IS = −10 mA VD = 0 V to 1 V; IS = −10 mA; Figure 8 ±0.1 3 14 Break-Before-Make Time Delay, tD V Ω typ Ω max Ω typ Ω max Ω typ Ω max V min V max 7 5 Test Conditions/Comments 2.0 0.8 0.001 tOFF, tOFF (EN) Unit Temperature range for B version is −40°C to +85°C. Guaranteed by design, not subject to production test. Rev. B | Page 3 of 12 μA typ μA max ADG794 VDD = 3 V ± 10%, GND = 0 V. All specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match between Channels, ∆RON B Version 1 TMIN to TMAX 25°C 0 to 1.5 7 9.5 0.3 11 0.9 On-Resistance Flatness, RFLAT(ON) 2.6 5 LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 tON, tON (EN) ±0.001 ±0.001 ±0.001 3 VS = 2 V/1 V; VD = 1 V/2 V; Figure 9 VS = 2 V/1 V; VD = 1 V/2 V; Figure 9 VD = VS = 2 V/1 V; Figure 10 VIN = VINL or VINH ns typ ns max ns typ ns max ns typ ns min dB typ dB typ MHz typ % typ pC typ pF typ pF typ pF typ CL = 35 pF; RL = 50 Ω VS = 1.5 V; Figure 11 CL = 35 pF; RL = 50 Ω VS = 1.5 V; Figure 11 CL = 35 pF; RL = 50 Ω VS1 = VS2 = 1.5 V; Figure 12 f = 10 MHz; RL = 50 Ω; Figure 14 f = 10 MHz; RL = 50 Ω; Figure 15 RL = 50 Ω; Figure 13 RL = 100 Ω CL = 1 nF; VS = 0 V; Figure 16 −65 −70 300 0.18 4 8 14 23 VDD = 3.3 V; digital inputs = 0 V or VDD 0.001 1 2 VD = 0 V to 1 V; IS = −10 mA μA typ μA max pF typ 1 1 VD = 0 V to 1 V; IS = −10 mA ±0.1 3 10 Off Isolation Channel-to-Channel Crosstalk Bandwidth −3 dB THD + N Charge Injection CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD VD = 0 V to 1 V; IS = −10 mA; Figure 8 V min V max 16 Break-Before-Make Time Delay, tD Test Conditions/Comments 2.0 0.8 10 6 V Ω typ Ω max Ω typ Ω max Ω typ Ω max nA typ nA typ nA typ 0.001 tOFF, tOFF (EN) Unit Temperature range for B version is −40°C to +85°C. Guaranteed by design, not subject to production test. Rev. B | Page 4 of 12 μA typ μA max ADG794 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 3. Parameters VDD to GND Analog, Digital Inputs 1 Continuous Current, S or D Peak Current, S or D Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature QSOP Package, Power Dissipation θJA Thermal Impedance Lead Temperature, Soldering Reflow, Peak Temperature Time at Peak Temperature 1 Ratings −0.3 V to +6 V −0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 100 mA 300 mA (pulsed at 1 ms, 10% duty cycle maximum) −40°C to +85°C −65°C to +150°C 150°C 566 mW 149.97°C/W Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. Table 4. Truth Table 260(+0/−5)°C 20 sec to 40 sec EN IN D1 D2 D3 D4 Function 1 0 0 X 0 1 High-Z S1A S1B High-Z S2A S2B High-Z S3A S3B High-Z S4A S4B Disable IN = 0 IN = 1 ESD CAUTION Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Rev. B | Page 5 of 12 ADG794 IN 1 S1A 16 VDD 15 EN ADG794 14 S4A TOP VIEW (Not to Scale) 13 S4B 2 S1B 3 D1 4 S2A 5 12 D4 S2B 6 11 S3A D2 7 10 S3B GND 8 9 D3 05150-002 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 2. Pin Configuration Table 5. Pin Function Descriptions Pin N0. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Mnemonic IN S1A S1B D1 S2A S2B D2 GND D3 S3B S3A D4 S4B S4A EN VDD Description Logic Control Input. The logic level at this input controls the operation of the multiplexers (see Table 4). A-Side Source Terminal of Mux1. Can be an input or an output. B-Side Source Terminal of Mux1. Can be an input or an output. Drain Terminal of Mux1. Can be an input or an output. A-Side Source Terminal of Mux2. Can be an input or an output. B-Side Source Terminal of Mux2. Can be an input or an output. Drain Terminal of Mux2. Can be an input or an output. Ground Reference. Drain Terminal of Mux3. Can be an input or an output. B-Side Source Terminal of Mux3. Can be an input or an output. A-Side Source Terminal of Mux3. Can be an input or an output. Drain Terminal of Mux4. Can be an input or an output. B-Side Source Terminal of Mux4. Can be an input or an output. A-Side Source Terminal of Mux4. Can be an input or an output. Mux Enable Logic Input. Enables or disables the multiplexers (see Table 4). Positive Power Supply Voltage. Rev. B | Page 6 of 12 ADG794 TERMINOLOGY VDD Most positive power supply potential. CS (Off) Off switch source capacitance. Measured with reference to ground. IDD Positive supply current. CD (Off) Off switch drain capacitance. Measured with reference to ground. GND Ground (0 V) reference. CD, CS (On) On switch capacitance. Measured with reference to ground. S Source terminal. Can be either an input or an output. CIN Digital input capacitance. D Drain terminal. Can be either an input or an output. tON Delay time between the 50% and the 90% points of the digital input and switch on condition. IN Logic control input. tOFF Delay time between the 50% and the 90% points of the digital input and switch off condition. VD (VS) Analog voltage on Terminal D and Terminal S. RON Ohmic resistance between Terminal D and Terminal S. tBBM On or off time measured between the 80% points of both switches when switching from one to another. RFLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. ΔRON On-resistance match between any two channels. Off Isolation A measure of unwanted signal coupling through an off switch. IS (Off) Source leakage current with the switch off. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. −3 dB Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. THD + N The ratio of the harmonic amplitudes plus the noise of a signal to the fundamental. Rev. B | Page 7 of 12 ADG794 TYPICAL PERFORMANCE CHARACTERISTICS 0 VDD = 5V RL = 50Ω TA = 25°C –1 VDD = 5V RL = 50Ω TA = 25°C ATTENUATION (dB) OFF ISOLATION (dB) –2 –30 –50 –70 –3 –4 –5 –6 –7 –8 05150-003 –90 –110 0.1 1 10 100 05150-015 –10 –9 –10 0.1 1000 1 10 FREQUENCY (MHz) Figure 3. Off Isolation vs. Frequency Figure 5. Bandwidth 0 –20 1000 100 FREQUENCY (MHz) 4.5 VDD = 5V RL = 50Ω TA = 25°C VDD = 5V TA = 25°C NO LOAD CURRENT 4.0 OUTPUT VOLTAGE (V) –40 –60 –80 3.0 2.5 2.0 1.5 1.0 –100 1 10 100 0 1000 FREQUENCY (MHz) 05150-016 –120 0.1 0.5 05150-004 CROSSTALK (dB) 3.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 INPUT VOLTAGE (V) Figure 4. Crosstalk vs. Frequency Figure 6. Output Voltage vs. Input Voltage Rev. B | Page 8 of 12 4.5 5.0 ADG794 TYPICAL APPLICATION ADG794 R R OUTPUT G RGB VIDEO SIGNAL SOURCE 1 G OUTPUT B OUTPUT B AUDIO/SYNC/ OTHER OUTPUT AUDIO/SYNC/OTHER SIGNAL SOURCE 1 R RGB VIDEO SIGNAL SOURCE G 2 EN IN 05150-005 B AUDIO/SYNC/OTHER SIGNAL SOURCE 2 Figure 7. Audio/Video Switch Rev. B | Page 9 of 12 ADG794 TEST CIRCUITS IDS V1 S D ID (OFF) VS VD Figure 8. On Resistance S NC A D NC = NO CONNECT Figure 10. On Leakage 5V 0.1µF VIN 3V VDD 50% VOUT D VS RL 50Ω IN CL 35pF 50% 90% 90% VOUT tOFF 05150-009 tON GND EN Figure 11. Switching Times 5V 0.1µF VDD 3V S1A D1 S1B RL 50Ω VS CL 35pF VIN 50% 50% 0V VOUT DECODER 80% tD EN tD GND 05150-010 IN 80% VS Figure 12. Break-Before-Make Time Delay VDD 0.1µF ADG794 NETWORK ANALYZER S1A 50Ω VS IN VIN D1 EN GND VOUT 50Ω 05150-011 VS VOUT A VD Figure 9. Off Leakage S ID (ON) Figure 13. Bandwidth Rev. B | Page 10 of 12 05150-008 RON = V1/IDS A 05150-007 VS IS (OFF) D 05150-006 S ADG794 VDD 0.1µF ADG794 NETWORK ANALYZER S1A 50Ω 50Ω VS IN VIN VOUT D1 GND 05150-012 EN 50Ω Figure 14. Off Isolation VDD 0.1µF NETWORK ANALYZER ADG794 S1A 50Ω VS VOUT S2A RL 50Ω IN D2 D1 VIN 50Ω 50Ω GND 05150-013 EN Figure 15. Channel-to-Channel Crosstalk 5V VDD ADG794 VS S1A CL 1nF S1B S2A CL 1nF S2B S3A CL 1nF S3B S4A CL 1nF S4B D1 VOUT 3V VEN D2 VOUT VOUT D3 VOUT ΔVOUT QINJ = CL × ΔVOUT D4 VOUT 1 OF 2 DECODER EN IN 05150-014 RS Figure 16. Charge Injection Rev. B | Page 11 of 12 ADG794 OUTLINE DIMENSIONS 0.197 (5.00) 0.193 (4.90) 0.189 (4.80) 16 9 1 0.158 (4.01) 0.154 (3.91) 0.150 (3.81) 8 0.010 (0.25) 0.006 (0.15) 0.069 (1.75) 0.053 (1.35) 0.065 (1.65) 0.049 (1.25) 0.010 (0.25) 0.004 (0.10) COPLANARITY 0.004 (0.10) 0.244 (6.20) 0.236 (5.99) 0.228 (5.79) SEATING PLANE 0.025 (0.64) BSC 0.012 (0.30) 0.008 (0.20) 8° 0° 0.050 (1.27) 0.016 (0.41) 0.020 (0.51) 0.010 (0.25) 0.041 (1.04) REF 012808-A COMPLIANT TO JEDEC STANDARDS MO-137-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 17. 16-Lead Shrink Small Outline Package [QSOP] (RQ-16) Dimensions shown in inches and (millimeters) ORDERING GUIDE Model ADG794BRQZ1 ADG794BRQZ-500RL71 ADG794BRQZ-REEL1 ADG794BRQZ-REEL71 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 16-Lead Shrink Small Outline Package (QSOP) 16-Lead Shrink Small Outline Package (QSOP) 16-Lead Shrink Small Outline Package (QSOP) 16-Lead Shrink Small Outline Package (QSOP) Z = RoHS Compliant Part. ©2004–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05150-0-2/08(B) Rev. B | Page 12 of 12 Package Option RQ-16 RQ-16 RQ-16 RQ-16