Download CS2253 COMPUTER ORGANIZATION AND ARCHITECTURE

CS2253 COMPUTER ORGANIZATION AND ARCHITECTURE
Question bank
UNIT I
BASIC STRUCTURE OF COMPUTERS
Part – A( 2Marks)
1. What is meant by the stored program concept?
2. What are the basic functional units of a computer?
3. What is the use of buffer register?
4. Define memory access time.
5. Write the differences between RISC and CISC.
6. What is meant by MAR and MDR?
7. What is an interrupt?
8. Why data bus is bidirectional in most microprocessors?
9. What do you mean by multiprogramming or multitasking?
10. Give the basic performance equation.
11. What are the limitations of assembly language?
12. What are the two techniques used to increase the clock rate R?
13. What are big-endian and little-endian representations?
14. What is the information conveyed by addressing modes?
15. What are the different types of addressing modes available?
16. What is indirect addressing mode?
17. What is indexed addressing mode?
18. Define auto increment mode of addressing?
19. Define auto decrement mode of addressing?
20. What are condition code flags?
21. What is the use of assembler directive?
22. What is meant by straight – line sequencing?
23. What is stack?
24. Which data structure is best supported using indirect addressing mode?
25. What are the differences between Stack and Queue?
26. What is byte addressable memory?
27. What is big endian and Little endian format?
28. Define clock rate?
29. What is the function of ALU?
30. Draw the full adder circuit using two half adders and give the truth table.
31. Why floating point number is more difficult to represent and process than integer?
32. What are the two approaches used to reduce delay in adders?
33. What is a carry look-ahead adder?
34. Discuss the principle behind the Booth’s algorithm?
35. How can we speed up the multiplication process?
36. What is bit pair recoding? Give an example.
37. What are the two methods of achieving the 2’s complement?
38. What is the advantage of using Booth algorithm?
39. Write the algorithm for restoring division.
40. Write the algorithm for non restoring division.
41. Define IEEE floating point single and double precision standard.
42. When can you say that a number is normalized?
43. Explain about the special values in floating point numbers.
44. Write the Add/subtract rule for floating point numbers.
45. Write the multiply rule for floating point numbers.
46. What is the purpose of guard bits?
47. What are the ways to truncate the guard bits?
48. Define carry save addition (CSA) process.
49. What are generated and propagate function?
50. What is excess-127 format?
51. What is a ripple carry adder?
52. Draw the structure of 4-bit MSI ALU circuit block.
53. What are the various ways of representing signed integers in the system?
54. Give the booth’s recoding and bit pair recoding of the number 1000011100100101.
55. When performing signed division, the sign of the remainder should be the same as the
sign of
the dividend. Why?
Part – B
1. Explain the basic functional units of a simple computer. (8)
2. Explain the basic I/O operations of modern processors. (8)
3. Explain various addressing modes found in modern processors (16)
4. Explain various assembler directives used in assembly language program (8)
5. What are stack and queues? Explain its use and give its differences (10)
6. What are the various types of ISAs possible? Discuss. (8)
7. Discuss the various issues to be considered while designing the ISA of a processor.(8)
8. Write the difference between CISC and RISC.
9. Discuss the principle of operation of carry-look ahead adders. (8)
10. Discuss the non-restoring division algorithm. Simulate the same for 23/5. (8)
11. Multiply the following pair of signed 2’s complements numbers using bit pair
recoded multiplier: Multiplicand = 110011 Multiplier = 101100. (8)
12. With a neat sketch, Explain in detail about logic design for fast adders. (16)
13. Describe how the floating-point numbers are represented and used in digital
arithmetic operations. Give an example. (16)
14. Explain the representations of floating point numbers in detail. (6)
15. Design a multiplier that multiplies two 4-bit numbers. (6)
16. Give the block diagram of the hardware implementation of addition and subtraction
of signed number and explain its operations. (10)
17. Explain the working of floating point adder and subtractor. (10)
UNIT II
BASIC PROCESSING UNIT
Part – A( 2Marks)
1. What are the limitations of super scalar device?
2. Define pipeline speedup.
3. What is a processor clock?
4. Write down the control sequence for Move (R1), R2.
5. What is the function of a TLB (translation look-aside buffer)?
6. What is the WMFC step needed when reading from or writing to the main memory?
7. Define register file.
8. Name the methods for generating the control signals.
9. Define hardwired control.
10. Discuss the principle of operation of a micro programmed control.
11. Differentiate micro programmed control from hardwired control.
12. Define parallelism in microinstruction.
13. What are the types of microinstructions available?
14. Differentiate horizontal microinstruction from vertical microinstruction.
15. What is MFC?
16. What is the principle of Nanoprogramming?
17. Write the various actions required to fetch a word from memory.
18. Write the control sequence for execution of the instruction Add(R3), R1.
19. Write the control sequence for an unconditional branch instruction.
Part – B
1. Give the organization of typical hardwired control unit and explain the functions
performed by the various blocks. (16)
2. With a neat block diagram, explain in detail about micro programmed control unit and
explain its operations. (16)
3. Explain the execution of an instruction with diagram. (8)
4. Explain the multiple bus organization in detail. (8)
5. Explain the instruction cycle highlighting the sub-cycles and sequence of steps to be
followed.(8)
6. Consider a processor is having single bus organization of the datapath inside a
processor. Write the sequence of control steps required for each of the following
instructions:
a) Add the (immediate) number NUM to register R1
b) Add the contents of memory location NUM to register R1.
c) Add the contents of the memory location whose address is at memory location
NUM to register R1.
UNIT 3
PIPELINING
PART A
1. What is pipelining?
2. What are the major characteristics of a pipeline?
3. What is a pipeline hazard?
4. What is data hazard?
5. What is instruction or control hazard?
6. Define structural hazards.
7. What is side effect?
8. What do you mean by branch penalty?
9. What is branch folding?
10. What do you mean by delayed branching?
11. What are the two types of branch prediction techniques available?
12. What is the ideal speedup expected in a pipelined architecture with n stages. Justify
your answer.
13. Draw the structure of two stage instruction pipeline.
14. What is RAW hazard?
15. What is WAW hazard?
16. What is the use of branch prediction technique?
17. What is the use of pipelining?
18. What are the characteristics of the MIPS Instruction Set Architecture (ISA) that
facilitate
pipelined execution?
PART B
1. Discuss the various hazards that might arise in a pipeline. What are the remedies
commonly adopted to overcome/minimize these hazards. (16)
2. Explain in detail about instruction execution characteristics. (16)
3. Explain the function of a six segment pipeline showing the time it takes to process
eight tasks.(10)
4. Highlight the solutions of instruction hazards. (6)
5. Define the terms "structural hazard", "control hazard", and "data hazard" in the context
of pipelines. Which of these hazards is addressed by a hardware branch predictor (which
guesses whether a branch will be taken or not)? For one of the other hazards, suggest a
way, either in software or hardware, the effect of that hazard could be reduced.
6. The five stages of the simple MIPS pipeline we covered in class are: instruction fetch,
instruction decode and register read, execute or calculate address, memory access, and
register write. Describe the purpose of each of these stages.
7. Define the terms "structural hazard", "control hazard", and "data hazard" in the context
of pipelines. Which of these hazards is addressed by a hardware branch predictor (which
guesses whether a branch will be taken or not)? For one of the other hazards, suggest a
way, either in software or hardware, the effect of that hazard could be reduced.
8. Define the terms "spatial locality" and "temporal locality", and explain how caches are
used to exploit them for a performance benefit. Be specific in the different ways that
caches exploit these two phenomena.
UNIT IV
MEMORY SYSTEM
Part – A (2Marks)
1. Define Memory Access time for a computer system with two levels of caches.
2. How to construct an 8M * 32 memory using 512 K * 8 memory chips.
3. Write two advantages of MOS device.
4. List the factors that determine the storage device performance.
5. What will be the width of address and data buses for a 512K * 8 memory chip?
6. Define memory cycle time.
7. What is RAM?
8. What is cache memory?
9. Explain virtual memory.
10. List the various semiconductors RAMs?
11. What do you mean by static memories?
12. Define DRAM’s.
13. Define DDR SDRAM.
14. What is ROM?
15. What is the mapping procedures adopted in the organizatio n of a cache Memory?
16. Give the format for main memory address using direct mapping function for 4096
blocks
in main memory and 128 blocks in cache with 16 blocks per cache.
17. Give the format for main memory address using associative mapping function for
4096
blocks in main memory and 128 blocks in cache with 16 blocks per cache.
18. Give the format for main memory address using set associative mapping function for
4096 blocks in main memory and 128 blocks in cache with 16 blocks per cache.
19. Define Hit and Miss rate?
20. What are the enhancements used in the memory management?
21. What is meant by memory management unit?
22. What is meant by memory interleaving?
23. What do you mean by seek time?
24. What is disk controller?
25. What is RAID?
26. Define data stripping?
27. How the data is organized in the disk?
28. Define latency time.
29. What is the significance of TLB?
Part – B
1. Discuss the various mapping techniques used in cache memories. (8)
2. A computer system has a main memory consisting of 16 M words. It also has a
32Kword cache organized in the block-set-associative manner, with 4 blocks per set and
128 words per block.
Calculate the number of bits in each of the TAG, SET and WORD fields of the main
memory address format.a)
How will the main memory address look like for a fully associative mapped cache?b) (8)
3. Explain the concept of virtual memory with any one virtual memory management
technique. (8)
4. Give the basic cell of an associative memory and explain its operation. Show how
associative memories can be constructed using this basic cell. (8)
5. Give the structure of semiconductor RAM memories. Explain the read and write
operations in detail. (16)
6. Explain the organization of magnetic disks in detail. (8)
7. A digital computer has a memory unit of 64K*16 and a cache memory of 1K words.
The cache uses direct mapping with a block size of four words. How many bits are there
in the tag, index, block and word fields of the address format? How many blocks can the
caches accommodate? (10)
8. Explain the concept of memory hierarchy. (6)
9. Define the terms "spatial locality" and "temporal locality", and explain how caches are
used to exploit them for a performance benefit. Be specific in the different ways that
caches exploit these two phenomena.
10. Suppose physical addresses are 32 bits wide. Suppose there is a cache containing
256K words of data (not including tag bits), and each cache block contains 4 words. For
each of the following cache configurations,
a. direct mapped
b. 2-way set associative
c. 4-way set associative
d. fully associative
specify how the 32-bit address would be partitioned. For example, for a direct mapped
cache, you would need to specify which bits are used to select the cache entry and which
bits are used to compare against the tag stored in the cache entry.
11. Draw the implementation of the 2-way set associative version of the above cache, at
the level of detail shown in figure 7.19 on page 574 of the text. Be sure to include the
logic for selecting the desired word of the cache block.
12. Cache misses can be characterized as one of the following: compulsory misses,
capacity misses, and conflict misses. Describe how each of these kinds of misses can be
addressed in the hardware.
13. Suppose you own a computer that exhibits the following properties on the programs
that you run:
the pipeline can accept a new instruction every cyclea)
the cache can provide data every cycle (i.e. no penalty for cache hits)b)
the instruction cache miss rate is 2.5%c)
the data cache miss rate is 3.5%d)
30% of instructions are memory instructionse)
the cache miss penalty is 80 cycles.f)
Suppose, also, that you have decided to purchase a new computer. For the budget
allocated, you can either
purchase a machine with a processor and cache that is twice as fast as your current one
(memory speed is the same as the old machine, though), or
purchase a machine with a processor and cache that is the same speed as your old
machine but in which the cache is twice as large.
Assume, for the purposes of this problem, that the cache miss rate for the programs you
run will drop by 40% with this larger cache (although this is generally not true in the real
world). Which computer are you best off purchasing? Explain in detail, showing the
relative performance of each choice.
14. Describe the number of bits required in each entry of a TLB that has the following
characteristics:
Virtual addresses are 32 bits widea)
Physical addresses are 31 bits wideb)
The page size is 2K bytesc)
The TLB contains 16 entries of the page tabled)
The TLB is direct-mappede)
UNIT V
I/O ORGANIZATION
Part – A (2Marks)
1. What are the functions of I/O interface?
2. How does the processor handle an interrupt request?
3. What are the necessary operations needed to start an I/O operation using DMA?
4. What are the three types of channel usually found in large computers?
5. Why does a DMA have priority over the CPU when both request a memory transfer?
6. What is the advantage of using interrupt initiated data transfer?
7. Why do you need DMA?
8. What is the difference between subroutine and interrupt service routine?
9. What is the need for interrupt masks?
10. How does bus arbitration typically works?
11. How does a processor handle an interrupt?
12. Distinguish synchronous bus and asynchronous bus.
13. Why I/O devices cannot be directly be connected to the system bus?
14. What are the major functions of I/O system?
15. What is an I/O interface?
16. Write the factors considered in designing an I/O subsystem?
17. Explain Direct Memory Access.
18. Define DMA controller.
19. What is polling?
20. What is the need of Interrupt controller?
21. What is a priority interrupt?
22. Define bus.
23. Define synchronous bus.
24. Define asynchronous bus.
25. State the differences between memory mapped I/O and I/O mapped I/O.
26. Define interrupt.
27. Define exception.
28. What are the different methods used for handling the situation when multiple
interrupts
occurs?
29. What is a privileged instruction?
30. What is bus arbitration?
31. What is port? What are the types of port available?
32. What is a parallel port?
33. What is a serial port?
34. What is PCI bus?
35. What is SCSI?
36. Define USB.
Part – B
1. Explain the functions to be performed by a typical I/O interface with a typical input
output
interface. (16)
2. Discuss the DMA driven data transfer technique. (8)
3. Discuss the operation of any two input devices (8)
4. Explain in detail about interrupt handling. (16)
5. Explain in detail about standard I/O interface. (16)
6. Describe the functions of SCSI with a neat diagram. (16)
7. What is the importance of I/O interface? Compare the features of SCSI and PCI
interfaces. (8)
8. Write note on the following.
a) Bus arbitration
b) Printer process communication
c) USB
d) DMA (16)
9. Explain the use of vectored interrupts in processes. Why is priority handling desired in
interrupt controllers? How does the different priority scheme work? (8)
CS2252 MICROPROCESSORS AND MICROCONTROLLERS
Question bank
UNIT 1 - THE 8085 AND 8086 MICROPROCESSORS
PART-A
1. What is Microprocessor? Give the power supply & clock frequency of 8085
2. What are the functions of an accumulator?
3. List the 16 – bit registers of 8085 microprocessor
4. List few applications of microprocessor-based system
5. List the allowed register pairs of 8085
6. Mention the purpose of SID and SOD lines
7. What is an Opcode?
8. What is the function of IO/M signal in the 8085?
9. What is an Operand?
10. How many operations are there in the instruction set of 8085
11. List out the five categories of the 8085 instructions. Give examples of the instructions
for each group
12. Explain the difference between a JMP instruction and CALL instruction
13. . Explain the purpose of the I/O instructions IN and OUT.
14. What is the difference between the shift and rotate instructions?
15. How many address lines in a 4096 x 8 EPROM CHIP?
16. What are the control signals used for DMA operation
17. What is meant by Wait State?
18. List the four instructions which control the interrupt structure of the 8085
microprocessor.
19. What is meant by polling?
20. What is meant by interrupt?
21. Explain priority interrupts of 8085.
22. What is a microcomputer?
23. What is the signal classification of 8085
24. What are operations performed on data in 8085
25. Steps involved to fetch a byte in 8085
26. How many interrupts does 8085 have, mention them
27. Basic concepts in memory interfacing
28. Define instruction cycle, ma chine cycle and T-state
29. What is an instruction?
30. What is the use of ALE
31. How many machine cycles does 8085 have, mention them
32. Explain the signals HOLD, READY and SID
33. Mention the ca tegories of instruction and give two examples for each category
34. Explain LDA, STA and DAA instructions
35. Explain the different instruction formats with examples
36. What is the use of addressing modes, mention the different types
37. What is the use of bi-directional buffers?
38. Give the register organization of 8085
39. Define stack and explain stack related instructions
40. Why do we use XRA A instruction
41. Compare CALL and PUSH instruction
42. What is Microcontroller and Microco mputer
43. Define Flags
44. How does the microprocessor differentiate between data and instruction.
PART-B
1. Explain the arhitecture of microprocessors 8085.
2. Explain the pin diagram of 8085.
3. Explain the requirement of a program counter,stack pointer and status flags in the
architecture of 8085 microprocessor.
4. Explain the memory mapped i/o addressing scheme.
5. Draw and explain the timing diagram of memory read cycle.
6. Draw and explain the timing diagram of memory write cycle with example.
7. Draw and explain the timing diagram of opcode fetch cycle.
8. Explain the direct addressing modes and indirect addressing modes of 8085 with
example.
9. Assume that the accumulator contents data bytes 88 hand instruction MOV C, A 4FH
is fetched. List the steps decoding and executing the instruction.
10. Draw the functional block diagram of 8085 microprocessor and explain.
11. Write a Program to Perform the following functions and verify the output steps:
a. Load the number 5CH in register D
b. Load the number 9E H in register C
c. Increment the Contents of register C by one.
d. Add the contents of register C and D and Display the sum at output port1.
12. Write an assembly language program to find out the largest number from a given
unordered array of 8 bit numbers, stored in the locations starting from a known address.
13. With suitable examples explain 8085 instruction set in detail.
14. With suitable examples explain 8085 addressing modes in detail.
15. Explain 8085 Stack in detail.
16. Write a 8085 ALP to generate a accurate time delay of 100ms.
17. Write 8085 assembly language program to SORT an array of 10 bytes in Descending
order.
18. Explain 8085 stack in detail
UNIT 2 - 8086 SOFTWARE ASPECTS
PART-A
1. How do 8086 interrupts occur
2. What are the 8086 interrupt types
3. What is interrupt service routine
4. Define BIOS
5. Explain PUBLIC
6. Explain DUP
7. Compare Procedure & Macro
8. What is the purpose of segment registers in 8086?
9. Define pipelining?
10. Discuss the function of instruction queue in 8086?
11. What is the maximum memory size that can be addressed by 8086?
12. What is the function of the signal in 8086?
13. What are the predefined interrupts in 8086?
14. What are the different flag available in status register of 8086?
15. List the various addressing modes present in 8086?
16. How single stepping can be done in 8086?
17. State the significance of LOCK signal in 8086?
18. What are the functions of bus interface unit (BIU) in 8086?
19. What is the clock frequency of 8086?
20. What are the two modes of operations present in 8086?
21. Explain the process control instructions
22. Explain REPEAT-UNTIL statements
23. What is multiprogramming
24. Differentiate between absolute and linear select decoding?
25. What are the three classifications of 8086 interrupts?
26. What are the functions of status pins in 8086?
PART-B
1. Describe Intel 8086 Microprocessor Architecture
2. Describe any five addressing modes of 8086 with suitable examples.
3. Write a 8086 ALP to convert an 8 bit binary number into equivalent gray code.
4. Explain the function of all the pins of 8086 Processor.
5. Write a 8086 ALP to sort an array of ten bytes in ascending order. Add comments to
your Program.
6. Explain the function of various flags of 8086 microprocessor.
7. Explain the function of unsigned multiplication and Division instructions in 8086 with
suitable examples.
8. Describe the functional units present and their functions in BIU and EU of 8086.
9. Write 8086 assembly language program to perform the following
a. To move a string of words from offset 1000h to offset 6000h. The
Length of the string is 0Ch.
b. To add an array of bytes. The array contains 50bytes.
UNIT 3 - MULTIPROCESSOR CONFIGURATIONS
PART-A
1. What are the configurations used for physical interconnections?
2. What is Closely Coupled Configuration?
3. What is Loosely Coupled Configuration
4. What is a data amplifier?
5. What are the different inter connection topologies?
6. Give the instruction set of 8087?
7. What are the different data types commonly used.
8. Write the advantages of loosely coupled system over tightly coupled systems?
9. Define Coprocessor.
10. Explain the different methods of data transfer possible between MPU and I/O.
11. What is the main use of I/O processor.
12. Difference between Loosely and Tightly Coupled Configuration
13. What is the need of Co-processors? Give an example.
14. What are the drawbacks of using tightly Coupled Configuration.
15. What are the major blocks available in 8089 architecture.
16. explain how CPU communicate with IOP.
17. What are the advantages of using 8087 Numeric Data Processor.
PART-B
1. Explain in detail about the different types of coprocessor configurations.
2. Explain briefly about loosely Coupled Configuration.
3. Explain briefly about tightly coupled configuration.
4. Explain in detail with an example about the various data types.
5. Describe in detail about the Architecture of 8089 I/O Processor.
6. Describe the different techniques in which how CPU can communicate with IOP.
7. Explain the difference between data processor and IO processor.
UNIT 4 - I/O INTERFACING
PART-A
1. What is the use of 8251 chip?
2. What are the different types of methods used for data transmission?
3. What are the various programmed data transfer methods?
4. What is synchronous data transfer?
5. What is asynchronous data transfer?
6. What are the functional types used in control words of 8251
7. What are the basic modes of operation of 8255?
8. Write the features of mode 0 in 8255?
9. What are the features used mode 1 in 8255?
10. What are the signals used in input control signal & output control signal?
11. What are the features used mode 2 in 8255?
12. What are the different types of write operations used in 8253?
13. What are the modes of operations used in 8253?
14. Give the different types of command words used in 8259a?
15. Give the operating modes of 8259a?
16. Define scan counter?
17. What is the output modes used in 8279?
18. What are the modes used in keyboard modes?
19. What are the modes used in display modes?
20. What is the use of modem control unit in 8251?
21. Give the register organization of 8257?
22. What is the function of DMA address register?
23. What is the use of terminal count register?
24. What is the function of mode set register in 8257?
25. Distinguish between the memories mapped I/O peripheral I/O?
26. List the operation modes of 8255
27. What is a control word?
28. What is the purpose of control word written to control register in 8255?
29. What is the size of ports in 8255?
30. What is interfacing?
31. What is memory mapping?
32. What is I/O mapping?
33. What is an USART?
34. What is the use of 8251 chip?
35. The 8279 is a programmable __________ interface.
36. List the major co mponents of the keyboard/Display interface
37. What is Key bouncing?
38. Define HRQ?
39. What is the use of stepper motor?
40. What is TXD?
41. What is RXD?
42. Draw the status word format for 8254.
43. What is meant by key bouncing?
44. Write the function of crossbar switch?
PART-B
1. With a neat block diagram, explain in detail the internal architecture of 8255 and its
registers
2. Discuss how memory chips and I/O devices are interfaced to a microprocessor.
3. Explain the block diagram of the 8279 Keyboard/Display interface and its operations.
4. Draw a timing diagram to interface a 4K ROM and a 2K RAM consecutively with
microprocessor 8085, starting with ROM interfacing at address 0000 H. Explain.
5. Discuss various Addressing modes of 8085 with suitable examples.
6. What are the various types of Data formats?Explain with examples.
7. Explain five interrupt inputs of 8085 with priority.
8. What are Hardware and Software Interrrupts?What is ISS?
9. Draw a diagram to interface a 6K ROM and a 2K RAM consecutively with
microprocessor 8085, starting with ROM interfacing at address 8000 H.
10. What is Interrupt ?Explain enabling,disabling and masking of interrupts with
examples.How to transfer data using interrupts.
11. Expailn how to use an RST instruction to implement a software breakpoint.
12. Explain an interrupt process and the difference between a maskable and nonmaskable interrupt by using examples.
13. Interface a 10 or 12-bit D/A converter with an 8-bit microprocessor.
14. Design a circuit to interface an 8-bit D/A conveter with an 8-bit microprocessor and
verify the analog output for a digital signal.
15. . Explain the block diagram of the 8155 I/O section and timer.
16. .Explain the function of Handshake signals.What is the difference between setting the
8155 I/O ports in ALT 1 and ALT 3.
17. Design a five-minute clock(timer using the 8254 and the interrupt technique.
Display minutes and seconds.
18. Explain how the 8237 DMA controller transfers 64K bytes of data per channel with
eight address lines.
19. Specify handshaking signals and their functions if port A of 8255 is set-up as input
port in mode 1.
20. .explain mode 0 and mode 1 of 8253.
21. Explain terms synchronous,baud rate,parity,half and full duplex transmission.
22. Explain how data bits are transmitted in the asynchronous format,and calculate the
the delay required between two successive bits for a given baud.
23. Explain the block diagram and the functions of each block of the 8251 USART
(Programmable Communication Interface).
24. Write a short note on the following:
a) machine cycle
b) instruction cycle
c) execute cycle
d) Vectored interrupt
25. Interface a 8K RAM consecutively with microprocessor 8085, starting with ROM
interfacing at address 8000 H.
26. Define Addresing modes,Data formats with examples.
27. . Describe a scheme to demultiplex the multiplexed AD0-AD7 bus of 8085CPU.
28. . Set up the 8255 I/O ports in the simple I/O and Bit Set/Reset(BSR) mode
29. . Explain . the process of the Direct Memory Acess(DMA) and the functions of
various elements of the 8237.
30. Expain the procedure of interfacing the temperature monitoring system with 8085.
UNIT 5 MICROCONTROLLERS
PART-A
1. What is mean by microcontroller?
2. Explain DJNZ instructions of intel 8051 microcontroller?
3. State the function of RS1 and RS0 bits in the flag register of intel 8051
microcontroller?
4. Write a program using 8051 assembly language to change the date 55H stored in the
lower byte of the data pointer register to AAH using rotate instruction.
5. Give the alternate functions for the port pins of port3?
6. Specify the single instruction, which clears the most significant bit of B
7. Explain the function of the pins PSEN and EA of 8051
8. Explain the 16-bit registers DPTR and SP of 8051
9. Name the special functions registers available in 8051.
10. Explain the register IE format of 8051
11. Compare Microprocessor and Microcontroller
12. Name the five interrupt sources of 8051?
13. List the features of 8051 microcontroller.
14. Name any four additional hardware features available in microcontrollers when
compared to microprocessors.
15. List out the Hardware Resources available in 8051.
16. When 8051 is reset, all interrupts are disabled. How to enable these interrupts?
17. What is nested interrupts?
18. How will you double the baud rate in 8051?
19. Explain software and hardware methods to start and stop timers in 8051.
20. Give steps to program 8051 for serial data transfer.
21. Write short notes on interrupt priority.
22. Write the vector address and priority sequence of 8051 interrupts
23. Write a delay routine for 1 millisecond using timer 0 of 8051 for 12 MHz crystal
frequency.
PART-B
1. Describe the architecture of 8051 with neat diagram. (16)
2. Discuss the peripheral interface of 8051. (8)
3. Explain the interrupt structure of 8051 microcontroller
4. Explain how interrupts are prioritized. (8)
5.What is the difference between the Microprocessorsand Microcontrollers?(8)
6.Explain the I/O port structure of 8051. (8)
7. Explain the different serial communication modes in 8051. (8)
8. Explain the memory structure of 8051. (8)
9. States various modes available for timer in 8051. (16)
10. Explain the functional pin diagram of 8051 Microcontroller. (16)