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TRANSMETA CRUSOE
Scott Lasak
Professor Robert Dewar
Microprocessors
05/12/02
Transmeta Corporation’s Crusoe microprocessor has the potential to revise the
way microprocessors are designed and implemented in the future. The design moves
much of the processor’s responsibilities from the hardware to software. This has
dramatically reduced the number of transistors compared to other current
microprocessors. In addition, the overall size of the chip has decreased. Coupled
together, these two attributes have produced a chip that performs like its counter parts,
yet produces very little heat and a low power consumption of about 1 watt.1 The Crusoe
can boast a power consumption savings of 60% to 70% less than other processors. The
special power management software, nicknamed LongRun allows the processor to
“dynamically adjust the processor frequency and voltage on the fly.”2 Want more? The
Crusoe still has one more truly remarkable aspect that Transmeta has not bragged about
yet. It may be that they are waiting for the right moment to make their mark on the
industry though. The Crusoe was developed to be fully compatible with the x86.
However, it is not limited to solely this compatibility. Instead, the software that takes
over so much of the hardware’s responsibilities could be written to dynamically translate
any platform’s code to the Crusoe’s underlying hardware.
To better understand the current “beast” that is Transmeta’s Crusoe, a brief look
into its origins will reveal more about its design.
Going back to 1994, Apple had just
switched to the PowerPC CPU to keep up with Intel’s 80x86 series. In order to maintain
compatibility with Apple’s previous Motorola 680x0 series the new PowerPC needed an
emulator to run 680x0, one then turned out to run faster than the previous high end Apple
http://murl.microsoft.com/LectureDetails.asp?596 Transmeta’s Crusoe: A Low-Power x86-Compatible
Microprocessor built with Software.
2
See footnote #1
1
Macintoshes. A new project was then started, after the IBM engineers took note of this,
to emulate the 80386+ architecture on a PowerPC. For whatever reasons that particular
project was later abandoned, but the concept was continued with the DAISY project
(Dynamically Architected Instruction Set from Yorktown). The DAISY, however,
translated code to a hypothetical VLIW (Very Long Instruction Word) CPU instead of
the PowerPC. The DAISY shared a particular feature with another later project called
Dynamo from Hewlett-Packard (which ran PA-RISC on PA-RISC). Both projects were
able to optimize code as they ran. In the case of the Dynamo, it could improve PA-RISC
performance by up to 20% over non-emulated code. From that point, several engineers
came together to found Transmeta Corporation. Transmeta provided the missing VLIW
processor that was previously only hypothetical and created a new dynamic translator to
emulate the 80x86, which they dubbed a “Code Morpher”.3
Now lets take a look at a few overall characteristics of the Crusoe chip. It is
based on a 4-wide 128-bit Very Long Instruction Word (VLIW) implementation. On
board are actually five processing units: a load/store unit (LSU), a branch unit (BU), a
floating-point unit (FPU), and two integer units (ALU). It also includes sixty-four 32-bit
registers. Each VLIW instruction word can have either 64-bits/two instructions (32*2) or
128-bit/four instructions (32*4). By utilizing the VLIW design, a four-operation
instruction can utilize 4 different processing units to execute in parallel. Also, with two
integer units (ALU), an instruction word can even contain 2 integer operations. It does
not support variable-length instruction groups, which poses a compatibility problem that
is common among VLIW. However, only the translator runs directly on the chip, so
http://www3.sk.sympatico.ca/jbayko/cpu6.html#Sec6Part5 Transmeta Crusoe – Leaving Hardware.
(January 2000).
3
compatibility with other software is not really a consideration.4 It has an in-order 7-stage
integer pipeline and a 10-stage floating-point pipeline. The hardware generates the same
condition codes as conventional x86 processors and operates on the same 80-bit floatingpoint numbers, in order to ease the translation process to the VLIW core instruction set.5
Because the Crusoe has a real VLIW under the hood benefiting from parallel instructions,
it has an instruction to select correct results after speculative execution. Emulated
registers are “check pointed” between blocks of optimized code so that exceptions cause
the block to be returned to its start point and the instructions can then be interpreted in
order. The Crusoe does this by taking the registers that contain information regarding the
x86 state and copies them into what is known as the “shadow copy.” If an exception
occurs, the working registers are dumped and the shadow copy is moved in. Loads are
protected and stores raise an exception, rather than automatically reloading from the
address. Multiple loads from a single address are moved into the exception handler, and
an alternate store instruction allows extra loads to be skipped if they are not needed. This
has the benefit of eliminating memory delays, instead of just reducing them as cache
does.6
First lets examine the Code Morphing software that makes this processors so
flexible. The aim of the software is to dynamically translate x86 instructions into VLIW
instructions that are then interpreted by the core hardware. The scheme is laid out in a
kind of hierarchy, in which the hardware Crusoe engine is at the lowest level. Then when
the processor is fired up the Code Morphing software is the first to launch, then comes
4
See footnote #3
http://www.transmeta.com/technology/specifications/tm5800.html Crusoe™ Processor Model TM5800.
6
See footnote #3
5
the x86 BIOS which can then continue to layer upwards with the x86 Operating System
and then any traditional applications. The Code Morphing software actually consists of
two separate modules that work together: the Interpreter and the Translator. The
Interpreter module is responsible for interpreting the x86 instructions one byte at a time
and then dispatching execution to the underlying VLIW instructions. It also has the
added functionality of filtering infrequently executed code by gathering run time
statistical information about the x86 instructions. If specific x86 code has been executed
several times the second module, the Translator, is called upon. The x86 code is then
translated into highly optimized and extremely fast VLIW native instructions. These
native translations reduce the number of instructions, increasing performance.
Additionally, after execution they are then cached for future use, so that when the same
x86 code is required the highly optimized cached translations can be immediately
recalled without the need to retranslate. By utilizing a Translation Cache, Code
Morphing exploits the degree of repetition typically found in real world workloads.
While normally the cost of optimizing code on the fly can result in slower performance,
the initial costs are amortized over the carefully analyzed needs of re-executing and use
of caching.7
“The Crusoe processor operates from a 0.9-1.3V core voltage supply at extremely
low power levels, even while the device is operating at very high performance.”8 With
conventional microprocessor designs approaching 40 million transistors, managing power
consumption can be challenging. Code Morphing already reduces the number of
transistors on the Crusoe by almost half that amount. In addition to their already energy
7
8
http://www.transmeta.com/technology/architecture/code_morphing.html Code Morphing™ software.
See footnote #5
efficient design, Transmeta’s power management technology, called LongRun, further
reduces power consumption. LongRun grants on the fly power reduction by varying the
CPU clock speed, as well as, the core power supply voltage “in response to adaptive
power management protocols that monitor processor load demands and control processor
power and performance levels.”9 LongRun has the unique advantage of savings that can
be measured cubically, while Legacy Power Management technologies can only control
processor speed resulting in linear savings. Primitive techniques such as Clock
Throttling choke the processor performance by letting the processor run at full speed and
near ineffective performance. Even Intel’s SpeedStep technology doesn’t have the fine
amount of control that LongRun has, missing the opportunities for further power gains.
It’s because LongRun has the ability to adjust both processor speed and voltage that it
can attain such low power consumption. The proof is that power varies linearly with
clock speed and by the square of voltage, adjusting both can produce cubic reductions
contrasting the linear savings of conventional CPUs. The LongRun technology works by
configuring the processor to be able to run at a number of different voltage and frequency
points. Then the LongRun algorithm embedded within the Code Morphing Software
monitors the Crusoe processor and is able to dynamically make changes between the preconfigured points as runtime conditions change. The true scheme behind the power
savings is that LongRun is designed “to provide just enough performance for the
processor workload at hand.”10
The compatibility of the Crusoe processor with x86 hardware and software is
9
See footnote #5
http://www.transmeta.com/technology/architecture/longrun.html LongRun® Power Management
Technology.
10
perhaps Transmeta’s greatest edge. The latest version, the TM5800, “was designed to
run with the full suite of x86 compatible operating systems, including Microsoft
Windows 98, Windows Me, Windows NT, Windows 2000 and the soon to be released
Windows XP. The TM5800 was also designed to work optimally with Linux and Midori
Linux Operating Systems.”11 While the company has definitely found its niche among
ultra-portable laptops and other mobile Internet computers (MICs), the ability to work
seamlessly with the markets most popular OS and software is a real selling point.
However, Transmeta has kept quite about the possibilities of working on other software
versions to it exceptional Code Morphing technology, and perhaps that’s going to be their
greatest edge in the future. They might just have the benchmark to a completely new
approach to processor design. A single processor die, with low power consumption,
thermal management, and an extremely small size that could be mass manufactured with
different software modules that are obviously not limited to x86 implementations. It will
be a revolutionary proposal when Transmeta decides to “license its technology to or
begins manufacturing for traditional silicon vendors who see the opportunity to build off
a single die and do everything else in software.”12 Further, Transmeta has recently made
the move to the server market. With the proliferation of “server farms,” considerations of
space and electrical consumption are two important cost factors for companies. Many
companies utilize a Performance/Per Watt/Per Cubic Foot matrix to determine
profitability. Again Transmeta’s Crusoe seems to have an edge to offer in another area of
computing. A Crusoe-powered server typically consumes at most one half the power of a
11
See footnote #5
http://www.ddj.com/documents/s=874/ddj0075c/0075c.htm Dorsey, John. Transmeta Blends Hard and
Software on New Crusoe Chip. (January 19, 2000).
12
server designed with a conventional microprocessor, and due to its low power
characteristics, it can be designed without cooling mechanisms such as a fan or bulky
heat sinks. A higher concentration of servers within a given space and a given power
budget creates a much more appealing set of results for every company. A Crusoe-based
server is suppose to deliver a minimum of five times the performance of a comparable
conventional server using the same power budget.13
Currently on the market, Transmeta Corporation offers five flavors of the Crusoe
processor. The TM3200 that clocks at 333, 366, and 400 Mhz and is targeted at Internet
mobile devices that draw on volatile memory instead of a disk drive. Coupled with the
Mobile Linux operating system (Midori) “users can expect a complete Internet
experience, including access to the full range of plug-in applications. Transmeta provides
Mobile Linux assistance to OEMs looking to accelerate their time to market with new
mobile Internet devices.”14 One additional note about Mobile Linux is that it can be
stored in solid state Flash ROM, removing the expense of hard drives required for other
larger operating systems. Then there are four other models in the Crusoe family:
TM5400 (500-700 MHz, 256K L2 Cache), TM5500 (0.13, 667-800MHz, 256K L2
Cache), TM5600 (500-700 MHz, 512K L2 Cache), and the TM5800 (0.13, 667-800
MHz, 512K L2 Cache).15 The new 0.13µm process technology allows the TM5800 to
run at speeds up to 800MHz while running significantly cooler than the TM5600. The
addition of the new CMS4.2 software and low power, high performance DDR SDRAM
13
http://www.transmeta.com/technology/benchmarks/server_bench.html Performance Under Server
Computing Workloads.
14
http://bwrc.eecs.berkeley.edu/CIC/announce/2000/tm3120.400.html Transmeta Breaks the Silence,
Unveils Smart Processor to Revolutionize Mobile Internet Computing.
15
http://www.gensw.com/pages/prod/bios/cpus/tm5x00.html Transmeta Crusoe TM5x00.
memory the TM5800 can provide a boost in performance of up to 50%.16 Of course with
speeds of up to 800 MHz these models are targeted at the newer ultra-light mobile PC’s.
The Crusoe, with its LongRun power management system, offers the longest running
mobile PCs at a high performance. PCs running the Windows operating system and
Microsoft Office applications could operate on a single battery for up to a full work day,
increasing the average user’s productivity. Market blessing? “’Our customers are telling
us that significant battery life improvement is the most requested feature by a margin of
two to one. That’s why Crusoe’s low power is so important,’ said Transmeta’s Jim
Chapman, vice president of sales and marketing. ‘The current mobile market needs to
evolve from today’s heavier (six to ten pound) laptops to lighter weight, high
performance mobile PCs. Crusoe will help propel that change.’”17
16
17
See footnote #11
See footnote #14
Works Cited
http://www.ddj.com/documents/s=874/ddj0075c/0075c.htm Dorsey, John. Transmeta
Blends Hard and Software on New Crusoe Chip. (January 19, 2000).
http://www.transmeta.com/technology/architecture/code_morphing.html Code
Morphing™ software.
http://www.transmeta.com/technology/specifications/tm5800.html Crusoe™ Processor
Model TM5800.
http://www.transmeta.com/technology/architecture/longrun.html LongRun® Power
Management Technology.
http://www.transmeta.com/technology/benchmarks/server_bench.html Performance
Under Server Computing Workloads.
http://bwrc.eecs.berkeley.edu/CIC/announce/2000/tm3120.400.html Transmeta Breaks
the Silence, Unveils Smart Processor to Revolutionize Mobile Internet Computing.
http://murl.microsoft.com/LectureDetails.asp?596 Transmeta’s Crusoe: A Low-Power
x86-Compatible Microprocessor built with Software.
http://www3.sk.sympatico.ca/jbayko/cpu6.html#Sec6Part5 Transmeta Crusoe – Leaving
Hardware. (January 2000).
http://www.gensw.com/pages/prod/bios/cpus/tm5x00.html Transmeta Crusoe TM5x00.