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Date: 22/09/2011 Submission Date:_/_/_ Chapter 5 Assignment: 1 No. Q:1 Q:2 Q:3 Q:4 M How does the designer minimize the percentage variation in IC , due to variation in ICO and VBE and due to variation in β in transistor amplifier circuit. Derive relationship between αdc and βdc of a transistor. Explain any one circuit which is used to improve the input impedance of the amplifier. Determine whether or not the transistor in below circuit is in saturation. Assume β =50 and VCE( sat) =0.3V, VBE =0.7V. GTU 03,2010 GTU 03,2010 GTU 03,2010 7 4 6 4 GTU 03,2010 Q:5 Compare various transistor amplifier configurations. Q:6 Draw and explain the input and output characteristics of p-n-p silicon transistor in CB configuration. Indicate cut off, saturation and active regions. Q:7 For following circuit , calculate the minimum and maximum value of emitter current when β of transistor varies from 75 to 150 . Also calculate the corresponding values of collector to emitter voltage. Take VBE = 0.3V, Rb=10k,Rc= 50, Re= 100 ohm, Vcc= +6V. GTU 03,2010 GTU 03,2010 4 6 GTU 03,2010 6 Q:8 Draw the circuit of CE configuration of transistor. ExplainInput and output characteristics. Derive α = β / β+1 GTU 12,2010 7 Date: 22/09/2011 Submission Date:_/_/_ Q:9 Q:10 Q:11 Q:12 Q:13 Where CC configuration is used? Draw circuit of CC and CB configuration of transistor. Compare current gain ,voltage gain ,input impedance and output impedance of both. A CE amplifier using npn transistor has load resistance RL connected between collector and Vcc supply of + 16 V For biasing resistor , R1 is connected between Vcc and base Resistor R2 = 30 kΩ is connected between base and ground. RE =1kΩ. Draw the circuit diagram and calculate the value of R1 , RC ,stability factor S if VBE = 0.2V, IEQ = 2 mA , VCEQ = 6 V , α = 0.985 GTU 12,2010 7 GTU 12,2010 7 Design a fixed bias circuit using silicon npn transistor Which has βdc = 150. The dc biasing point is VCE = 5V And Ic = 5 mA Supply voltage is 10V.Write advantages and disadvantages of fixed bias circuit. GTU 12,2010 7 Explain following for npn transistor. (i) Current components. (ii) Regions of operation according to biasing condition GTU 12,2010 5 Draw CE transistor configuration and give its input and output characteristics. Also derive the relation between current gain of CE, CB and CC configurations. GTU 12,2010 7