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An Alternative Configuration for Digitally Controlled Parallel Connected DC–DC Power Converters
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An Alternative Configuration for Digitally
Controlled Parallel Connected DC–DC Power
Converters
Siew-Chong Tan , Yuk-Ming Lai, and Kevin Yan-Chun Wong, Non-members
ABSTRACT
This paper proposes an alternative configuration
for digitally controlled parallel connected DC–DC
power converters. Unlike conventional scheme which
uses only one digital controller to control all of the
n parallel connected power converters, the proposed
scheme employs n digital controllers for n paralleled
power converters. This arrangement prevents single
controller breakdown from faulting the whole converter system, and therefore the reliability of the entire system is significantly improved. Furthermore,
the configuration also fixates the computation resources allocated to each converter, regardless of the
number of converter units employed. Experimental
results suggested that the digitally controlled power
converters function sufficiently in regulating the current distribution level under this configuration.
Keywords: Power converters, parallel connected,
digital control, active current sharing.
1. INTRODUCTION
With the advent of modern digital signal processors (DSP), the design of control for power electronics by digital technology has significantly changed.
Older types of digital controllers cannot replace conventional analog counterparts because of the difficulty
of programming and debugging in low level languages;
slow processing speed; and high cost, is no longer
valid. The advances of computer technology which
generates the production of ample types of low cost
and high speed DSP that can be programmed in various high level programming environments (like Visual C++, Code Composer etc.), have provided us
the window to reconsider the options of using digital
controller in power electronics. One such consideration is in the control of DC–DC power converters.
Literature review showed that earlier works on digitally controlled DC–DC power converter [1]-[4] were
targeted at high-end applications mainly for satellite or space systems. However, this is anachronistic. Today, there are many digital controlled stanManuscript received on July 15, 2005 ; revised on November
1, 2005.
The authors are with Applied Nonlinear Circuits and Systems Research Group, Department of Electronic & Information
Engineering, Hong Kong Polytechnic University, Hung Hom,
Hong Kong, China. e-mail: [email protected]
Fig.1:
Parallel-connected power converters with
centralized external digital controller.
dalone power supplies commercially available. This
is attributed to their advantages of being more flexible, noise robust, and reliable than analog controllers.
In comparison, the advantages of using digital controllers on parallel connected converters system over
single standalone converter units are more obvious:
1) Provision for interleaving: digital controller can
implement interleaving in paralleled converters more
easily than analog controller [4];
2) Allow easy implementation of different current
programming schemes, control structures, and complicated control laws, through software codings and
revisions.
3) Improved modularity: digital controlled converter
can easily be standardized, favoring mass manufacturing production;
However, contradictorily, little attention has been
given to the research or development of digitally controlled parallel connected DC–DC power converters.
In fact, the authors have found only few works [4],
[5], reporting in their attempts to run digitally controlled DC–DC power converters in parallel. Even so,
the controller used is a centralized digital controller
which is externally connected to control concurrently
all converters in parallel, as shown in Fig. 1. Although economical (only one controller is used for
all of the n paralleled converters), this configuration
has low reliability: since the failure of the controller
may easily lead to the failure the entire converter system. In addition, with n paralleled converters sharing
the limited computational resources of a single digital
controller, the performance of the system will deteriorate as n gets larger. This deterioration is even more
60 ECTI TRANSACTIONS ON ELECTRICAL ENG., ELECTRONICS, AND COMMUNICATIONS VOL.4, NO.1 FEBRUARY 2006
[8]. Hence our work and discussion will be based on
the active current sharing schemes.
2. 1 Control Structures
Fig.2: Parallel-connected power converters with distributed digital controllers in each power converter.
obvious for the digital controllers that are running
computationally exhaustive control programs.
Hence, in this paper, we propose an alternative
configuration for digitally controlled parallel connected converters. Following the philosophy of distributed computing, we use n sets of DSP to control n power converters in parallel. This forms a
decentralized system, whereby each power converters is controlled by an individual DSP, as illustrated
in Fig. 2. By obtaining information from peer converters through the control bus, each controller works
in solo to regulate its own power output, ensuring
even current distribution among different converters.
This is analogous to conventional paralleled converters with the distributed analog controllers setup [6].
The main advantages of this configuration over the
external controller configuration in Fig. 1, are that
computation power and resources allocated to control each converter is maintained regardless of the
number of converters in parallel, and that the reliability of the system is preserved since no single controller/converter failure can bring down the entire
system. The tradeoff of this arrangement is nevertheless the higher cost of the implementation, constituted by the n sets of DSP.
2. BRIEF REVIEW OF CONVENTIONAL
ANALOG PARALLELING SCHEMES
Paralleling of power converters inherits the problem of uneven current distribution, which results in
higher thermal stress on specific converters, thereby
reducing the system’s reliability, and also resulting in
an overall under-utilized system. Numerous control
schemes aiming to solve this problem had been proposed. According to [6], they can be classified into
two categories: the droops schemes [7], and the active current sharing schemes [8]. Among these, the
active current sharing control schemes, which individually comprises a combination of a specific control structure and a current-programming scheme, are
preferred over the droops schemes for their superiority in achieving near uniform current distribution [7],
There are two types of controller employed in active current sharing schemes: internal controller and
external controller. External controller configuration
was previously shown in Fig. 1, with the exception
that in conventional schemes, analog controller is employed instead. For internal controller, there are two
basic control structures, namely inner-loop regulation
and outer-loop regulation [6]. These structures varies
in the way their current sharing loops are arranged.
Inner loop regulation has the advantages of stable
current sharing and precise output voltage regulation, and the disadvantages of degraded modularity
and poor fault-tolerance. On the other hand, outer
loop regulation has the advantages of good modularity, flexibility, and fault tolerance, while its disadvantage is instable transient response [6]. Since each has
its merits and limitations, the choice of the control
structure is therefore dependent upon the required
applications.
2. 2 Current-Programming Schemes
There are three main types of current-programming
schemes: Average current sharing (ACS), Dedicated
Master/Slave current sharing (DMSCS), and Automatic Master/Slave current sharing (AMSCS) control schemes. ACS control scheme is the method of
current sharing whereby the reference current sharing signal, in which each converter tracks to achieve
uniform current distribution, is the weighted average
of all output converter current signals. For DMSCS
scheme, the output current of a specific converter
module is chosen as the reference signal. For AMSCS scheme, the highest (or lowest) output current
signal of the converters at any particular time, is automatically selected as the reference current signal.
Hence, like AVCS, both DMSCS and AMSCS control schemes perform their current sharing control by
having all their individual converters tracking the reference signal. Similarly, the choice of the schemes is
dependent upon their individual merits and limitations, and the required application.
3. PROPOSED DIGITALLY CONTROLLED
PARALLEL CONNECTED POWER CONVERTERS
A two cells parallel connected buck converters
using the TMS320LF2407A DSP chips as the controllers, under the outer-loop regulation control structure was constructed. The system was tested and
analyzed using the ACS scheme.
An Alternative Configuration for Digitally Controlled Parallel Connected DC–DC Power Converters
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Fig.5: Function block of the control scheme.
Fig.3:
unit.
Schematic diagram of one buck converter
Fig.4: Proposed parallel connected converters.
3. 1 Experimental Setup
Fig. 3 shows the schematic diagram of a single unit
of the converter system. The complete experimental
setup is shown in Fig. 4. The specifications of the
buck converters used in this prototype are shown in
Table 1. The total external loading for the paralleled
converters, RLOAD , is between 2.5 Ω to 20 Ω.
Table 1: Specifications of Buck Converter
Description
Parameter Nominal Value
Input voltage
VIN
30 V
Switching frequency
fS
100 kHz
Load resistance
RL
5Ω
Output voltage
Vo
10 V
Reference voltage
Vref
3.3 V
tion control, and an inner-loop PI average current
mode control component to perform the voltage regulation of the individual converter. The control equation can be expressed as
ki1
Vcn = (Iref − Ion + Vref − βVon ) kp1 +
− ILn (1)
s
ki2
× kp2 +
,
s
L2
where Iref = IL1 +I
and Ion = LPF (ILn ). Here, ILn
2
is the measured inductor current; Ion is the low frequency component of ILn ; Vref is the reference voltage; and βVon is the measured output voltage; kp1
and kp2 are the proportional gain constants; ki1 and
ki2 are the integral gain constants; and n = 1 or 2
is the converter unit number. Hence, by computing
for the control signal Vcn and then performing the
comparator operation using the internal ramp signal Vramp , a driving signal u to control the converter
unit is generated. It should be noted that the control
scheme involves a computationally intensive low pass
filter LPF in the form of a software routine in the
program, which saves the physical need for the low
pass filter as required in analog implementation.
3. 3 Advantages Over Analog Counterparts
1) Complex control idea which is sometimes difficult
to implement with analog hardware components is
easily implementable in software.
2) Soft starting, slope compensation, interleaving,
and fault protection can also be easily implemented
in software codes.
3) Changing of control methodology for different field
applications requires only software revision, and does
not require hardware modification.
4. EXPERIMENTAL RESULTS AND DISCUSSIONS
3. 2 Active Current Sharing Scheme
Fig. 5 shows the control mechanism of the active
sharing control scheme employed in the experiment.
This control mechanism has an average current sharing control component to perform current distribu-
Fig. 6(a) shows the inductor current waveforms of
the parallel connected converters operating without
the current sharing component in the control mechanism, during startup. The electronic load is set at
2 A. It can be observed that current distribution is
62 ECTI TRANSACTIONS ON ELECTRICAL ENG., ELECTRONICS, AND COMMUNICATIONS VOL.4, NO.1 FEBRUARY 2006
Fig.6: Startup inductor currents.
uneven with one converter dominating and supporting the entire current load.
Fig. 6(b) show the inductor current waveforms
of the parallel connected converters operating with
the average current sharing component in the control
mechanism, during startup. The electronic load is set
at 2 A. With the ACS control scheme incorporated,
the power converters reached even current distribution at around 0.072 s.
Fig. 7(a) shows the responses of the output voltage and inductor currents (at different ground levels)
of individual converter modules with respect to load
change from 2 A to 2.8 A. The time for the converters to settle to near-even current distribution is
around 3.5 ms. The output voltage undershoot during is about 1.05 V. Fig. 7(b) shows the responses
at step load change from 2.8 A to 2 A. The setting
time is around 3.5 ms. The output voltage overshoot
is about 1.00 V.
5. CONCLUSION
An alternative configuration for digitally controlled parallel connected DC–DC power converters
is proposed in this paper. The main advantages of
this configuration are that computation resources are
not affected by the number of converters in parallel,
and that the reliability of the system is significantly
improved in comparison with the previous configura-
Fig.7: Dynamic response of paralleled converters
(with ACS control) during step load changes.
tion. To proof the feasibility of the configuration, a
two cells parallel connected buck converters using the
T M S320LF 2407A DSP chips, is constructed. The
system was then tested and analyzed with the ACS
control scheme. The experimental results showed
that the DSPs functioned sufficiently in regulating
the parallel connected power converters under the
proposed configuration.
References
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An Alternative Configuration for Digitally Controlled Parallel Connected DC–DC Power Converters
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July 1992.
Siew-Chong Tan received the B.Eng.
(with honors) and M.Eng. degrees in
Electrical and Computer Engineering
from the National University of Singapore, Singapore, in 2000 and 2002,
respectively, and the Ph.D. degree in
Electronic and Information Engineering
from the Hong Kong Polytechnic University, Hong Kong, in 2005. He is currently a Postdoctoral Fellow with the
Hong Kong Polytechnic University. His
research interests include motor drives and power electronics.
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Y. M. Lai received the B.Eng. degree in Electrical Engineering from the
University of Western Australia, Perth,
Australia, in 1983, the M.Eng.Sc. degree in Electrical Engineering from University of Sydney, Sydney, Australia,
in 1986, and the Ph.D. degree from
Brunel University, U.K., in 1997. He is
an Assistant Professor with Hong Kong
Polytechnic University, Hong Kong, and
his research interests include computeraided design of power electronics and non-linear dynamics.
Kevin Y.C. Wong received the B.Eng.
(with honors) in Electronic and Information Engineering from the Hong Kong
Polytechnic University, Hong Kong, in
2005. He is currently working as an engineer in Karin Engineering Ltd., Hong
Kong.