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Transcript
KSH200
NPN Epitaxial Silicon Transistor
Features
•
•
•
•
D-PAK for Surface Mount Applications
High DC Current Gain
Lead Formed for Surface Mount Applications (No Suffix)
Straight Lead (I-PAK, “ - I “ Suffix)
D-PAK
1
1.Base
Absolute Maximum Ratings
I-PAK
1
2.Collector
3.Emitter
Ta = 25°C unless otherwise noted
Symbol
Value
Units
VCBO
Collector-Base Voltage
Parameter
40
V
VCEO
Collector-Emitter Voltage
25
V
VEBO
Emitter-Base Voltage
8
V
IC
Collector Current (DC)
5
A
ICP
Collector Current (Pulse)
10
A
IB
Base Current
1
A
PC
Collector Dissipation (Tc = 25°C)
12.5
W
Collector Dissipation (Ta = 25°C)
1.4
W
TJ
Junction Temperature
150
°C
TSTG
Storage Temperature
-55 to 150
°C
Electrical Characteristics
Symbol
BVCEO(sus)
Ta = 25°C unless otherwise noted
Parameter
Conditions
* Collector Emitter Sustaining Voltage IC = 100mA, IB = 0
Min.
Max.
25
Units
V
ICBO
Collector Cut-off Current
VCB = 40V, IE = 0
100
nA
IEBO
Emitter Cut-off Current
VEB = 8V, IC = 0
100
nA
hFE
* DC Current Gain
VCE = 1V, IC = 500mA
VCE = 1V, IC = 2A
VCE = 2V, IC = 5A
VCE(sat)
70
45
10
180
0.3
0.75
1.8
* Collector-Emitter Saturation Voltage IC = 500mA, IB = 50mA
IC = 2A, IB = 200mA
IC = 5A, IB = 1A
V
V
V
VBE(sat)
* Base-Emitter Saturation Voltage
IC = 5A, IB = 1A
2.5
V
VBE(on)
* Base-Emitter On Voltage
VCE = 1V, IC = 2A
1.6
V
Current Gain Bandwidth Product
VCE = 10V, IC = 100mA
Output Capacitance
VCB = 10V, IE = 0, f = 0.1MHz
fT
Cob
65
MHz
80
pF
* Pulse test: PW ≤ 300μs, Duty Cycle ≤ 2% Pulsed
© 2010 Fairchild Semiconductor Corporation
KSH200 Rev. B0
www.fairchildsemi.com
1
www.BDTIC.com/FAIRCHILD
KSH200 — NPN Epitaxial Silicon Transistor
August 2010
10
VCE(sat), VBE(sat) [V], SATURATION VOLTAGE
hFE, DC CURRENT GAIN
1000
100
VCE=2V
VCE=1V
10
1
0.01
0.1
1
10
IC=10IB
VBE(sat)
1
sat)
V CE(
0.1
0.01
0.01
0.1
1
10
IC[A], COLLECTOR CURRENT
IC[A], COLLECTOR CURRENT
Figure 1. DC current Gain
Figure 2. Base-Emitter Saturation Voltage
Collector-Emitter Saturation Voltage
10
1000
tR,tD[ns], TURN ON TIME
Cob[pF], CAPACITANCE
VCC=30V
IC=10IB
100
10
1
0.1
1
10
1
tR
0.1
tD
0.01
0.01
100
VCB[V], COLLECTOR BASE VOLTAGE
100
100
0.1
1
5m
s
s
DC
1
0.1
0.01
0.1
10
IC[A], COLLECTOR CURRENT
50
0
1mμs
μs
tF
10
0
10
IC[A], COLLECTOR CURRENT
VCC=30V
IC=10IB
IB1=-IB2
tSTG
tSTG,tF[ns], TURN OFF TIME
10
Figure 4. Turn On Time
1000
1
10
100
VCE[V], COLLECTOR-EMITTER VOLTAGE
Figure 5. Turn Off Time
Figure 6. Safe Operating Area
© 2010 Fairchild Semiconductor Corporation
KSH200 Rev. B0
1
IC[A], COLLECTOR CURRENT
Figure 3. Collector Output Capacitance
10
0.01
0.1
www.fairchildsemi.com
2
www.BDTIC.com/FAIRCHILD
KSH200 — NPN Epitaxial Silicon Transistor
Typical Performance Characteristics
KSH200 — NPN Epitaxial Silicon Transistor
Typical Performance Characteristics (Continued)
20.0
PC[W], POWER DISSIPATION
17.5
15.0
12.5
10.0
7.5
5.0
2.5
0.0
0
25
50
75
100
125
150
175
o
TC[ C], CASE TEMPERATURE
Figure 7. Power Derating
© 2010 Fairchild Semiconductor Corporation
KSH200 Rev. B0
www.fairchildsemi.com
3
www.BDTIC.com/FAIRCHILD
KSH200 — NPN Epitaxial Silicon Transistor
Physical Dimensions
D-PAK
2.30 ±0.10
MIN0.55
0.91 ±0.10
9.50 ±0.30
0.50 ±0.10
0.76 ±0.10
0.50 ±0.10
1.02 ±0.20
2.30TYP
[2.30±0.20]
(1.00)
(3.05)
(2XR0.25)
(0.10)
2.70 ±0.20
6.10 ±0.20
9.50 ±0.30
6.60 ±0.20
(5.34)
(5.04)
(1.50)
(0.90)
2.30 ±0.20
(0.70)
2.30TYP
[2.30±0.20]
(0.50)
0.89 ±0.10
MAX0.96
(4.34)
2.70 ±0.20
0.80 ±0.20
0.60 ±0.20
(0.50)
6.10 ±0.20
5.34 ±0.30
0.70 ±0.20
6.60 ±0.20
0.76 ±0.10
Dimensions in Millimeters
© 2010 Fairchild Semiconductor Corporation
KSH200 Rev. B0
www.fairchildsemi.com
4
www.BDTIC.com/FAIRCHILD
KSH200 — NPN Epitaxial Silicon Transistor
Physical Dimensions (Continued)
I-PAK
2.30 ±0.20
6.60 ±0.20
5.34 ±0.20
0.50 ±0.10
±0.20
6.10
±0.20
(0.50)
0.70
(4.34)
0.76 ±0.10
2.30TYP
[2.30±0.20]
±0.30
16.10
±0.20
±0.30
9.30
MAX0.96
1.80
0.80
±0.10
0.60
±0.20
(0.50)
0.50 ±0.10
2.30TYP
[2.30±0.20]
Dimensions in Millimeters
© 2010 Fairchild Semiconductor Corporation
KSH200 Rev. B0
www.fairchildsemi.com
5
www.BDTIC.com/FAIRCHILD
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
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MicroPak¥
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OptoHiT™
OPTOLOGIC®
OPTOPLANAR®
AccuPower¥
Auto-SPM¥
Build it Now¥
CorePLUS¥
CorePOWER¥
CROSSVOLT¥
CTL¥
Current Transfer Logic¥
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®
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®
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FACT®
FAST®
FastvCore¥
FETBench¥
FlashWriter®*
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®
PDP SPM™
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PowerTrench®
PowerXS™
Programmable Active Droop¥
QFET®
QS¥
Quiet Series¥
RapidConfigure¥
¥
Saving our world, 1mW/W/kW at a time™
SignalWise¥
SmartMax¥
SMART START¥
SPM®
STEALTH¥
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SuperSOT¥-3
SuperSOT¥-6
SuperSOT¥-8
SupreMOS®
SyncFET¥
Sync-Lock™
®
*
The Power Franchise®
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TINYOPTO¥
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TriFault Detect¥
TRUECURRENT¥*
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UHC®
Ultra FRFET¥
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* Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR
CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE
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EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to
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safety or effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative / In Design
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
Definition
Datasheet contains the design specifications for product development. Specifications may change in
any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes
at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.
The datasheet is for reference information only.
Rev. I49
© Fairchild Semiconductor Corporation
www.fairchildsemi.com
www.BDTIC.com/FAIRCHILD