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FDS4480
May 2013
FDS4480
40V N-Channel PowerTrench MOSFET
General Description
Features
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
low gate charge, low RDS(ON) and fast switching speed.
• 10.8 A, 40 V. RDS(ON) = 12 mΩ @ VGS = 10 V
• Low gate charge (29 nC)
• High performance trench technology for extremely
Applications
low RDS(ON)
• High power and current handling capability
• DC/DC converter
DD
DD
DD
D
D
SO-8
SS
Pin 1 SO-8
G
SS G
SS
Absolute Maximum Ratings
Symbol
5
4
6
3
7
2
8
1
o
TA=25 C unless otherwise noted
Ratings
Units
VDSS
Drain-Source Voltage
Parameter
40
V
VGSS
Gate-Source Voltage
+30/–20
V
ID
Drain Current
10.8
A
– Continuous
(Note 1a)
– Pulsed
45
Power Dissipation for Single Operation
PD
(Note 1a)
2.5
(Note 1b)
1.4
(Note 1c)
TJ, TSTG
Operating and Storage Junction Temperature Range
W
1.2
–55 to +175
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
50
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1c)
125
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
25
°C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS4480
FDS4480
13’’
12mm
2500 units
2002 Fairchild Semiconductor Corporation
FDS4480 Rev D1 (W)
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max Units
Drain-Source Avalanche Ratings (Note 2)
EAS
Drain-Source Avalanche Energy
IAS
Drain-Source Avalanche Current
Single Pulse, VDD=40V, ID=10.8A
240
mJ
10.8
A
Off Characteristics
ID = 250 µA
BVDSS
∆BVDSS
∆TJ
IDSS
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
VGS = 0 V,
Zero Gate Voltage Drain Current
VDS = 32 V,
VGS = 0 V
IGSSF
Gate–Body Leakage, Forward
VGS = 30 V,
VDS = 0 V
100
nA
IGSSR
Gate–Body Leakage, Reverse
VGS = –20 V, VDS = 0 V
–100
nA
On Characteristics
40
ID = 250 µA, Referenced to 25°C
V
42
mV/°C
µA
1
(Note 2)
VDS = VGS,
ID = 250 µA
VGS(th)
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source On–Resistance
3.9
–8
5
ID = 250 µA, Referenced to 25°C
2
V
VGS = 10 V, ID = 10.8 A
VGS = 10 V,ID = 10.8 A, TJ=125°C
8
13
12
21
ID(on)
On–State Drain Current
VGS = 10 V,
VDS = 5 V
gFS
Forward Transconductance
VDS = 10 V,
ID = 10.8 A
36
S
VDS = 20 V,
f = 1.0 MHz
V GS = 0 V,
1686
pF
mV/°C
22
mΩ
A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
Turn–Off Delay Time
tf
Turn–Off Fall Time
Qg
Total Gate Charge
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
384
pF
185
pF
(Note 2)
VDD = 20 V,
VGS = 10 V,
VDS = 20 V,
VGS = 10 V
ID = 1 A,
RGEN = 6 Ω
ID = 10.8 A,
12
22
ns
9
18
ns
30
48
ns
15
27
ns
29
41
nC
8.7
nC
8.0
nC
FDS4480 Rev D1 (W)
FDS4480
Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Drain–Source Diode Characteristics and Maximum Ratings
IS
0.7
trr
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
VGS = 0 V, IS = 2.1 A
(Note 2)
Voltage
Diode Reverse Recovery Time
IF = 10.8 A, diF/dt = 100 A/µs
27
nS
Qrr
Diode Reverse Recovery Charge
58
nC
VSD
2.1
A
1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 50°C/W when
2
mounted on a 1in
pad of 2 oz copper
b) 105°C/W when
2
mounted on a .04 in
pad of 2 oz copper
c) 125°C/W when mounted
on a minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS4480 Rev D1 (W)
FDS4480
Electrical Characteristics
FDS4480
Typical Characteristics
80
VGS = 10V
2
6.0V
5.5V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
70
60
50
5.0V
40
30
4.5V
20
10
0
0
1
2
3
VGS = 5.0V
1.8
1.6
5.5V
1.4
6.0V
1.2
7.0V
0
20
40
60
80
I D, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
2
0.025
ID = 5.4A
ID = 10.8A
VGS = 10V
1.8
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
10V
0.8
4
VDS, DRAIN TO SOURCE VOLTAGE (V)
1.6
1.4
1.2
1
0.8
0.6
0.4
0.022
0.019
o
TA = 125 C
0.016
0.013
0.01
o
TA = 25 C
0.007
-50
-25
0
25
50
75
100
125
150
4
175
5
o
6
7
8
9
10
VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
o
o
VDS = 5V
IS, REVERSE DRAIN CURRENT (A)
80
25 C
TA = -55 C
o
ID, DRAIN CURRENT (A)
8.0V
1
125 C
60
40
20
VGS = 0V
10
TA = 125oC
1
25oC
0.1
-55oC
0.01
0.001
0.0001
0
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
6
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS4480 Rev D1 (W)
FDS4480
Typical Characteristics
2400
VGS, GATE-SOURCE VOLTAGE (V)
10
ID = 10.8A
V D D = 15 V
f = 1 MHz
VGS = 0 V
2000
8
CAPACITANCE (pF)
V D D = 20 V
6
V D D = 25 V
4
2
CISS
1600
1200
800
COSS
400
CRSS
0
0
0
8
16
32
24
0
10
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
40
50
1ms
10ms
RDS(ON) LIMIT
10
P(pk), PEAK TRANSIENT POWER (W)
100µs
100ms
1s
10s
1
DC
VGS = 10V
SINGLE PULSE
RθJA = 125oC/W
0.1
TA = 25oC
0.01
0.01
0.1
1
10
100
SINGLE PULSE
RθJA = 125°C/W
TA = 25°C
40
30
20
10
0
0.001
0.01
0.1
1
10
100
1000
t 1, TIME (sec)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
30
Figure 8. Capacitance Characteristics.
100
ID, DRAIN CURRENT (A)
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
RθJA(t) = r(t) * R θJA
0.2
0.1
o
RθJA = 125 C/W
0.1
0.05
P(pk)
0.02
0.01
t1
t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS4480 Rev D1 (W)
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
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OPTOPLANAR
SyncFET™
FETBench™
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tm
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THEREIN, WHICH COVERS THESE PRODUCTS.
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2.
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
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Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
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Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I64