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Design Verification Engineers Exceptional design verification engineers sought to join a New York–based interdisciplinary research group that is developing multiple generations of the Anton special-purpose supercomputer with the aim of fundamentally transforming the process of drug discovery. Our project combines innovative, massively parallel architectures with algorithmic advances in computational biochemistry. Successful candidates will possess a graduate degree, an outstanding academic record, exceptional analytical and communication skills, extensive knowledge of hardware architecture, and hands-on experience with chip design and verification. Particularly relevant areas of expertise might include System Verilog constrained random verification driven by functional/code coverage metrics and UVM, OVM, and/or VMM verification of high-speed ASIC designs. Knowledge of emulation, formal verification, or DFT is a plus. Our aim is to add outstanding contributors and innovators to our small team of talented hardware engineers, who are working on large, high-performance designs (~400 mm^2, >50M gates) in cuttingedge process technologies. We are committed to fostering a stimulating, positive, and flexible work environment, and we are prepared to reward exceptionally well-qualified individuals with above-market compensation. To submit an application, please use the link provided below: http://www.deshawresearch.com/recruit/jobs/Oncampus/Saarland/DV D. E. Shaw Research does not discriminate in employment matters on the basis of race, color, religion, gender, pregnancy, national origin, age, military service eligibility, veteran status, sexual orientation, marital status, disability, or any other protected class. The D. E. Shaw Group 1166 Avenue of the Americas Ninth Floor New York, NY 10036