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2 Ω, CMOS, ±5 V/+5 V
SPST Switches
ADG601/ADG602
FUNCTIONAL BLOCK DIAGRAMS
Low on resistance, 2.5 Ω maximum
<0.65 Ω on-resistance flatness
Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies
Rail-to-rail input signal range
Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die
Low power consumption
TTL-/CMOS-compatible inputs
S
D
S
D
IN
ADG601
IN
ADG602
NOTES
1. SWITCHES SHOWN FOR A LOGIC 0 INPUT.
02619-001
FEATURES
Figure 1.
APPLICATIONS
Automatic test equipment
Power routing
Communication systems
Data acquisition systems
Sample-and-hold systems
Avionics
Relay replacement
Battery-powered systems
Table 1. Truth Table
ADG601 IN
0
1
ADG602 IN
1
0
Switch Condition
Off
On
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GENERAL DESCRIPTION
The ADG601/ADG602 are monolithic, CMOS single-pole
single-throw (SPST) switches with on resistance typically less
than 2.5 Ω. The low on-resistance flatness makes the
ADG601/ADG602 ideally suited to many applications,
particularly those requiring low distortion. These switches are
ideal replacements for mechanical relays because they are more
reliable, have lower power requirements, and are available in
much smaller package sizes.
The ADG601 is a normally open (NO) switch, and the ADG602
is a normally closed (NC) switch. Each switch conducts equally
well in both directions when the device is on, with the input
signal range extending to the supply rails.
The switches are available in tiny, 6-lead SOT-23; 8-lead MSOP;
and 820 μm × 2255 μm die.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Low on resistance (2 Ω typical)
Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V supplies
Tiny, 6-lead SOT-23; 8-lead MSOP; and 820 μm × 2255 μm die
Rail-to-rail input signal range
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2001–2007 Analog Devices, Inc. All rights reserved.
ADG601/ADG602
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Applications....................................................................................... 1
ESD Caution...................................................................................5
Functional Block Diagrams............................................................. 1
Pin Configurations and Function Descriptions ............................6
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................7
Product Highlights ........................................................................... 1
Terminology .......................................................................................9
Revision History ............................................................................... 2
Test Circuits..................................................................................... 10
Specifications..................................................................................... 3
Outline Dimensions ....................................................................... 11
Dual Supply ................................................................................... 3
Ordering Guide .......................................................................... 11
Single Supply ................................................................................. 4
REVISION HISTORY
3/07—Rev. B to Rev. C
Added Die Package.............................................................Universal
Changes to Specifications .................................................................3
Added Figure 4 and Table 6..............................................................6
Changes to Ordering Guide .......................................................... 11
Updated Outline Dimensions........................................................11
Changes to Ordering Guide ...........................................................11
6/03—Rev. 0 to Rev. A
Changes to Specifications.................................................................2
Changes to Ordering Guide .............................................................4
Updated Outline Dimensions..........................................................8
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3/06—Rev. A to Rev. B
Updated Format..................................................................Universal
Changes to 6-Lead SOT-23 (RJ-6) Pin Configuration .................6
Added Pin Function Descriptions Table ........................................6
Changes to Figure 19.........................................................................9
Rev. C | Page 2 of 12
ADG601/ADG602
SPECIFICATIONS
DUAL SUPPLY
VDD = 5 V ± 10%, VSS = –5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
+25°C
VSS to VDD
On-Resistance Flatness (RFLAT (ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
B Version 1
−40°C to +85°C
2
2.5
0.35
0.6
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
5.5
0.4
0.65
±1
±1
±1
2.4
0.8
0.005
2
80
120
45
75
250
−60
180
50
50
145
155
90
0.001
1.0
ISS
0.001
1.0
1
2
V
Ω typ
Ω max
Ω typ
Ω max
VDD = +4.5 V, VSS = –4.5 V
VS = ±4.5 V, IDS = −10 mA; see Figure 15
V min
V max
μA typ
μA max
pF typ
VS = ±3.3 V, IDS = −10 mA
VDD = +5.5 V, VSS = −5.5 V
VS = +4.5 V/−4.5 V, VD = −4.5 V/+4.5 V; see Figure 16
VS = +4.5 V/−4.5 V, VD = −4.5 V/+4.5 V; see Figure 16
VS = VD = +4.5 V or −4.5 V; see Figure 17
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Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 2
tON
Charge Injection
Off Isolation
Bandwidth −3 dB
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
Test Conditions/Comments
nA typ
nA max
nA typ
nA max
nA typ
nA max
±0.1
tOFF
Unit
ns typ
ns max
ns typ
ns max
pC typ
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
μA typ
μA max
Temperature range for B version is −40°C to +85°C.
Guaranteed by design, not subject to production test.
Rev. C | Page 3 of 12
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF
VS = 3.3 V; see Figure 18
RL = 300 Ω, CL = 35 pF
VS = 3.3 V; see Figure 18
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
RL = 50 Ω, CL = 5 pF; see Figure 21
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = +5.5 V, VSS = −5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
ADG601/ADG602
SINGLE SUPPLY
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
+25°C
B Version 1
−40°C to +85°C
0 V to VDD
On-Resistance Flatness (RFLAT (ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
3.5
5
0.2
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
8
0.2
0.6
±1
±1
±1
2.4
0.8
Unit
Test Conditions/Comments
V
Ω typ
Ω max
Ω typ
Ω max
VDD = 4.5 V
VS = 0 V to 4.5 V, IDS = −10 mA; see Figure 15
nA typ
nA max
nA typ
nA max
nA typ
nA max
2
V min
V max
μA typ
μA max
pF typ
110
220
50
80
20
−60
180
50
50
145
ns typ
ns max
ns typ
ns max
pC typ
dB typ
MHz typ
pF typ
pF typ
pF typ
0.005
±0.1
VS = 1.5 V to 3.3 V, IDS = –10 mA
VDD = 5.5 V
VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 16
VS = 4.5 V/1 V, VD = 1 V/4.5 V; see Figure 16
VS = VD = 4.5 V or 1 V; see Figure 17
VIN = VINL or VINH
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Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 2
tON
tOFF
Charge Injection
Off Isolation
Bandwidth –3 dB
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
280
110
0.001
1.0
1
2
Temperature range for B version is −40°C to +85°C.
Guaranteed by design, not subject to production test.
Rev. C | Page 4 of 12
μA typ
μA max
RL = 300 Ω, CL = 35 pF
VS = 3.3 V; see Figure 18
RL = 300 Ω, CL = 35 pF
VS = 3.3 V; see Figure 18
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 20
RL = 50 Ω, CL = 5 pF; see Figure 21
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = 5.5 V
Digital inputs = 0 V or 5.5 V
ADG601/ADG602
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog Inputs 1
Digital Inputs1
Continuous Current, S or D
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max)
Operating Temperature Range
Industrial (B Version)
Storage Temperature Range
Junction Temperature
Thermal Resistance
MSOP
θJA
θJC
SOT-23
θJA
θJC
Lead Temperature, Soldering (10 sec)
IR Reflow, Peak Temperature
Rating
13 V
−0.3 V to +6.5 V
+0.3 V to –6.5 V
VSS − 0.3 V to VDD + 0.3 V
−0.3 V to VDD + 0.3 V or
30 mA (whichever
occurs first)
100 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating may be applied at a time.
ESD CAUTION
200 mA
−40°C to +85°C
−65°C to +150°C
150°C
206°C/W
44°C/W
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1
229.6°C/W
91.99°C/W
300°C
220°C
Overvoltages at IN, S, or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
Rev. C | Page 5 of 12
ADG601/ADG602
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
3
4
12
S 2
ADG601/
ADG602
5
D
4
D 1
PIN 1
INDICATOR
8
S
NC 2
ADG601/
ADG602
7
GND
6
IN
5
VSS
NC 3
GND
VDD 4
TOP VIEW
(Not to Scale)
NC = NO CONNECT
Figure 2. 6-Lead SOT-23 (RJ-6)
11
10
6
7
9
8
Figure 3. 8-Lead MSOP (RM-8)
TOP VIEW
(Not to Scale)
02619-021
IN
02619-003
6
02619-002
PIN 1
INDICATOR
VSS 3
14
13
5
VDD 1
TOP VIEW
(Not to Scale)
1
2
Figure 4. Die (820 μm × 2255 μm)
Table 5. Pin Function Descriptions
Pin No.
6-Lead SOT-23 8-Lead MSOP
1
4
2
8
3
5
4
7
5
1
6
6
N/A
2, 3
Mnemonic
VDD
S
VSS
GND
D
IN
NC
Description
Most Positive Power Supply Potential.
Source Terminal. Can be an input or output.
Most Negative Power Supply Potential.
Ground (0 V) Reference.
Drain Terminal. Can be an input or output.
Logic Control Input.
No Connect.
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Table 6. Die Pad Coordinates 1
Die Pad No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Die Pad
Coordinates
X (μm)
Y (μm)
−265
+754
−265
+525
−265
+241
−265
+141
−265
−191
−265
−409
−265
−549
−265
−787
+265
−767
+265
−429
+265
−289
+265
+189
+265
+521
+265
+661
Mnemonic
NC
D
D
D
NC
NC
NC
VDD
VSS
IN
GND
S
S
NC
Description
No Connect.
Drain Terminal. Can be an input or output. 2
Drain Terminal. Can be an input or output.2
Drain Terminal. Can be an input or output.2
No Connect.
No Connect.
No Connect.
Most Positive Power Supply Potential.
Most Negative Power Supply Potential.
Logic Control Input.
Ground (0 V) Reference.
Source Terminal. Can be an input or output. 3
Source Terminal. Can be an input or output.3
Source Terminal. Can be an input or output.
1
Measured from the center of the die.
Bond the D pads together to a single point to preserve the on resistance and current handling capability. The common point acts as the drain pin of the switch.
3
Bond the S pads together to a single point to preserve the on resistance and current handling capability. The common point acts as the source pin of the switch.
2
Rev. C | Page 6 of 12
ADG601/ADG602
TYPICAL PERFORMANCE CHARACTERISTICS
5
5
TA = 25°C
+85°C
4
4
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
±2.5V
±3V
3
±3.3V
±4.5V
2
1
3
+25°C
2
–40°C
1
±5V
–3
–2
–1
0
1
VD, VS (V)
2
3
4
5
0
10
VDD = 2.7V
1.5
2.0
2.5
3.0
VD, VS (V)
3.5
4.0
0.3
LEAKAGE CURRENT (nA)
VDD = 3.0V
7
6
0.2
VDD = 4.5V
VDD = 3.3V
4
3
2
ID, IS (ON)
1
0
0.5
0
–0.1
ID (OFF)
IS (OFF)
–0.2
–0.3
VDD = 5.0V
TA = 25°C
VSS = 0V
5.0
0.1
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5
4.5
VDD = +5V
VSS = –5V
VD = ±4.5V
VS = 4.5V
0.4
–0.4
1.0
1.5
2.0
2.5
3.0
VD, VS (V)
3.5
4.0
4.5
5.0
–0.5
02619-005
Figure 6. On Resistance vs. VD, VS (Single Supply)
0
10
20
30
40
50
60
TEMPERATURE (°C)
70
80 85
Figure 9. Leakage Currents vs. Temperature (Dual Supply)
5
0.5
VDD = +5V
VSS = –5V
VDD = 5V
VSS = 0V
VD = 4.5V/1V
VS = 1V/4.5V
0.4
4
LEAKAGE CURRENT (nA)
0.3
3
+85°C
+25°C
2
1
0.2
ID, IS (ON)
0.1
0
–0.1
ID (OFF)
–0.2
IS (OFF)
–0.3
–40°C
–4
–3
–2
–1
0
1
VD, VS (V)
2
3
4
5
–0.5
02619-006
–5
–0.4
Figure 7. On Resistance vs. VD, VS for Different Temperatures (Dual Supply)
Rev. C | Page 7 of 12
0
10
20
30
40
50
60
TEMPERATURE (°C)
70
80 85
Figure 10. Leakage Currents vs. Temperature (Single Supply)
02619-008
ON RESISTANCE (Ω)
8
ON RESISTANCE (Ω)
1.0
0.5
9
0
0.5
Figure 8. On Resistance vs. VD, VS for Different Temperatures (Single Supply)
Figure 5. On Resistance vs. VD, VS (Dual Supply)
0
0
02619-009
–4
02619-004
–5
±
0
02619-007
VDD = 5V
VSS = 0V
ADG601/ADG602
500
0
TA = 25°C
450
–10
–20
350
OFF ISOLATION (dB)
VDD = +5V
VSS = –5V
300
250
200
VDD = +5V
VSS = 0V
150
–40
–50
–60
100
VDD = +5V
VSS = –5V
TA = 25°C
–70
50
–5
–4
–3
–2
–1
0
VS (V)
1
2
3
4
5
–80
0.2
02619-010
0
–30
Figure 11. Charge Injection vs. Source Voltage
1
10
FREQUENCY (MHz)
100
02619-012
CHARGE INJECTION (pC)
400
Figure 13. Off Isolation vs. Frequency
0
180
160
VDD = +5V
VSS = 0V
20
–20
–6
0
20
40
TEMPERATURE (°C)
–10
VDD = +5V
VSS = –5V
60
–8
80
VDD = +5V
VSS = –5V
TA = 25°C
–12
0.2
1
10
FREQUENCY (MHz)
100
Figure 14. On Response vs. Frequency
Figure 12. tON/tOFF Times vs. Temperature
Rev. C | Page 8 of 12
400
02619-013
tOFF
40
0
–40
–4
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80
60
ON RESPONSE (dB)
VDD = +5V
VSS = –5V
tON
02619-011
TIME (ns)
120
100
–2
VDD = +5V
VSS = 0V
140
ADG601/ADG602
TERMINOLOGY
VDD
Most positive power supply potential.
VINL
Maximum input voltage for Logic 0.
VSS
Most negative power supply potential.
VINH
Minimum input voltage for Logic 1.
IDD
Positive supply current.
IINL (IINH)
Input current of the digital input.
ISS
Negative supply current.
CS (Off)
Off switch source capacitance. Measured with reference to ground.
GND
Ground (0 V) reference.
CD (Off)
Off switch drain capacitance. Measured with reference to ground.
S
Source terminal. Can be an input or an output.
CD, CS (On)
On switch capacitance. Measured with reference to ground.
D
Drain terminal. Can be an input or an output.
CIN
Digital input capacitance.
IN
Logic control input.
tON
Delay between applying the digital control input and the output
switching on.
VD, VS
Analog voltage on Terminal D and Terminal S.
tOFF
Delay between applying the digital control input and the output
switching off.
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RON
Ohmic resistance between Terminal D and Terminal S.
RFLAT (ON)
Flatness is defined as the difference between the maximum and
minimum values of on resistance as measured over the specified
analog signal range.
IS (Off)
Source leakage current with the switch off.
ID (Off)
Drain leakage current with the switch off.
ID, IS (On)
Channel leakage current with the switch on.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
On Response
Frequency response of the on switch.
Insertion Loss
Loss due to the on resistance of the switch.
Rev. C | Page 9 of 12
ADG601/ADG602
TEST CIRCUITS
IDS
V1
A
D
ID (OFF)
VD
Figure 15. On Resistance
S
NC
A
VS
02619-014
VDD
VSS
VDD
VSS
NC = NO CONNECT
Figure 17. On Leakage
0.1µF
ADG601
50%
50%
50%
50%
VIN
S
VS
A
VD
Figure 16. Off Leakage
0.1µF
ID (ON)
D
VOUT
D
RL
300Ω
IN
VIN
ADG602
CL
35pF
90%
VOUT
90%
GND
tON
tOFF
02619-017
RON = V1/IDS
VS
S
02619-016
IS (OFF)
D
02619-015
S
Figure 18. Switching Times
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VS
VSS
VDD
VSS
S
D
VOUT
CL
1nF
IN
GND
VIN ADG601
ON
OFF
VIN ADG602
VOUT
ΔVOUT
QINJ = CL × ΔVOUT
02619-018
RS
VDD
Figure 19. Charge Injection
VSS
VDD
NETWORK
ANALYZER
VSS
VDD
S
50Ω
IN
VSS
0.1µF
0.1µF
0.1µF
NETWORK
ANALYZER
VSS
VDD
S
50Ω
50Ω
IN
VS
D
VS
D
RL
50Ω
GND
OFF ISOLATION = 20 log
VOUT
VS
VOUT
VIN
RL
50Ω
GND
02619-019
VIN
INSERTION LOSS = 20 log
Figure 20. Off Isolation
VOUT WITH SWITCH
VS WITHOUT SWITCH
Figure 21. Bandwidth
Rev. C | Page 10 of 12
VOUT
02619-020
VDD
0.1µF
ADG601/ADG602
OUTLINE DIMENSIONS
3.20
3.00
2.80
2.90 BSC
8
3.20
3.00
2.80
5
1
5.15
4.90
4.65
5
4
1
2
3
2.80 BSC
1.60 BSC
PIN 1
INDICATOR
4
0.95 BSC
PIN 1
0.65 BSC
0.95
0.85
0.75
1.30
1.15
0.90
1.10 MAX
0.15
0.00
6
0.38
0.22
0.23
0.08
8°
0°
SEATING
PLANE
COPLANARITY
0.10
0.80
0.60
0.40
1.90
BSC
1.45 MAX
0.15 MAX
0.50
0.30
0.22
0.08
SEATING
PLANE
10°
4°
0°
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-187-AA
COMPLIANT TO JEDEC STANDARDS MO-178-AB
Figure 22. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Figure 23. 6-Lead Small Outline Transistor Package [SOT-23]
(RJ-6)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
6-Lead SOT-23
6-Lead SOT-23
6-Lead SOT-23
6-Lead SOT-23
8-Lead MSOP
8-Lead MSOP
Package Option
RJ-6
RJ-6
RJ-6
RJ-6
RM-8
RM-8
Branding 1
STB
STB
STB#
STB#
STB
STB
ADG601BRM-REEL7
ADG601BRMZ2
ADG601BRMZ-REEL2
ADG601BRMZ-REEL72
ADG601CSURF
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
Die
RM-8
RM-8
RM-8
RM-8
STB
S1G
S1G
S1G
ADG602BRT-REEL
ADG602BRT-REEL7
ADG602BRTZ-REEL2
ADG602BRTZ-REEL72
ADG602BRM
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
6-Lead SOT-23
6-Lead SOT-23
6-Lead SOT-23
6-Lead SOT-23
8-Lead MSOP
RJ-6
RJ-6
RJ-6
RJ-6
RM-8
SUB
SUB
S18
S18
SUB
ADG602BRM-REEL
ADG602BRM-REEL7
−40°C to +85°C
−40°C to +85°C
8-Lead MSOP
8-Lead MSOP
RM-8
RM-8
SUB
SUB
−40°C to +85°C
8-Lead MSOP
RM-8
S18
−40°C to +85°C
8-Lead MSOP
RM-8
S18
Model
ADG601BRT-REEL
ADG601BRT-REEL7
ADG601BRTZ-REEL 2
ADG601BRTZ-REEL72
ADG601BRM
ADG601BRM-REEL
ADG602BRMZ2
2
ADG602BRMZ-REEL7
1
2
www.BDTIC.com/ADI
Branding on SOT-23 and MSOP is limited to three characters due to space constraints.
Z = RoHS Compliant Part, # denotes RoHS compliant product, may be top or bottom marked.
Rev. C | Page 11 of 12
ADG601/ADG602
NOTES
www.BDTIC.com/ADI
©2001–2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02619-0-3/07(C)
Rev. C | Page 12 of 12