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```Solutions of Homework 1
2.2 Convert 7fff fffahex to binary and decimal.
7fff fffahex =
0111 1111 1111 1111 1111 1111 1111 1010two =
2,147,483,642ten
2.3 Convert from binary to hexadecimal.
1100 1010 1111 1110 1111 1010 1100 1110two =
cafe facehex
2.4 Why doesn’t MIPS have a subtract immediate instruction?
Since MIPS includes add immediate and since immediates can
be positive or negative, subtract immediate would be
redundant.
2.5 Consider the following code used to implement the instruction
sllv \$s0, \$s1, \$s2
which uses the least significant 5 bits of the value in register
\$s2 to specify the amount register \$s1 should be shifted left:
start:
.data
.word 0xfffff83f
.text
lw \$s0, shifter
and \$s0,\$s0,\$t0
andi \$s2,\$s2,0x1f
sll \$s2,\$s2,6
or \$s0,\$s0,\$s2
sw \$s0, shifter
1
shifter:
sll \$s0,\$s1,0
how it works. Note that the two lw instructions are pseudoinstructions that use a label to specify a memory address that
contains the word of data to be loaded. Why do you suppose
that writing “self-modifying code” such as this is a bad idea
(and oftentimes not actually allowed)?
lw \$t0, 0(\$at)
start:
shifter:
.data
.word 0xfffff83f
.text
lw \$s0, shifter
and \$s0,\$s0,\$t0
andi \$s2,\$s2,0x1f
sll \$s2,\$s2,6
or \$s0,\$s0,\$s2
sw \$s0, shifter
sll \$s0,\$s1,0
# clear shamount
# take the 5 LSBs of the shift
# align it to shamount position
# insert the shamount
# overwrite the shift instr
# perform the modified instr
The last shift instruction is modified so that its shamount field is
written by the 5 LSBs from \$s2.
2
Self-modifying code is bad idea because it complicates the
instruction cache implementation; the instruction cache is usually
read-only cache. Also it makes detecting defects that overwrite
code harder to detect.
2.7 The following MIPS instruction sequence could be used to
implement a new instruction that has two register operands.
Give the instruction a name and describe what it does. Note
that register \$t0 is being used as a temporary.
srl \$s1, \$s1, 1
#
sll \$t0, \$s0, 31
# These 4 instructions accomplish
srl \$s0, \$s0, 1
# “new \$s0 \$s1”
or \$s1, \$s1, \$t0
#
dsrl \$s0 \$s1
# shift two registers right one position
2.10 This C version of a case statement is called a switch
statement. The following C code chooses among four
alternatives depending on whether k has the value 0, 1, 2, or 3.
switch (k) {
case 0:f = i + j; break; /* k = 0 */
case 1:f = g + h; break; /* k = 1 */
case 2:f = g – h; break; /* k = 2 */
case 3:f = i – j; break; /* k = 3 */
}
Assume the six variables f through k correspond to six
registers \$s0 through \$s5 and that register \$t2 contains 4.
What is the corresponding MIPS code?
[Hint: use the switch variable k to index a jump address table,
and then jump via the value loaded. We first test k to be sure it
3
matches one of the cases (0 ≤ k ≤ 3); if not, the code exits the
switch statement.]
.data
JumpTable:
.word L0, L1, L2, L3
.text
slt \$t3, \$s5, \$zero
bne \$t3, \$zero, Exit
slt \$t3, \$s5, \$t2
beq \$t3, \$zero, Exit
sll \$t1, \$s5, 2
li \$t4, JumpTable
lw \$t0, 0(\$t1)
jr \$t0
j Exit
j Exit
L2: sub \$s0, \$s1, \$s2
j Exit
L3: sub \$s0, \$s3, \$s4
j Exit
Exit:
# test k < 0
# if so, exit
# test k < 4
# if not, exit
# \$t1 = 4*k
# \$t1 = &JumpTable[k]
# \$t0 = JumpTable[k]
# jump register
# k == 0
# break
# k == 1
# break
# k == 2
# break
# k == 3
# break
2.23 Write a procedure, bfind, in MIPS assembly language. The
procedure should take a single argument that is a pointer to a
null-terminated string in register \$a0. The bfind procedure
should locate the first b character in the string and return its
address in register \$v0. If there are no b’s in the string, then
4
bfind should return a pointer to the null character at the end of
the string. For example, if the argument to bfind points to the
string “imbibe,” then the return value will be a pointer to the
third character of the string.
bfind:
b_loop:
lbu \$t0, 0(\$a0)
beq \$t0, \$t1, b_found
bne \$t0, \$zero, b_loop
b_found:
j \$ra
# \$t1 = “b”
# \$t0 = next character
# \$a0++
# compare character to “b”
# repeat if not null yet
#\$v0 = \$a0
2.29 a0 contains a, a1 contains b.
add \$t0, \$zero, \$zero # initialize running sum \$t0 = 0
loop:
beq \$a1, \$zero, finish # finished when \$a1 is 0
# compute running sum of \$a0
# compute this \$a1 times
j loop
# add 100 to a * b
add \$v0, \$t0, \$zero # return a * b + 100
The program computes a * b + 100.
2.32 b = 25 | a ;
ori \$t1, \$t0, 25
# register \$t1 = \$t0 | 25;
5
2.37 Implement the pseudo-instructions.
PseudoFunction
MIPS Instructions
instruction
move \$t1, \$t2
\$t1 = \$t2
clear \$t0
\$t0 = 0
beq \$t1, small, L if (\$t1 == small) go to L li \$at, small
beq \$t1, \$at, L
beq \$t2, big, L
if (\$t2 == big) go to L li \$at, big
beq \$t2, \$at, L
li \$t1, small
\$t1 = small
li \$t2, big
\$t2 = big
lui \$t2, upper(big)
ori \$t2, \$t2, lower(big)
ble \$t3, \$t5, L
if (\$t3 <= \$t5) go to L slt \$at, \$t5, \$t3
beq \$at, \$zero, L
bgt \$t4, \$t5, L
if (\$t4 > \$t5) go to L slt \$at, \$t5, \$t4
bne \$at, \$zero, L
bge \$t5, \$t3, L
if (\$t5 >= \$t3) go to L slt \$at, \$t5, \$t3
beq \$at, \$zero, L
addi \$t0, \$t2, big \$t0 = \$t2 + big
li \$at, big
lw \$t5, big(\$t2) \$t5 = Mem[\$t2 + big] li \$at, big
lw \$t5, 0(\$at)
Assembly to Machine Code Conversion
0
0
0
0
Op
0 0
sll \$a2, \$a2, 2
Rs
0 0 0 0 0 0
Rt
1 0
1
0
0
Rd
1 0
1
0
Shamount
0 0 1 0
0
0
funct
0 0 0
0
Op
0 0
sll \$a3, \$a3, 2
Rs
Rt
0 0 0 0 0 0 0 0 0 0 0
0
0
0
Rd
0 1
0
0
Shamount
0 0 0 0
1
0
funct
0 0 0
0
0
0
0
6
outer:
1
Op
0 0
0
0
0
0
0
0
0
0
0
0
I field
0 0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
I field
0 0 0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
I field
0 0 0
0
0
0
0
0
1
0
Op
0 1
lw \$t3, 0(\$t3)
bne \$t3, \$t4, skip
Rs
Rt
0 1 0 1 0 1 1 0 1 1 0
0
Op
1 1
Rs
0 0 0 0 0 1 0
outer:
0
lw \$t4, 0(\$t4)
Rs
Rt
1 1 0 1 0 1 0 0 1 0 1
skip:
0
0
Rt
0 1
bne \$t1, \$a3, inner
bne \$t0, \$a2, outer
PCSpim Resluts:
PC
= 00400048
Status = 3000ff10
EPC
HI
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
(r0)
(at)
(v0)
(v1)
(a0)
(a1)
(a2)
(a3)
=
=
=
=
=
=
=
=
00000000
10010000
00000000
00000000
00000000
7ffff000
7ffff004
00000000
= 00000000
Cause
= 00000000
= 00000000
LO
= 00000000
General Registers
(t0) = 00000000 R16 (s0) = 00000000
(t1) = 00000000 R17 (s1) = 0000000f
(t2) = 00000000 R18 (s2) = 55555555
(t3) = 00000000 R19 (s3) = 00000005
(t4) = 00000000 R20 (s4) = 5555555f
(t5) = 00000000 R21 (s5) = 00000000
(t6) = 00000000 R22 (s6) = 00000000
(t7) = 00000000 R23 (s7) = 00000000
7
R24
R25
R26
R27
R28
R29
R30
R31
(t8)
(t9)
(k0)
(k1)
(gp)
(sp)
(s8)
(ra)
=
=
=
=
=
=
=
=
00000000
00000000
00000000
00000000
10008000
7fffeffc
00000000
00400018
```