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A Registers B R0 DPTR DPH DPL R1 R2 PC PC R3 R4 Some 8051 16-bit Register R5 R6 R7 Some 8-bit Registers of the 8051 A: Accumulator B: Used specially in MUL/DIV R0-R7: GPRs S.K DHAR 2 8051 Programming using Assembly The MOV Instruction – Addressing Modes MOV dest,source MOV MOV MOV MOV A,#72H A, #’r’ R4,#62H B,0F9H MOV MOV MOV DPTR,#7634H DPL,#34H DPH,#76H MOV P1,A ; dest = source ;A=72H ;A=‘r’ OR 72H ;R4=62H ;B=the content of F9’th byte of RAM ;mov A to port 1 Note 1: MOV A,#72H After instruction “MOV ≠ MOV A,72H A,72H ” the content of 72’th byte of RAM will replace in Accumulator. 8086 MOV MOV MOV MOV 8051 AL,72H AL,’r’ BX,72H AL,[BX] MOV MOV A,#72H A,#’r’ MOV A,72H MOV A,3 Note 2: MOV A,R3 ≡ S.K DHAR 4 Arithmetic Instructions ADD A, Source ;A=A+SOURCE ADD A,#6 ;A=A+6 ADD A,R6 ;A=A+R6 ADD A,6 ;A=A+[6] or A=A+R6 ADD A,0F3H ;A=A+[0F3H] S.K DHAR 5 Set and Clear Instructions SETB CLR SETB SETB SETB SETB SETB bit bit C P0.0 P3.7 ACC.2 05 ; bit=1 ; bit=0 ; CY=1 ;bit 0 from port 0 =1 ;bit 7 from port 3 =1 ;bit 2 from ACCUMULATOR =1 ;set high D5 of RAM loc. 20h Note: CLR instruction is as same as SETB i.e: CLR C ;CY=0 But following instruction is only for CLR: CLR A ;A=0 S.K DHAR 6 SUBB A,source ;A=A-source-CY SETB C SUBB A,R5 ADC SETB C ADC ;CY=1 ;A=A-R5-1 A,source ;A=A+source+CY ;CY=1 A,R5 ;A=A+R5+1 S.K DHAR 7 DEC INC byte byte ;byte=byte-1 ;byte=byte+1 INC DEC DEC R7 A 40H ; [40]=[40]-1 CPL A ;1’s complement Example: L01: MOV CPL MOV ACALL SJMP A,#55H ;A=01010101 B A P1,A DELAY L01 CALL NOP & RET & RETI All are like 8086 instructions. S.K DHAR 8 Logic Instructions ANL byte/bit ORL byte/bit XRL byte EXAMPLE: MOV R5,#89H ANL R5,#08H S.K DHAR 9 Rotate Instructions • RR A Accumulator rotate right • RL A Accumulator Rotate left • RRC A Accumulator Rotate right through the carry. • RLC A Accumulator Rotate left through the carry. S.K DHAR 10 Structure of Assembly language and Running an 8051 program EDITOR PROGRAM ORG MOV MOV MOV ADD ADD HERE: SJMP END 0H R5,#25H R7,#34H Myfile.lst A,#0 A,R5 A,#12H HERE Myfile.asm ASSEMBLER PROGRAM Other obj file Myfile.obj LINKER PROGRAM Myfile.abs OH PROGRAM Myfile.hex S.K DHAR 11 Memory mapping in 8051 • ROM memory map in 8051 family 4k 0000H 8k 32k 0000H 0000H 0FFFH DS5000-32 8751 AT89C51 1FFFH 8752 AT89C52 7FFFH from Atmel Corporation from Dallas Semiconductor S.K DHAR 12 • RAM memory space allocation in the 8051 7FH Scratch pad RAM 30H 2FH Bit-Addressable RAM 20H 1FH Register Bank 3 18H 17H Register Bank 2 10H 0FH 08H (Stack) Register Bank 1 07H Register Bank 0 00H S.K DHAR 13 8051 Flag bits and the PSW register • PSW Register CY AC F0 RS1 RS0 Carry flag Auxiliary carry flag Available to the user for general purpose Register Bank selector bit 1 Register Bank selector bit 0 Overflow flag User define bit Parity flag Set/Reset odd/even parity RS1 RS0 Register Bank OV -- P PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 CY AC -RS1 RS0 OV -P Address 0 0 0 00H-07H 0 1 1 08H-0FH 1 0 2 10H-17H 1 1 3 18H-1FH S.K DHAR 14 Instructions that Affect Flag Bits: Note: X can be 0 or 1 S.K DHAR 15 Example: MOV A,#88H ADD A,#93H 88 +93 ---11B CY=1 AC=0 10001000 +10010011 -------------00011011 P=0 9C +64 ---100 CY=1 AC=1 Example: MOV A,#38H ADD A,#2FH 38 +2F ---67 CY=0 AC=1 Example: MOV A,#9CH ADD A,#64H 10011100 +01100100 -------------00000000 P=0 00111000 +00101111 -------------01100111 P=1 S.K DHAR 16 Addressing Modes • • • • • Immediate Register Direct Register Indirect Indexed S.K DHAR 17 Immediate Addressing Mode MOV MOV MOV MOV MOV A,#65H A,#’A’ R6,#65H DPTR,#2343H P1,#65H Example : Num … MOV MOV … ORG data1: EQU 30 R0,Num DPTR,#data1 100H db “Example” S.K DHAR 18 Example • Write the decimal value 4 on the SSD in the following figure. Switch the decimal point off. S.K DHAR 19 Register Addressing Mode MOV ADD MOV Rn, A A, Rn DPL, R6 MOV MOV DPTR, A Rm, Rn ;n=0,..,7 S.K DHAR 20 Direct Addressing Mode Although the entire of 128 bytes of RAM can be accessed using direct addressing mode, it is most often used to access RAM loc. 30 – 7FH. MOV MOV MOV MOV R0, 40H 56H, A A, 4 6, 2 ; ≡ MOV A, R4 ; copy R2 to R6 ; MOV R6,R2 is invalid ! SFR register and their address MOV MOV MOV 0E0H, #66H 0F0H, R2 80H,A ; ≡ MOV A,#66H ; ≡ MOV B, R2 ; ≡ MOV P1,A S.K DHAR 21 Register Indirect Addressing Mode • In this mode, register is used as a pointer to the data. MOV A,@Ri MOV @R1,B ; move content of RAM loc.Where address is held by Ri into A ( i=0 or 1 ) In other word, the content of register R0 or R1 is sources or target in MOV, ADD and SUBB insructions. Example: Write a program to copy a block of 10 bytes from RAM location sterting at 37h to RAM location starting at 59h. Solution: MOV R0,37h MOV R1,59h MOV R2,10 L1: MOV A,@R0 MOV @R1,A INC R0 INC R1 DJNZ R2,L1 ; source pointer ; dest pointer ; counter jump S.K DHAR 22 Indexed Addressing Mode And On-Chip ROM Access • This mode is widely used in accessing data elements of look-up table entries located in the program (code) space ROM at the 8051 MOVC A,@A+DPTR A= content of address A +DPTR from ROM Note: Because the data elements are stored in the program (code ) space ROM of the 8051, it uses the instruction MOVC instead of MOV. The “C” means code. S.K DHAR 23 • Example: Assuming that ROM space starting at 250h contains “Hello.”, write a program to transfer the bytes into RAM locations starting at 40h. Solution: ORG 0 MOV DPTR,#MYDATA MOV R0,#40H L1: CLR A MOVC A,@A+DPTR JZ L2 MOV @R0,A INC DPTR INC R0 SJMP L1 L2: SJMP L2 ;------------------------------------ORG 250H MYDATA: DB “Hello”,0 END Notice the NULL character ,0, as end of string and how we use the JZ instruction to detect that. S.K DHAR 24 • Example: Write a program to get the x value from P1 and send x2 to P2, continuously . Solution: ORG 0 ;code segment MOV DPTR, #TAB1 ;moving data segment to data pointer MOV A,#0FFH ;configuring P1 as input port MOV P1,A L01: MOV A,P1 ;reading value from P1 MOVC A,@A+DPTR MOV P2,A SJMP L01 ;---------------------------------------------------ORG 300H ;data segment TAB1: DB 0,1,4,9,16,25,36,49,64,81 END S.K DHAR 25 External Memory Addressing • MOVX A, @R1 ; A memory) • MOVX A, @DPTR • MOVX @DPTR, A [R1] (in external S.K DHAR 26 16-bit, BCD and Signed Arithmetic in 8051 Exercise: Write a program to add n 16-bit number. Get n from port 1. And sent Sum to SSD a) in hex b) in decimal Write a program to subtract P1 from P0 and send result to LCD (Assume that “ACAL DISP” display A to SSD ) S.K DHAR 27 MUL & DIV • MUL MOV MOV MUL AB A,#25H B,#65H AB • MUL MOV MOV MUL AB A,#25 B,#10 AB ;B|A = A*B ;25H*65H=0E99 ;B=0EH, A=99H ;A = A/B, B = A mod B ;A=2, B=5 S.K DHAR 28 Stack in the 8051 • The register used to access the stack is called SP (stack pointer) register. 7FH Scratch pad RAM 30H • The stack pointer in the 8051 is only 8 bits wide, which means that it can take value 00 to FFH. When 8051 powered up, the SP register contains value 07. 2FH Bit-Addressable RAM 20H 1FH 18H 17H 10H 0FH 08H 07H 00H S.K DHAR Register Bank 3 Register Bank 2 (Stack) Register Bank 1 Register Bank 0 29 Example: MOV MOV MOV PUSH PUSH PUSH R6,#25H R1,#12H R4,#0F3H 6 1 4 0BH 0BH 0BH 0BH 0AH 0AH 0AH 0AH F3 09H 09H 09H 12 09H 12 08H 08H 08H 25 08H 25 Start SP=07H 25 SP=08H SP=09H S.K DHAR SP=10H 30 Example (cont.) POP POP POP 4 1 6 0BH 0BH 0BH 0BH 0AH 0AH 09H 0AH F3 0AH 09H 12 09H 12 09H 08H 25 08H 25 08H SP=10H SP=09H S.K DHAR 25 SP=08H 08H Start SP=07H 31 How to use the stack • You can use the stack as temporary storage for variables when calling functions RLC A ;you can only rotate A Call function DIV AB ; A has the wrong value!!!!! … function: MOV A, #5 ;values are for example sake MOV B, #10 MUL AB ;you can only multiply on A RET S.K DHAR 32 Example (correct) RLC A ;you can only rotate A PUSH A ;saving A and B on the stack before PUSH B ;calling function Call function POP B ;restoring B POP A ;and A (POP in reverse order) DIV AB ; A has the wrong value!!!!! … function: MOV A, #5 ;values are for example sake MOV B, #10 MUL AB ;you can only multiply on A RET S.K DHAR 33 Saving PSW • The Program Status Word registers contains flags that are often important for correct program flow • You can push PSW on the stack before calling a function ADD A, R0 PUSH PSW PUSH A ;saving A and R0 on the stack before PUSH R0 ;calling function Call function POP R0 ;restoring R0 POP A ;and A (POP in reverse order) POP PSW JC loop ;If this means the carry from the ;function then don’t push PSW … function: MOV A, #5 ;values are for example sake ADD A, R2 ;the flags are set according to ADD result RET 34 S.K DHAR LOOP and JUMP Instructions DJNZ: Write a program to clear ACC, then add 3 to the accumulator ten times Solution: MOV MOV AGAIN: ADD DJNZ MOV A,#0; R2,#10 A,#03 R2,AGAING ;repeat until R2=0 (10 times) R5,A S.K DHAR 35 • Other conditional jumps : JZ Jump if A=0 JNZ Jump if A/=0 DJNZ Decrement and jump if A/=0 CJNE A,byte Jump if A/=byte CJNE reg,#data Jump if byte/=#data JC Jump if CY=1 JNC Jump if CY=0 JB Jump if bit=1 JNB Jump if bit=0 JBC Jump if bit=1 and clear bit S.K DHAR 36 SJMP and LJMP: LJMP(long jump) LJMP is an unconditional jump. It is a 3-byte instruction in which the first byte is the opcode, and the second and third bytes represent the 16-bit address of the target location. The 20byte target address allows a jump to any memory location from 0000 to FFFFH. SJMP(short jump) In this 2-byte instruction. The first byte is the opcode and the second byte is the relative address of the target location. The relative address range of 00-FFH is divided into forward and backward jumps, that is , within -128 to +127 bytes of memory relative to the address of the current PC. S.K DHAR 37 CJNE , JNC Exercise: Write a program that compare R0,R1. If R0>R1 then send 1 to port 2, else if R0<R1 then send 0FFh to port 2, else send 0 to port 2. S.K DHAR 38 CALL Instructions Another control transfer instruction is the CALL instruction, which is used to call a subroutine. • LCALL(long call) In this 3-byte instruction, the first byte is the opcode an the second and third bytes are used for the address of target subroutine. Therefore, LCALL can be used to call subroutines located anywhere within the 64K byte address space of the 8051. S.K DHAR 39 • ACALL (absolute call) ACALL is 2-byte instruction in contrast to LCALL, which is 13 bytes. Since ACALL is a 2-byte instruction, the target address of the subroutine must be within 2K bytes address because only 11 bits of the 2 bytes are used for the address. There is no difference between ACALL and LCALL in terms of saving the program counter on the stack or the function of the RET instruction. The only difference is that the target address for LCALL can be anywhere within the 64K byte address space of the 8051 while the target address of ACALL must be within a 2Kbyte range. S.K DHAR 40 Example A ORG B R5 R7 Address Data 0H VAL1 EQU 05H MOV R5,#25H LOOP: MOV R7,#VAL1 MOV A,#0 ADD A,R5 ADD A,#12H RRC A DJNZ A, LOOP SETB ACC.3 CLR A CJNE A, #0, LOOP HERE: SJMP HERE END S.K DHAR 41 I/O Port Programming Port 1(pins 1-8) • Port 1 is denoted by P1. – P1.0 ~ P1.7 • We use P1 as examples to show the operations on ports. – P1 as an output port (i.e., write CPU data to the external pin) – P1 as an input port (i.e., read pin data into CPU bus) S.K DHAR 42 A Pin of Port 1 Read latch TB2 Vcc Load(L1) Internal CPU bus D Write to latch Clk P1.X pin Q P1.X Q M1 TB1 P0.x Read pin S.K DHAR 8051 IC 43 Hardware Structure of I/O Pin • Each pin of I/O ports – Internal CPU bus:communicate with CPU – A D latch store the value of this pin • D latch is controlled by “Write to latch” – Write to latch=1:write data into the D latch – 2 Tri-state buffer: • TB1: controlled by “Read pin” – Read pin=1:really read the data present at the pin • TB2: controlled by “Read latch” – Read latch=1:read value from internal latch – A transistor M1 gate • Gate=0: open • Gate=1: close S.K DHAR 44 Tri-state Buffer Output Input Tri-state control (active high) L L H H H H S.K DHAR Low Highimpedance (open-circuit) 45 Writing “1” to Output Pin P1.X Read latch Vcc TB2 Load(L1) 2. output pin is Vcc 1. write a 1 to the pin Internal CPU bus D Write to latch Clk 1 Q P1.X pin P1.X Q 0 M1 output 1 TB1 Read pin S.K DHAR 8051 IC 46 Writing “0” to Output Pin P1.X Read latch Vcc TB2 Load(L1) 2. output pin is ground 1. write a 0 to the pin Internal CPU bus D Write to latch Clk 0 Q P1.X pin P1.X Q 1 M1 output 0 TB1 Read pin S.K DHAR 8051 IC 47 Port 1 as Output(Write to a Port) • Send data to Port 1: BACK: MOV A,#55H MOV P1,A ACALL DELAY CPL A SJMP BACK – Let P1 toggle. – You can write to P1 directly. S.K DHAR 48 Reading Input v.s. Port Latch • When reading ports, there are two possibilities: – Read the status of the input pin. (from external pin value) • MOV A, PX • JNB P2.1, TARGET ; jump if P2.1 is not set • JB P2.1, TARGET ; jump if P2.1 is set • Figures C-11, C-12 – Read the internal latch of the output port. • ANL P1, A ; P1 ← P1 AND A • ORL P1, A ; P1 ← P1 OR A • INC P1 ; increase P1 • Figure C-17 • Table C-6 Read-Modify-Write Instruction (or Table 8-5) • See Section 8.3 S.K DHAR 49 Reading “High” at Input Pin Read latch 1. TB2 write a 1 to the pin MOV P1,#0FFH Internal CPU bus 2. MOV A,P1 Vcc external pin=High Load(L1) D 1 Q 1 P1.X pin P1.X Write to latch Clk 0 Q M1 TB1 Read pin 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC S.K DHAR 50 Reading “Low” at Input Pin Read latch 1. Vcc 2. MOV A,P1 TB2 write a 1 to the pin Load(L1) external pin=Low MOV P1,#0FFH Internal CPU bus D 1 Q 0 P1.X pin P1.X Write to latch Clk Q 0 M1 TB1 Read pin 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC S.K DHAR 51 Port 1 as Input(Read from Port) • In order to make P1 an input, the port must be programmed by writing 1 to all the bit. BACK: MOV MOV MOV MOV SJMP A,#0FFH P1,A A,P1 P2,A BACK ;A=11111111B ;make P1 an input port ;get data from P0 ;send data to P2 – To be an input port, P0, P1, P2 and P3 have similar methods. S.K DHAR 52 Instructions For Reading an Input Port • Following are instructions for reading external pins of ports: Mnemonics Examples Description MOV A,PX MOV A,P2 Bring into A the data at P2 pins JNB PX.Y,.. JNB P2.1,TARGET Jump if pin P2.1 is low JB PX.Y,.. JB P1.3,TARGET Jump if pin P1.3 is high MOV C,PX.Y MOV C,P2.4 Copy status of pin P2.4 to CY S.K DHAR 53 Reading Latch • Exclusive-or the Port 1: MOV P1,#55H ;P1=01010101 ORL P1,#0F0H ;P1=11110101 1. The read latch activates TB2 and bring the data from the Q latch into CPU. • Read P1.0=0 2. CPU performs an operation. • This data is ORed with bit 1 of register A. Get 1. 3. The latch is modified. • D latch of P1.0 has value 1. 4. The result is written to the external pin. • External pin (pin 1: P1.0) has value 1. S.K DHAR 54 Reading the Latch 1. Read pin=0 Read latch=1 Write to latch=0 (Assume P1.X=0 initially) Read latch Vcc TB2 Load(L1) 2. CPU compute P1.X OR 1 0 Internal CPU bus D 1 Write to latch 3. write result to latch Read pin=0 Read latch=0 Write to latch=1 0 Q P1.X Clk 1 4. P1.X=1 P1.X pin 0 M1 Q TB1 Read pin 8051 IC S.K DHAR 55 Read-modify-write Feature • Read-modify-write Instructions – Table C-6 • This features combines 3 actions in a single instruction: 1. CPU reads the latch of the port 2. CPU perform the operation 3. Modifying the latch 4. Writing to the pin – Note that 8 pins of P1 work independently. S.K DHAR 56 Port 1 as Input(Read from latch) • Exclusive-or the Port 1: MOV P1,#55H ;P1=01010101 AGAIN: XOR P1,#0FFH ;complement ACALL DELAY SJMP AGAIN – Note that the XOR of 55H and FFH gives AAH. – XOR of AAH and FFH gives 55H. – The instruction read the data in the latch (not from the pin). – The instruction result will put into the latch and the pin. S.K DHAR 57 Read-Modify-Write Instructions Mnemonics Example ANL ANL P1,A ORL ORL P1,A XRL XRL P1,A JBC PX.Y, TARGET JBC P1.1, TARGET CPL CPL P1.2 INC INC DEC DEC P1 DJNZ PX, TARGET DJNZ P1,TARGET MOV PX.Y,C MOV P1.2,C CLR PX.Y CLR P1.3 SETB PX.Y SETB P1.4 P1 S.K DHAR 58 You are able to answer this Questions: • How to write the data to a pin? • How to read the data from the pin? – Read the value present at the external pin. • Why we need to set the pin first? – Read the value come from the latch(not from the external pin). • Why the instruction is called read-modify write? S.K DHAR 59 Other Pins • P1, P2, and P3 have internal pull-up resisters. – P1, P2, and P3 are not open drain. • P0 has no internal pull-up resistors and does not connects to Vcc inside the 8051. – P0 is open drain. – Compare the figures of P1.X and P0.X. • However, for a programmer, it is the same to program P0, P1, P2 and P3. • All the ports upon RESET are configured as output. S.K DHAR 60 A Pin of Port 0 Read latch TB2 Internal CPU bus D Write to latch Clk P0.X pin Q P1.X Q M1 TB1 P1.x Read pin S.K DHAR 8051 IC 61 Port 0(pins 32-39) • P0 is an open drain. – Open drain is a term used for MOS chips in the same way that open collector is used for TTL chips. • When P0 is used for simple data I/O we must connect it to external pull-up resistors. – Each pin of P0 must be connected externally to a 10K ohm pull-up resistor. – With external pull-up resistors connected upon reset, port 0 is configured as an output port. S.K DHAR 62 Port 0 with Pull-Up Resistors Vcc 10 K Port P0.0 DS5000 P0.1 P0.2 8751 P0.3 P0.4 8951 P0.5 P0.6 P0.7 0 S.K DHAR 63 Dual Role of Port 0 • When connecting an 8051/8031 to an external memory, the 8051 uses ports to send addresses and read instructions. – 8031 is capable of accessing 64K bytes of external memory. – 16-bit address:P0 provides both address A0-A7, P2 provides address A8-A15. – Also, P0 provides data lines D0-D7. • When P0 is used for address/data multiplexing, it is connected to the 74LS373 to latch the address. – There is no need for external pull-up resistors as shown in Chapter 14. S.K DHAR 64 74LS373 PSEN ALE P0.0 74LS373 G D P0.7 OE OC A0 A7 D0 D7 EA P2.0 A8 P2.7 A15 8051 S.K DHAR ROM 65 Reading ROM (1/2) P0.0 2. 74373 latches the address and send to OE ROM OC G 74LS373 A0 P0.7 A7 PSEN ALE 1. Send address to ROM D Address D0 D7 EA P2.0 A8 P2.7 A12 8051 ROM S.K DHAR 66 Reading ROM (2/2) PSEN ALE P0.0 P0.7 2. 74373 latches the address and send to ROM 74LS373 G D Address OE OC A0 A7 D0 D7 EA 3. ROM send the instruction back P2.0 A8 P2.7 A12 8051 S.K DHAR ROM 67 ALE Pin • The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. – When ALE=0, P0 provides data D0-D7. – When ALE=1, P0 provides address A0-A7. – The reason is to allow P0 to multiplex address and data. S.K DHAR 68 Port 2(pins 21-28) • Port 2 does not need any pull-up resistors since it already has pull-up resistors internally. • In an 8031-based system, P2 are used to provide address A8-A15. S.K DHAR 69 Port 3(pins 10-17) • Port 3 does not need any pull-up resistors since it already has pull-up resistors internally. • Although port 3 is configured as an output port upon reset, this is not the way it is most commonly used. • Port 3 has the additional function of providing signals. – Serial communications signal:RxD, TxD(Chapter 10) – External interrupt:/INT0, /INT1(Chapter 11) – Timer/counter:T0, T1(Chapter 9) – External memory accesses in 8031-based system:/WR, /RD(Chapter 14) S.K DHAR 70 Port 3 Alternate Functions P3 Bit Function Pin P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 RxD TxD INT0 INT1 T0 T1 WR RD 10 11 12 13 14 15 16 17 S.K DHAR 71 Generating Delays • You can generate short delays using a register and incrementing or decrementing its value • Example: mov r1, #0ah loop: djnz r1, loop • How much delay is that? – – – – – – Djnz is a 2-byte instruction it takes two machine cycles One machine cycle is 1/12 of the system clock period For a 12 MHz system clock that is: Machine cycle = 12/12 = 1 MHz Machine period = 1/(1 MHz) = 10^(-6) s = 1 μs Loop time = 10*2*1 μs = 20 μs S.K DHAR 72 Generating longer delays • Each register is 8 bits long, so it can increment 256 times before overflowing • For larger delays, or when interrupts are required 8051 uses two timers S.K DHAR 73 S.K DHAR 74 TMOD Register: S.K DHAR 75 TCON Register: • • • • • • • • TF1: Timer 1 overflow flag. TR1: Timer 1 run control bit. TF0: Timer 0 overflag. TR0: Timer 0 run control bit. IE1: External interrupt 1 edge flag. IT1: External interrupt 1 type flag. IE0: External interrupt 0 edge flag. IT0: External interrupt 0 type flag. S.K DHAR 76 Timer Mode Register • Bit 7: Gate bit; when set, timer only runs while \INT high. (T0) • Bit 6: Counter/timer select bit; when set timer is an event counter when cleared timer is an interval timer (T0) • Bit 5: Mode bit 1 (T0) • Bit 4: Mode bit 0 (T0) • Bit 3: Gate bit; when set, timer only runs while \INT high. (T1) • Bit 2: Counter/timer select bit; when set timer is an event counter when cleared timer is an interval timer (T1) • Bit 1: Mode bit 1 (T1) • Bit 0: Mode bit 0 (T1) S.K DHAR 77 Timer Modes • M1-M0: 00 (Mode 0) – 13-bit mode (not commonly used) • M1-M0: 01 (Mode 1) - 16-bit timer mode • M1-M0: 10 (Mode 2) - 8-bit auto-reload mode • M1-M0: 11 (Mode 3) – Split timer mode S.K DHAR 78 Timer Control Register (TCON) • Bit 7 (TF1) 8FH : Timer 1 overflow flag; set by hardware upon overflow, cleared by software • Bit 6 (TR1) 8EH: Timer 1 run-control bit; manipulated by software - setting starts timer 1, resetting stops timer 1 • Bit 5 (TF0) 8DH: Timer 0 overflow flag; set by hardware upon overflow, cleared by software. • Bit 4 (TR0) 8CH: Timer 0 run-control bit; manipulated by software - setting starts timer 0, resetting stops timer 0 • Bit 3 (IE1) 8BH: External 1 Interrupt flag bit • Bit 2 (IT1) 8AH: • Bit 1 (IE0) 89H: External 0 Interrupt flag bit • Bit 0 (IT0) 88H: S.K DHAR 79 Initializing and stopping timers • MOV TMOD, #16H ;initialization • SETB TR0 ;starting timers SETB TR1 • CLR TR0 ; stop timer 0 CLR TR1 ; stop timer 1 • MOV R7, TH0 ; reading timers • MOV R6, TL0 S.K DHAR 80 Reading timers on the fly S.K DHAR 81 Generating delays using the timers • To generate a 50 ms (or 50,000 us) delay we start the timer counting from 15,536. Then, 50,000 steps later it will overflow. Since each step is 1 us (the timer's clock is 1/12 the system frequency) the delay is 50,000 us. 0 MOV TMOD, #10H; set up timer 1 as 16-bit interval timer CLR TR1 ; stop timer 1 (in case it was started in some other subroutine) MOV TH1, #3CH MOV TL1, #0B0H ; load 15,536 (3CB0H) into timer 1 SETB TR1 ; start timer 1 JNB TF1, $; repeat this line while timer 1 overflow flag is not set CLR TF1; timer 1 overflow flag is set by hardware on transition from FFFFH - the flag must be reset by software CLR TR1 ; stop timer 1 S.K DHAR 82 Generating long delays S.K DHAR 83 Using timers to measure execution time • Timers are often used to measure the execution time of a program ORG 0H MOV TMOD, #16H ;initialization SETB TR0 ;starting timer 0 … ;main … ;program CLR TR0 ; stop timer 0 MOV R7, TH0 ; reading timer 0 MOV R6, TL0 S.K DHAR 84 Interrupt : S.K DHAR 85 Interrupt Enable Register : • EA : Global enable/disable. • --- • • • • • • ET2 :Enable Timer 2 interrupt. ES :Enable Serial port interrupt. ET1 :Enable Timer 1 interrupt. EX1 :Enable External 1 interrupt. ET0 : Enable Timer 0 interrupt. EX0 : Enable External 0 interrupt. : Undefined. S.K DHAR 86 Interrupt handling • 8051 Interrupt Vector Table S.K DHAR 87 Interrupt Service Routines • ORG 0 JMP main • ORG 0003H ; external interrupt 0 vector …. ; interrupt handler code for external interrupt 0 RETI ORG 0013H ; external interrupt 1 vector …. ;interrupt handler code for external interrupt 1 RETI ORG 0030H ; main program main:SETB IT0 ; set external interrupt 0 as edge activated SETB IT1 ; set external interrupt 1 as edge activated SETB EX0 ; enable external interrupt 0 SETB EX1 ; enable external interrupt 1 SETB EA ; global interrupt enable … S.K DHAR 88 Examples • Write a 8051 assembly program that matches 8 switches with 8 LEDs • Write a 8051 assembly program that uses a two-digit SSD to display the temperature as input from an ADC. Assume that the 05V range corresponds to 0-50 °C. The ADC uses RD, WR and INT pins. S.K DHAR 89 8051 Programming Using C Programming microcontrollers using high-level languages • Most programs can be written exclusively using high-level code like ANSI C • Extensions – To achieve low-level (Assembly) efficiency, extensions to high-level languages are required • Restrictions – Depending on the compiler, some restrictions to the high-level language may apply S.K DHAR 91 Keil C keywords • data/idata: Description: The variable will be stored in internal data memory of controller. example: unsigned char data x; //or unsigned char idata y; • • • bdata: Description: The variable will be stored in bit addressable memory of controller. example: unsigned char bdata x; //each bit of the variable x can be accessed as follows x ^ 1 = 1; //1st bit of variable x is set x ^ 0 = 0; //0th bit of variable x is cleared xdata: Description: The variable will be stored in external RAM memory of controller. example: unsigned char xdata x; S.K DHAR 92 Keil C keywords • code: Description: This keyword is used to store a constant variable in code and not data memory. example: unsigned char code str="this is a constant string"; • _at_: Description: This keyword is used to store a variable on a defined location in ram. • • • example: CODE: unsigned char idata x _at_ 0x30; // variable x will be stored at location 0x30 // in internal data memory sbit: Description: This keyword is used to define a special bit from SFR (special function register) memory. example: sbit Port0_0 = 0x80; // Special bit with name Port0_0 is defined at address 0x80 S.K DHAR 93 Keil C keywords • sfr: Description: sfr is used to define an 8-bit special function register from sfr memory. example: sfr Port1 = 0x90; // Special function register with name Port1 defined at addrress 0x90 • sfr16: Description: This keyword is used to define a two sequential 8-bit registers in SFR memory. example: sfr16 DPTR = 0x82; // 16-bit special function register starting at 0x82 // DPL at 0x82, DPH at 0x83 • using: Description: This keyword is used to define register bank for a function. User can specify register bank 0 to 3. example: void function () using 2{ // code } // Funtion named "function" uses register bank 2 while executing its code • Interrupt: Description: defines interrupt service routine void External_Int0() interrupt 0{ //code } S.K DHAR 94 Pointers • //Generic Pointer char * idata ptr; //character pointer stored in data memory int * xdata ptr1; //Integer pointer stored in external data memory //Memory Specific pointer char idata * xdata ptr2; //Pointer to character stored in Internal Data memory //and pointer is going to be stored in External data memory int xdata * data ptr3; //Pointer to character stored in External Data memory //and pointer is going to be stored in data memory S.K DHAR 95 Writing hardware-specific code • #include <REGx51.h> //header file for 89C51 void main(){ //main function starts unsigned int i; //Initializing Port1 pin1 P1_1 = 0; //Make Pin1 o/p while(1){ //Infinite loop main application //comes here for(i=0;i<1000;i++) ; //delay loop P1_1 = ~P1_1; //complement Port1.1 //this will blink LED connected on Port1.1 } } S.K DHAR 96 C and Assembly together • extern unsigned long add(unsigned long, unsigned long); void main(){ unsigned long a; a = add(10,30); //calling Assembly function while(1); } S.K DHAR 97 C and Assembly together • name asm_test ?PR?_add?asm_test segment code ?DT?_add?asm_test segment data ;let other function use this data space for passing variables public ?_add?BYTE ;make function public or accessible to everyone public _add ;define the data segment for function add rseg ?DT?_add?asm_test ?_add?BYTE: parm1: DS 4 ;First Parameter parm2: ds 4 ;Second Parameter ;either you can use parm1 for reading passed value as shown below ;or directly use registers used to pass the value. rseg ?PR?_add?asm_test _add: ;reading first argument mov parm1+3,r7 mov parm1+2,r6 mov parm1+1,r5 mov parm1,r4 ;param2 is stored in fixed location given by param2 ;now adding two variables mov a,parm2+3 add a,parm1+3 ;after addition of LSB, move it to r7(LSB return register for Long) mov r7,a mov a,parm2+2 addc a,parm1+2 ;store second LSB mov r6,a mov a,parm2+1 addc a,parm1+1 ;store second MSB mov r5,a mov a,parm2 addc a,parm1 mov r4,a ret end S.K DHAR 98 The infinite loop • A loop with no termination condition or one that will never be met may be unwanted in computer systems, but common in embedded systems. S.K DHAR 99 Example 1 • Generate a 5V peek-to-peek 200μs period square waveform on the DAC output S.K DHAR 100 Example 2 • Generate a 5V peek-to-peek 200μs period sawtooth waveform on the DAC output S.K DHAR 101 Example 3 • • • • • • • • • • • • • • • • • • • • • • Generate a 5V peek-to-peek 2ms period sine waveform on the DAC output code unsigned char Sine[180] = { /* Sine values */ 127,131,136,140,145,149,153,158,162,166,170,175, 179,183,187,191,194,198,202,205,209,212,215,218, 221,224,227,230,232,235,237,239,241,243,245,246, 248,249,250,251,252,253,253,254,254,254,254,254, 253,253,252,251,250,249,248,246,245,243,241,239, 237,235,232,230,227,224,221,218,215,212,209,205, 202,198,194,191,187,183,179,175,170,166,162,158, 153,149,145,140,136,131,127,123,118,114,109,105, 101, 96, 92, 88, 84, 79, 75, 71, 67, 64, 60, 56, 52, 49, 45, 42, 39, 36, 33, 30, 27, 24, 22, 19, 17, 15, 13, 11, 9, 8, 6, 5, 4, 3, 2, 1, 1, 0, 0, 0, 0, 0, 1, 1, 2, 3, 4, 5, 6, 8, 9, 11, 13, 15, 17, 19, 22, 24, 27, 30, 33, 36, 39, 42, 45, 49, 52, 56, 60, 63, 67, 71, 75, 79, 84, 88, 92, 96, 101,105,109,114,118 }; /************************************************************ * START of the PROGRAM * ************************************************************ / void main (void) { unsigned char i; /************************************************************ * Enable the D/A Converter * ************************************************************ / ENDAC0 = 1; /* Enable DAC0 */ /************************************************************ * Create the waveforms on DAC0 * ************************************************************ / while(1){ /* Run for ever */ for(i = 0; i < 179; i++) DAC0 = Sine[i]; } * while(1) */ } /* main() */ } 102 S.K DHAR Mixed C/Assembly code (μVision Version 2.06) • Parameter passing in registers • Examples: S.K DHAR 103 Function return values S.K DHAR 104 Example extern unsigned char add2_func(unsigned char, unsigned char); void main(){ unsigned char a; a = add2_func(10,30); //a will have 40 after execution while(1); } ;assembly file “add2.asm” NAME _Add2_func ?PR?add2_func?Add2 SEGMENT CODE PUBLIC add2_func RSEG ?PR?Add2_func?Add2 add2_func: mov a, r7 ;first parameter passed to r7 add a, r5 ;second parameter passed to r5 mov r7, a ;return parameter must be in r7 RET END S.K DHAR 105 Calling C from Assembly NAME A_FUNC ?PR?a_func?A_FUNC SEGMENT CODE EXTRN CODE (c_func) PUBLIC a_func RSEG ?PR?a_func?A_FUNC a_func: USING 0 LCALL c_func RET END void c_func (void) { } S.K DHAR 106 Data Converters • Analog to Digital Converters (ADC) – Convert an analog quantity (voltage, current) into a digital code • Digital to Analog Converters (DAC) – Convert a digital code into an analog quantity (voltage, current) Video (Analog - Digital) Amplifier Filters Modulator Analog Preamplifier Digital A/D S.K DHAR Image enhancement and coding 108 Temperature Recording by a Digital System Temperature (ºC) Temperature (ºC) Sampling & quantization Time Time S.K DHAR 109 Need for Data Converters Digital processing and storage of physical quantities (sound, temperature, pressure etc) exploits the advantages of digital electronics – Better and cheaper technology compared to the analog – More reliable in terms of storage, transfer and processing • Not affected by noise – Processing using programs (software) • Easy to change or upgrade the system – (e.g. Media Player 7 Media Player 8 ή Real Player) • Integration of different functions – (π.χ. Mobile = phone + watch + camera + games + email + S.K DHAR 110 Signals (Analog - Digital) u(V 16) 1111 1110 14 1100 12 10 101 0 1001 8 100 0 0110 6 4 Analog Signal • can take infinity values • can change at any time 0101 0100 2 1 2 3 4 5 6 7 8 9 ADC Digital Signal • can take one of 2 values (0 or 1) • can change only at distinct times Reconstruction of an analog signal from a digital one (Can take only predefined values) u(V) t (S) 16 1111 1110 14 1100 12 1010 D0 D1 0 0 1 0 0 1 1 0 0 1 0 1 1 1 0 0 0 0 1001 10 1000 8 DAC6 011 0 0100 D2 1 0 1 1 0 1 1 1 0 D3 0 1 0 0 1 1 1 1 1 0101 4 2 S.K DHAR1 2 3 4 5 6 7 8 9 t (S) 111 QUANTIZATION ERROR • The difference between the true and quantized value of the analog signal • Inevitable occurrence due to the finite resolution of the ADC • The magnitude of the quantization error at each sampling instant is between zero and half of one LSB. • Quantization error is modeled as noise (quantization noise) u(V) Analog signal value at sampling time: 4.9 V 16 Quantized Analog signal value: 5.0 V 14 12 Quantization error: 5.0 - 4.9 = 0.1 V 10 8 6 4 2 1 2 3 4 5 6 7 S.K DHAR 8 9 t (S) 112 SAMPLING FREQUENCY (RATE) • The frequency at which digital values are sampled from the analog input of an ADC • A low sampling rate (undersampling) may be insufficient to represent the analog signal in digital form • A high sampling rate (oversampling) requires high bitrate and therefore storage space and processing time • A signal can be reproduced from digital samples if the sampling rate is higher than twice the highest frequency component of the signal (Nyquist-Shannon theorem) • Examples of sampling rates – Telephone: 4 KHz (only adequate for speech, ess sounds like eff) – Audio CD: 44.1 KHz – Recording studio: 88.2 KHz S.K DHAR 113 Digital to Analog Converters • The analog signal at the output of a D/A converter is linearly proportional to the binary code at the input of the converter. – If the binary code at the input is 0001 and the output voltage is 5mV, then – If the binary code at the input becomes 1001, the output 45mV voltage will become ...... • If a D/A converter has 4 digital inputs then the analog signal at the output can have one out of 16 values. …… • If a D/A converter has N digital inputs then the analog signal at the output can have one out of 2Ν values. ……. S.K DHAR D3 D2 D1 D0 Vout (mV) 0 0 0 0 0 0 0 0 1 5 0 0 1 0 10 0 0 1 1 15 0 1 0 0 20 0 1 0 1 25 0 1 1 0 30 0 1 1 1 35 1 0 0 0 40 1 0 0 1 45 1 0 1 0 50 1 0 1 1 55 1 1 0 0 60 1 1 0 1 65 1 1 1 0 70 1 1 1 1 75 114 Characteristics of Data Converters 1. 2. 3. 4. Number of digital lines – The number bits at the input of a D/A (or output of an A/D) converter. – Typical values: 8-bit, 10-bit, 12-bit and 16-bit – Can be parallel or serial Microprocessor Compatibility – Microprocessor compatible converters can be connected directly on the microprocessor bus as standard I/O devices – They must have signals like CS, RD, and WR • Activating the WR signal on an A/D converter starts the conversion process. Polarity – Polar: the analog signals can have only positive values – Bipolar: the analog signals can have either a positive or a negative value Full-scale output – The maximum analog signal (voltage or current) – Corresponds to a binary code with all bits set to 1 (for polar converters) – Set externally by adjusting a variable resistor that sets the Reference Voltage (or current) S.K DHAR 115 5. 6. Characteristics of Data Converters (Cont…) Resolution – The analog voltage (or current) that corresponds to a change of 1LSB in the binary code – It is affected by the number of bits of the converter and the Full Scale voltage (VFS) – For example if the full-scale voltage of an 8-bit D/A converter is 2.55V the the resolution is: VFS/(2N-1) = 2.55 /(28-1) 2.55/255 = 0.01 V/LSB = 10mV/LSB Conversion Time – The time from the moment that a “Start of Conversion” signal is applied to an A/D converter until the corresponding digital value appears on the data lines of the converter. – For some types of A/D converters this time is predefined, while for others this time can vary according to the value of the analog signal. 7. Settling Time 0.1Vo – The time needed by the analog signal at the output of a D/A converter to be within 10% of the nominal value. S.K DHAR Vo 116 ADC RESPONSE TYPES • Linear – Most common • Non-linear – Used in telecommunications, since human voice carries more energy in the low frequencies than the high. S.K DHAR 117 ADC TYPES • Direct Conversion – Fast – Low resolution • Successive approximation – Low-cost – Slow – Not constant conversion delay • Sigma-delta – High resolution, – low-cost, – high accuracy S.K DHAR 118 Interfacing with Data Converters A19 A0 +5V DAC D7 V(+) D6 D5 D4 Vout D3 D2 D1 D0 Vref A11 A10 A9 A8 A7 A6 A5 A4 CS WR Vout 10K D7 D6 D5 D4 D3 D2 D1 D0 10K 8088 System • Microprocessor compatible data converters are attached on the microprocessor’s bus as standard I/O devices. V(-) IO/M' WR RD S.K DHAR 119 Programming Example 1 Write a program to generate a positive ramp at the output of an 8-bit D/A converter with a 2V amplitude and a 1KHz frequency. Assume that the full scale voltage of the D/A converter is 2.55V. The D/A converter is in P0 and the WR signal is in P1.1 main() { do { for (i=0;i<200;i++) { P1_0=1; P0=i; delayu(5); 2V } } while (1) } 0V f = 1KHZ 200 steps of 10 mV each ==> 2V amplitude 200 steps of 5 us each ==> 1ms period or 1KHz frequency S.K DHAR 120 D/A Converters example Write a program to generate the waveform, shown below, at the output of an 8-bit digital to analog converter. The period of the waveform should be approximately 8 ms. Assume that a time delay function with a 1 μs resolution is available. The full scale output of the converter is 5.12 V and the address of the DAC is P0, while the WR signal is in P1.1. V ( volts) 4 3 2 1 0 1 5 6 7 8 t ( msec ) Assuming that an 8-bit A/D converter is used to interface a temperature sensor measuring temperature values in the temperature range 0 - 51.2 C o , specify: The resolution in of the system in C o o The digital output word for a temperature of 32.5 C The temperature corresponding to a digital output word of 01001110 S.K DHAR 121