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Chapter 5 - Languages and the Machine 5-1 Principles of Computer Architecture Miles Murdocca and Vincent Heuring Chapter 5: Languages and the Machine Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-2 Chapter Contents 5.1 The Compilation Process 5.2 The Assembly Process 5.3 Linking and Loading 5.4 Macros 5.5 Case Study: Extensions to the Instruction Set – The Intel MMX™ and Motorola AltiVec™ SIMD Instructions Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-3 The Compilation Process • Compilation translates a program written in a high level language into a functionally equivalent program in assembly language. • Consider a simple high-level language assignment statement: A = B + 4; • Steps involved in compiling this statement into assemby code: — Reducing the program text to the basic symbols of the language (for example, into identifiers such as A and B), denotations such as the constant value 4, and program delimiters such as = and +. This portion of compilation is referred to as lexical analysis. — Parsing symbols to recognize the underlying program structure. For the statement above, the parser must recognize the form: Identifier “=” Expression, where Expression is further parsed into the form: Identifier “+” Constant. Parsing is sometimes called syntactic analysis. Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-4 The Compilation Process — Name analysis: associating the names A and B with particular program variables, and further associating them with particular memory locations where the variables are located at run time. — Type analysis: determining the types of all data items. In the example above, variables A and B and constant 4 would be recognized as being of type int in some languages. Name and type analysis are sometimes referred to together as semantic analysis: determining the underlying meaning of program components. — Action mapping and code generation: associating program statements with their appropriate assembly language sequence. In the statement above, the assembly language sequence might be as follows: ld [B], %r0, %r1 ! Get variable B into a register. add %r1, 4, %r2 ! Compute the value of the expression st %r2, %r0, [A] ! Make the assignment. Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-5 The Assembly Process • The process of translating an assembly language program into a machine language program is referred to as the assembly process. • Production assemblers generally provide this support: — Allow programmer to specify locations of data and code. — Provide assembly-language mnemonics for all machine instructions and addressing modes, and translate valid assembly language statements into the equivalent machine language. — Permit symbolic labels to represent addresses and constants. — Provide a means for the programmer to specify the starting address of the program, if there is one; and provide a degree of assemble-time arithmetic. — Include a mechanism that allows variables to be defined in one assembly language program and used in another, separately assembled program. — Support macro expansion. Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-6 Assembly Example • We explore how the assembly process proceeds by “hand assembling” a simple ARC assembly language program. Department of Information Technology, Radford University ITEC 352 Computer Organization 5-7 Chapter 5 - Languages and the Machine Instruction Formats and PSR Format for the ARC Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-8 Assembled Code ld [x], %r1 1100 0010 0000 0000 0010 1000 0001 0100 ld [y], %r2 1100 0100 0000 0000 0010 1000 0001 1000 addcc %r1,%r2,%r3 1000 0110 1000 0000 0100 0000 0000 0010 st %r3, [z] 1100 0110 0010 0000 0010 1000 0001 1100 jmpl %r15+4, %r0 1000 0001 1100 0011 1110 0000 0000 0100 15 0000 0000 0000 0000 0000 0000 0000 1111 9 0000 0000 0000 0000 0000 0000 0000 1001 0 0000 0000 0000 0000 0000 0000 0000 0000 Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-9 Forward Referencing • An example of forward referencing: Department of Information Technology, Radford University ITEC 352 Computer Organization 5-10 Department of Information Technology, Radford University Chapter 5 - Languages and the Machine ITEC 352 Computer Organization 5-11 Chapter 5 - Languages and the Machine Assembled Program Department of Information Technology, Radford University ITEC 352 Computer Organization 5-12 Chapter 5 - Languages and the Machine Linking: Using .global and .extern • A .global is used in the module where a symbol is defined and a .extern is used in every other module that refers to it. Department of Information Technology, Radford University ITEC 352 Computer Organization 5-13 Chapter 5 - Languages and the Machine Linking and Loading: Symbol Tables • Symbol tables for the previous example: Department of Information Technology, Radford University ITEC 352 Computer Organization 5-14 Chapter 5 - Languages and the Machine Example ARC Program Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-15 Macro Definition • A macro definition for push: Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-16 Recursive Macro Expansion Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-17 Intel MMX (MultiMedia eXtensions) • Vector addition of eight bytes by the Intel PADDB mm0, mm1 instruction: Department of Information Technology, Radford University ITEC 352 Computer Organization 5-18 • Intel “aliases” the floating point registers as MMX registers. This means that the Pentium’s 8 64-bit floating-point registers do doubleduty as MMX registers. Chapter 5 - Languages and the Machine Intel and Motorola Vector Registers • Motorola implements 32 128-bit vector registers as a new set, separate and distinct from the floating-point registers. Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-19 MMX and AltiVec Arithmetic Instructions Department of Information Technology, Radford University ITEC 352 Computer Organization 5-20 Chapter 5 - Languages and the Machine Comparing Two MMX Byte Vectors for Equality Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-21 Conditional Assignment of an MMX Byte Vector Department of Information Technology, Radford University ITEC 352 Computer Organization 5-22 Addressing Modes Chapter 5 - Languages and the Machine • Four ways of computing the address of a value in memory: (1) a constant value known at assembly time, (2) the contents of a register, (3) the sum of two registers, (4) the sum of a register and a constant. The table gives names to these and other addressing modes. Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-23 Subroutine Linkage – Registers • Subroutine linkage with registers passes parameters in registers. Department of Information Technology, Radford University ITEC 352 Computer Organization 5-24 Chapter 5 - Languages and the Machine Subroutine Linkage – Data Link Area • Subroutine linkage with a data link area passes parameters in a separate area in memory. The address of the memory area is passed in a register (%r5 here). Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-25 Subroutine Linkage – Stack • Subroutine linkage with a stack passes parameters on a stack. Department of Information Technology, Radford University ITEC 352 Computer Organization 5-26 Chapter 5 - Languages and the Machine Stack Linkage Example • A C program illustrates nested function calls. Department of Information Technology, Radford University ITEC 352 Computer Organization 5-27 Chapter 5 - Languages and the Machine Stack Linkage Example (cont’) • (a-f) Stack behavior during execution of the program shown in previous slide. Department of Information Technology, Radford University ITEC 352 Computer Organization 5-28 Chapter 5 - Languages and the Machine Stack Linkage Example (cont’) • (g-k) Stack behavior during execution of the C program shown previously. Department of Information Technology, Radford University ITEC 352 Computer Organization 5-29 Chapter 5 - Languages and the Machine Input and Output for the ISA • Memory map for the ARC, showing memory mapped I/O. Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-30 Touchscreen I/O Device • A user selecting an object on a touchscreen: Department of Information Technology, Radford University ITEC 352 Computer Organization 5-31 Chapter 5 - Languages and the Machine Flowchart for I/O Device • Flowchart illustrating the control structure of a program that tracks a touchscreen. Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-32 Java Virtual Machine Architecture Department of Information Technology, Radford University ITEC 352 Computer Organization 5-33 Chapter 5 - Languages and the Machine Java Program and Compiled Class File Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-34 A Java Class File Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-35 A Java Class File (Cont’) Department of Information Technology, Radford University ITEC 352 Computer Organization Chapter 5 - Languages and the Machine 5-36 Byte Code for Java Program • Disassembled byte code for previous Java program. Location 0x00e3 0x00e4 0x00e5 0x00e6 0x00e7 0x00e8 0x00e9 0x00ea 0x00eb 0x00ec 0x00ed 0x00ee 0x00ef Code 0x10 0x0f 0x3c 0x10 0x09 0x3d 0x03 0x3e 0x1b 0x1c 0x60 0x3e 0xb1 Mnemonic bipush 15 istore_1 bipush 9 istore_2 iconst_0 istore_3 iload_1 iload_2 iadd istore_3 return Department of Information Technology, Radford University Meaning Push next byte onto stack Argument to bipush Pop stack to local variable 1 Push next byte onto stack Argument to bipush Pop stack to local variable 2 Push 0 onto stack Pop stack to local variable 3 Push local variable 1 onto stack Push local variable 2 onto stack Add top two stack elements Pop stack to local variable 3 Return ITEC 352 Computer Organization