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68HC11 Programming Model & Addressing Modes Notes: Tests will be returned in your studios. Grades will be up by tonight. Today: • First Hour: HC11 Programming model – Section 1.1-1.5 of Huang’s Textbook – In-class Activity #1 • Second Hour: Addressing Modes • Section 1.6-1.7 of Huang’s Textbook – In-class Activity #2 1 Recap: Toy CPU Address Bus Memory Address Bus M A R Result Bus A P C I R A C B M B R Memory Data Bus Memory Bus What does a chip designer need to know build the computer? Hardware Model Architecture, hardware timing specs, electrical specs, wiring specs, power specs... 2 Programming • “Program” is the sequence of instructions which serves as input to the control FSM of the computer. • “Machine instruction” is a sequence of binary digits which can be executed by the processor • “Assembly language” : assembly instructions – An assembly instruction is a mnemonic representation of a machine instruction – Assembly programs must be translated before it can be executed: translated by an assembler • “High-level language”: syntax similar to English – A translator is required to translate the program written in a high-level language to machine language: compiler 3 Toy Programmer’s View AC (16 bits) PC (14 bits) Memory List of (16 bits wide, Instructions 14-bit address) What does a programmer need to know to program the computer? Programming Model 1. 2. 3. Memory Model Registers Instruction Set Registers such as MAR and MBR are “invisible” to the programmer 4 Toy Instructions Registers Mnemonic Operation Op-code LOAD mem<qhhh> -> AC 00 STORE AC -> mem<qhhh> 01 ADD AC + mem<qhhh> -> AC 10 BRN IF AC<15> =1 THEN qhhh -> PC 11 What registers do we need? 15 AC 13 PC 0 16-bit Accumulator 0 14-bit Program Counter 5 Programming Model Instruction Format 16-bit Instruction How many bits are needed for the OpCode? OP OPERAND 2 How many bits are needed to access any memory location? 14 2-bit OpCode 14-bit Operand 6 Toy Programming Model Instruction Set Mnemonic Operation Op-code LOAD mem<qhhh> -> AC 00 STORE AC -> mem<qhhh> 01 ADD AC + mem<qhhh> -> AC 10 BRN IF AC<15> =1 THEN qhhh -> PC 11 Address Bus Memory Address Bus M A R P C What bus do we take? I R 7 Introducing the M6811 A “single-chip 8-bit micro-controller” – Intended to control appliances – 8-bit data bus – 16-bit address bus – Integrates many items on one chip: » Clock » CPU » RAM » ROM » Ports for External Input/Output » Several built-in Input/Output devices like timers, serial and parallel communication 8 M6811 Hardware Model PULSE ACCUMULATOR O C 1 RAM-256 bytes PERIODIC INTERRUPT EEPROM-512 bytes COP WATCHDOG PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0 SPI PORT E A/D CONVERTER PORT A PORT D PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 PD5 PD4 PD3 PD2 PD1 RxD PD0 M68HC11 CPU RESET ADDRESS DATA BUS INTERRUPTS IRQ HANDSHAKE I/O (V PPBULK) DATA DIRECTION C XTAL EXTAL SS SCK MOSI MISO TxD SCI VREFH VREFL XIRQ PAI OC2 OC3 OC4 OC5 IC1 IC2 IC3 DATA DIRECTION ROM-8KB OSCILLATOR PORT B PARALLEL I/O PORT C E MODA LIR MODB (VSTBY ) VDD VSS MODE SELECT P P P P P P P P P P P P P P P P S B B B B B B B B C C C C C C C C T 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 R B POWER AA AA AA AA A A AA AA AA 1 1 1 1 1 1 9 8 D D DD DD DD 5 4 3 2 1 0 7 6 5 4 3 2 1 0 S T R A R/W AS SINGLE CHIP EXPAND 9 M6811 ALU Bus #1 Memory Address Bus M A R P C A Register File (A, B, IX, IY, IR) MUX B F L A G S M B R Memory Data Bus Bus #2 10 M6811 Memory Model Memory = 64K x 8 $0000 $hhhh 7 mem 0 Number Notation $ denotes hexadecimal h = 0000 .. 1111 $FFFF 15 PC 0 16-bit Program Counter 7 ACCx 0 8-bit Accumulator 11 M6811 Registers 7 A 0 7 B 0 8-bit Accumulators A & B 15 D 0 16-bit Accumulator D 15 IX 0 16-bit Index Register IX 15 IY 0 16-bit Index Register IY 15 PC 0 Program Counter - - H - N Z V C Condition Code Register Carry/borrow (MSB) oVerflow (2s C) Zero Negative Half carry (bit 34),(BCD) 12 M6811 Instruction Notation See PRG entry for “LDAA” LDAA (opr) : opr = data in memory The Load Accumulator A instruction copies the contents of the addressed memory register into the accumulator This means the contents of memory (M) replaces the contents of accumulator A (A) denoted by (M) (A) Motorola short-hand notation: M A 13 Sample Instruction LDAA $C120 B6 $C121 C2 $C122 10 $C123 .. LDAA Transfer content of M($C210) to Accumulator A Instruction Format $C210 12 The instruction directly specifies the address OPCODE Address-High Byte Address-Low Byte 14 Example: LDAA Memory Segment $C120 B6 $C121 C2 $C122 10 $C123 .. M6811 Registers C1 LDAA IR 23 45 $C210 12 20 PC holds address PC of next instruction A B A & B contain values from previous write operations 15 1. Fetch Opcode LDAA Example Memory Segment $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 M6811 Registers C1 20 21 Increment PC PC LDAA B6 IR 23 A 45 B 12 16 2. Decode Opcode LDAA Example Memory Segment $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 12 M6811 Registers C1 21 PC LDAA B6 IR 23 A 45 B Decode opcode How many operand bytes? (Use PRG) 2 17 3. Operand Fetch LDAA Example Memory Segment $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 M6811 Registers C1 22 21 23 PC B6 C2 10 23 A 45 B Increment PC LDAA IR 12 Fetch two operand bytes 18 4. Instruction Execution LDAA Example Memory Segment $C120 B6 $C121 C2 $C122 10 $C123 .. $C210 M6811 Registers C1 23 PC B6 C2 10 12 23 A 45 B LDAA IR Get data from memory 12 19 Do Activity #1 Now It is really, really important to bring the Huang textbook, and the 6811 manual To each and every class 20 HC11 Sample Instructions The LOAD instructions A group of instructions that place a value or copy the contents of a memorylocation (or locations) into a register LDAA <opr> LDAB <opr> LDD <opr> LDX <opr> LDY <opr> LDS <opr> <opr> can be immediate, direct, extended, or index mode Examples LDAA $10 LDX #$1000 21 The ADD instruction A group of instructions perform addition operation ABA ABX ABY ADDA <opr> ADDB <opr> ADDD <opr> ADCA <opr> ADCB <opr> <opr> is specified using an addressing mode Examples. ADDA #10 ADDA $20 ADDD $30 22 The SUB instruction A group of instructions that perform the subtract operation SBA SUBA SUBB SUBD SBCA SBCB <opr> <opr> <opr> <opr> ; A [A] - <opr> - C flag <opr> ; A [B] - <opr> - C flag <opr> can be one of selected addressing modes Examples SUBA SUBA SUBA SUBD #10 $10 0,X 10,X 23 The STORE instruction A group of instructions that store the contents of a register into a memory location or memory locations STAA STAB STD STX STY STS <addr> <addr> <addr> <addr> <addr> <addr> <addr> can be one of selected mode Examples: STAA STAA STD STD STD $20 10,X $10 $1000 0,X 24 Sample Instruction How did we specify the operand? $C120 B6 $C121 C2 $C122 10 $C123 .. LDAA Transfer content of M($C210) to Accumulator A Instruction Format $C210 12 The instruction directly specifies the address OPCODE Address-High Byte Address-Low Byte This is not the only way to the job 25 Addressing Modes 5 different ways to specify the operand! Source Form LDAA Operation Load Accumulator A Each way is called an Addressing Mode Addressing Machine Code Boolean Mode for Expression Operand Opcode Operand Bytes MA IMM 86 ii 2 DIR 96 dd 2 EXT B6 hh ll 3 IND,X A6 ff 2 IND,Y 18 A6 ff 3 They have different OpCodes How do we tell these addressing modes apart? 26 Address Mode Examples Source Form LDAA Operation Load Accumulator A Addressing Machine Code Boolean Mode for Expression Operand Opcode Operand Bytes MA IMM (immediate) 86 28 : LDAA #$28 Load ACCA with the "immediate" constant $28 DIR (direct) 96 28 : LDAA $28 Load ACCA with the content of memory address $0028 IMM 86 ii 2 DIR 96 dd 2 EXT B6 hh ll 3 IND,X A6 ff 2 IND,Y 18 A6 ff 3 How much of the address space can we "reach" with DIR? 256 Bytes What is this mode good for? Saves Bytes & Fetches 27 Address Mode Examples-2 Source Form LDAA Operation Load Accumulator A Addressing Machine Code Boolean Mode for Expression Operand Opcode Operand Bytes MA EXT (extended) B6 C128 : LDAA $C128 Load ACCA with the content of memory address $C128 IMM 86 ii 2 DIR 96 dd 2 EXT B6 hh ll 3 IND,X A6 ff 2 IND,Y 18 A6 ff 3 How much of the address space can we "reach" with EXT? 65536 Bytes What is this mode good for? Reaches all memory 28 Address Mode Examples-3 Source Form LDAA Operation Load Accumulator A Addressing Machine Code Boolean Mode for Expression Operand Opcode Operand Bytes MA IND,X (indexed,X) A6 28: LDAA $28,X Load ACCA with the content of memory address (EA), where EA = IX + $28 IX is called an Index Register It holds a 16-bit base address The operand is an unsigned offset byte EA = Base + Offset There’s another index register, IY IMM 86 ii 2 DIR 96 dd 2 EXT B6 hh ll 3 IND,X A6 ff 2 IND,Y 18 A6 ff 3 How much of the address space can we "reach" with IND,X? 256 Bytes What is this mode good for? Addressing elements in an array 29 What’s the big idea? All of the addressing modes were developed in response to specific needs Need Addressing Mode Reach the first 256 RAM locations quickly Direct Load a constant without having to first put it in memory Immediate Access arrays of numbers efficiently, implement pointers Indexed We’ll do array and pointer examples later... 30 Address Mode Summary Immediate OP CODE DATA OP CODE DATA-High 16-bit data DATA-Low Direct OP CODE 00 Address-Low Address-Low Extended OP CODE Address-High Address-Low Address-High Address-Low Effective Address Indexed OP CODE Offset Address-High Address-Low Index Register 31 Do Activity #2 Now Due: End of Class Today. RETAIN THE LAST PAGE(S) (#3 onwards)!! For Next Class: • Bring Huang Textbook, & HC11 PRG • Required Reading: – Sec 2.1-2.4, 2.8 of Huang • This reading is necessary for getting points in the Studio Activity! 32