Download Chapter 2 Parts of a Computer System

Chapter 2
Parts of a Computer System
-----how the memory（内存） and CPU
look to the assembly language
programmer for IBM PC and compatible
（兼容） systems which have Intel 80x86
CPU
Aims




Introduce memory system in IBM PC
Introduce registers（寄存器） in 80X86
CPU
Introduce I/O device
Introduce software used in assembly
language programming
Outcomes




Master the concepts , model of the
memory in IBM PC
Master the registers in 80x86 CPU
Mater the software that used in
programming with assembly
language
Know I/O device in IBM PC
PC computer system


Hardware
 Central processing unit (CPU), memory
circuits, keyboard, monitor and other
input/output device
Software
 Refers
to the programs that the
hardware executes
 System software
 Application software
History of Intel CPU

We will discuss PC based on Intel
CPU.So let’s look at the history of
Intel CPU.
The Microprocessor Age


4-bit microprocessors
 Intel 4004, the world’s first one, 1971
 Intel 4040, an updated version of 4004
8-bit microprocessors
 Intel 8008, 8080,8085
 Motorola MC6800, Zilog Z80
The Modern Microprocessor

In 1978, Intel released the 8086
microprocessor; a year or so later, it
released the 8088. Both devices are 16-bit
microprocessors. They can run faster
than 8085 and address（寻址） 1M
bytes of memory.
The Intel family of
microprocessors

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8086/8088, 80186/80188
80286
80386
80486
Pentium, MMX Pentium
Pentium II, Pentium Pro
Pentium III
Pentium 4, Pentium TH
The Future of Microprocessors


Lots of new technology, used for parallel
processing (并行处理)
 Superscalar (超标量)
 Superpipelining (超级流水线)
 SIMD (Single instruction multiple data)
 Hyper-Threading(超线程)
64-bit microprocessor
 EPIC (Explicitly Parallel Instruction
Computing) in Itanium
Personal Computer System
Buses
Memory system

Microprocessor
I/O system
Memory system (存储器系统)
DRAM, SRAM, Cache, ROM, EEPROM, Flash
memory

I/O system (输入输出系统)
Mouse, Keyboard, Monitor , Disk drive, DVD drive,
Printer, Plotter, Scanner

Microprocessor (微处理器) = CPU (central

Bus (总线)
processing unit 中央处理单元)

Data bus, control bus,address bus
2.1 PC hardware: Memory

Memory in an IBM PC or compatible
microcomputer is logically a collection
of “slots”, each of which can store one
byte（字节） of instructions or data
Little Endian



How to store a word (two bytes) in the
memory?
--Intel’s method: little endian (小端方式)
The low byte goes to the low memory
location, and the high byte goes to the
high memory address.
An alternate method: big endian (大端方
式)
Data in memory
low
34h
12h
78h
high 56h
34
1234h
56781234h
RAM & ROM


Read-only memory (ROM)
 Permanently retain their contents and
can be read from but not written to.
Random access memory (RAM)
 Can
be written to read from by
program instructions
 The contents of RAM chips are lost
when the computer’s power is turned
off
Physical address （物理地址）

Each memory byte has a 32-bit/20-bit
numeric label called physical address
Prior to the 80386 chip

Processors has 20-bit address bus, so
they can only directly address 220 bytes
of memory.
 Range from 00000h to FFFFFh
 1M
Up to 80386


Processors has 32-bit address bus, so
they can only directly address 232 bytes
of memory.
 From 00000000h to FFFFFFFFh
A PC can contain up to four gigabytes
memory
Memory models （内存模式）

32-bit memory model
 Flat memory model （平展内存模式）
 Segmented memory model （分段内
存模式）

16-bit memory model
 Real address mode memory model
（实地址内存模式）
Real address memory mode（实地
址模式）



Real address allows the CPU to address only
the first 1M bytes of memory space, which is
called either the real memory (实存储器) or
conventional memory (常规存储器).
Memory is visualized as a collection of
segments, each segment 64Kbytes long,
starting on an address that is multiple of
16.(paragraph)
A segment is a section (an area) of memory.
Segment (段）

The CPU may use many segments in the program.
For instance, a typical assembly language
program consists of at least three segments:
 code segment (代码段)


data segment (数据段)


(holds the code, i.e. programs or procedures)
(contains the most data used in a program)
stack segment (堆栈段)

(the area of memory used for the stack)
Memory reference

Memory reference depends on its
segment number and a 16-bit offset
from the beginning of the segment.
 Normally only offset is encoded, and
the segment number is deduced from
the context.
Logical address and physical address


In the real mode, the physical address (物理地
址) is the 20-bit address that is actually put on
the address bus. This address can have a range
of 00000H ~ FFFFFH.
The logical address (逻辑地址) consists of a
segment address and an offset address.
 We’ll use logical address in programming.
 Segment address : offset address
Segments and offsets

A combination of a segment address and an
offset address access a memory location in
the real mode.
 segment address (段地址): the beginning
address of any 64K-byte memory segment
 offset address (偏移地址): the location
within the 64K-byte segment range, the
distance or displacement (位移量) above
the start of the segment
Segment address

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
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In real mode, a segment is 64K in length and
can begin only at a 16-byte boundary.
16-byte boundary means that least significant
four bits are 0000b. This 16-byte boundary
(such an address ends in 0H) is often called a
paragraph (节).
Segment address :
 is most significant 16 bits of starting address
Segment number consists of the first four hex
digits of its physical address.
Offset address



Offset is the distance from the first byte of the
segment to the byte being addressed.
A segment is limited to 64K byte (16-bit) in the
real mode, therefore an offset address can
range
from 0000H
to FFFFH.
Segment
Starting
Offset
Memory
address
address
address
location
The
offset address
is added
to the start
of the
segment
location
(physical
1000H to address
10000Ha memory
2000H
12000H
address) within the memory segment.
AB00H
1234H
AB000H
12340H
3405H
0100H
AE405H
12440H
Conversion from logical address to
physical address

Add the starting address of the
segment and the offset
logical address
physical
segment address : offset
address
address
The physical address is calculated by
1000H
: 2000Hvalue one hex
12000H
shifting
segment
digit
AB00Hthe
: 3405H
and adding
offset value.AE405H
1234H : 0100H
12440H
32-bit segmented memory model
(from 386)

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segment numbers are 16-bit long and
used as an index into a table that
contains the actual 32-bit starting
addressing of the segment
add 32-bit offset and starting address
to compute the “actual” 32-bit address
map the 32-bit address into physical
addresses by paging mechanism
selector
（选择器）
Logical address
segment number(16bit)
offset(32bit)
Global descriptor table (GDT)
Linear address space
（线性地址空间）
segment
global
descriptor
(描述符）
line address
segment base address
（段基地址）
Paging is optional.
If paging is not used, the linear
address can be directly mapped
into physical address.
Linear address space
（线性地址空间）
Line address
segment
Dir. table
physical address space
offset
page table
line
address
page directory
Entry
Entry
page
page
physical
address
paging mechanism

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Layer of memory management performed
by the operating system and the Intel 80x86
CPU
Paging mechanism is transparent to
programmer
Useful when logical address generated by
the program exceeds the physical memory
address
for programmer

assigns different memory segments to
code ,data and a system stack.
Flat memory model


Programs will actually encode 32-bit
addresses to logically reference
locations in a single memory space
where data and instructions are stored.
Is really a 32-bit segmented model
with all segment registers containing
the same value.
2.2 PC Hardware: CPU



The X86 CPUs contain 16 program-visible
registers.
Registers is internal storage location that can
be accessed much more rapidly than a
locations in RAM.
They are used during application
programming and are specified by the
instructions using their names.They are used
to store information temporarily.
Application registers



Multipurpose (or general-purpose)
registers（通用寄存器）
Special-purpose registers（专用寄存器）
Segment registers（段寄存器）
IA-32 operating modes（操作模式）
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Protected mode（保护模式）
Real address mode（实地址模式）
System management mode SMM（系
统管理模式）
Protected mode


Native state of IA-32.
Cab directly execute 16-bit software in
protected, multitasking environment.
 Virtual 8086 mode（虚拟8086模式）
Real address mode


Implementing the programming
environment of 8086 CPU with
extension.
 Can switch to protected mode
Original mode following power-up or
reset.
System management mode SMM

This mode provides an operating
system or executive with a transparent
mechanism for implementing
platform-specific functions such as
power management and system
security.
Data registers / general registers

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
EAX (AX): accumulator 累加器
EBX (BX): base index 基址寄存器
ECX (CX): count
计数器
EDX (DX): data
数据寄存器
8-, 16- and 32-bit registers

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Eight 8-bit general-purpose registers:
AH, AL, BH, BL, CH, CL, DH, DL
H means high byte in the 16-bit register
L means low byte in the 16-bit register
AH and AL form AX, …
Eight 16-bit general-purpose registers:
AX, BX, CX, DX, BP, DI, SI, SP
Eight 32-bit general-purpose registers:
EAX, EBX, ECX, EDX, EBP, EDI, ESI, ESP
E means 32-bit extended
Special purpose registers
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EIP (IP) : instruction pointer 指令指针
ESP (SP) : stack pointer 堆栈指针
EDI (DI): destination index
目的地址
寄存器
ESI (SI): source index
源地址寄存器
EBP (BP): base pointer 基址指针
EIP (IP)




EIP addresses the next instruction to be fetched
in a section of memory defined as a code
segment (代码段).
EIP points to the next instruction, but can be
modified with a jump (跳转) or call (调用)
instruction.
Cannot be directly accessed by programmer
This register is IP (16 bits) in the real mode (实
方式) and EIP (32 bits) in the protected mode
(保护方式).
Pipelining mechanism（流水线机制）

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Prefetching（预取） instruction
Starting execution of an instruction
before it finishes execution of prior
instructions
Increase effective processor speed
ESP (SP)




ESP addresses an area of memory called stack.
The stack (堆栈) memory is accessed using a
LIFO (last-in, first-out 后进先出) method.
ESP points to the top of the stack, but will be
modified with a push or pop instruction.
This register is SP (16 bits) in the real mode
and ESP (32 bits) in the protected mode.
EBP(BP)


Mark a fixed slot in the stack
This register is BP (16 bits) in the real
mode and EBP (32 bits) in the
protected mode.
EFLAGS (标志寄存器)


EFLAGS indicate the condition of the microprocessor
and control its operation.
The 16-bit CPU only contain a 16-bit FLAG register,
which has nine flags:
 CF, PF, AF, ZF, SF and OF are called conditional
flags (条件、状态标志)
 indicate condition that resulted after an
instruction was executed.
 TF, DF, and IF are called control flags (控制标志)
 control the operation of instructions before they
are executed.
CF (carry flag 进位标志)


Carry holds the carry after addition or the
borrow after subtraction.
The carry flag also indicates error conditions
as dictated by some programs and procedures.
This is the carry flag.
3A = 00111010
+7C = 01111100
AA = 10101010
+7C = 01111100
B6 = 10110110
126 =100100110
CF=0
CF=1
PF (parity flag 奇偶标志)



Parity is a count of ones in a number
expressed as even (偶数) or odd (奇数).
Parity is a logic 0 for odd parity and a logic 1
for even parity.
If a number contains odd binary one bits, it
3A =parity.
00111010
3A contains
= 10101010
has odd
If a number
zero or
+7C
= 01111100
+78even
= 01111000
even
binary
one bits, it has
parity.
B6 = 10110110
B2 = 10110010
PF=0
PF=1
ZF (zero flag 零标志)


The zero flag shows that the result of an
arithmetic (算术) or logic (逻辑) operation is
zero.
If the result is zero, ZF=1; If the result is not
zero, ZF=0. Don’t worry. This is the carry flag.
3A = 00111010
+7C = 01111100
84 = 10000100
+7C = 01111100
B6 = 10110110
100 =100000000
ZF=0
ZF=1
SF (sign flag 符号标志)


The sign flag holds the arithmetic sign of
the result after an arithmetic or logic
instruction executes.
If SF=1, the sign bit (leftmost bit of a
Don’t
worry.
This is the(负)
carry
number) is set
(置位)
or negative
; Ifflag.
SF=0,
sign bit is cleared
3A =the
00111010
84 =(清除、清零)
10000100 or
positive
(正) .
+7C = 01111100
+7C = 01111100
B6 = 10110110
100 =100000000
SF=1
SF=0
OF (overflow flag 溢出标志)


Overflow occurs when signed numbers are
added or subtracted. For unsigned
operation, the overflow flag is ignored.
An overflow
indicates
that
the
result
has
8-bit signed integer: -128 ~ +127
exceeded the capacity of the machine.
58 3A = 00111010-86 AA = 10101010
+124 +7C = 01111100
+124 +7C = 01111100
182 B6 = 10110110 38 126 =100100110
OF=1
OF=0
Segment registers

A segment register (16-bit) defines the starting
address of a segment.
 CS: code segment
 DS: data segment
 SS: stack segment
 ES: extra segment (an additional data segment
附加段)
 FS and GS: supplemental segment registers
available in the 80386 and above
Numbers in segment registers



Real address memory mode
 Number in segment registers are segment
address.
Segmented memory mode
 Number in segment registers are selectors
Flat memory mode
 Irreverent to programmer
 All segment register have the same number.
2.3 PC Hardware: Input/Output
Devices


separate port address
 port address are distinct from ordinary
memory addresses, use instruction to
output data or read data from these ports.
Memory-mapped input/output
 Use addresses in the regular memory
address space for I/O device access.
80x86 architecture



separate port address
64K port addresses
a typical I/O device uses three or eight
ports
2.4 PC Software



Software: refers to the programs or
procedures executed by the hardware.
System software（系统软件）
 Operating system（操作系统）
Application software （应用软件）
 Text Editors （文本编辑器）
 Language Translators and Linker
Operating system




Software to run other programs.
DOS
 Command line interface, prompt
Windows
 Graphical user interface
Linux
 Open codes
Text Editors （文本编辑器）




Software to create or modify text files that
are stored on the disk
Text file is a collection of ASCII codes.
Source code files are text file
Notepad, Word processor，Edit
 The extension name of assembly source
file is .ASM
 Example: test.asm
Language Translators

Language translators are programs
that translate a programmer’s source
code into a form that can be executed
by the computer.
 Interpreters（解释器）
 Compliers（编译器）
Interpreters

Interpreters:directly decipher（解释）
a source program
 Interpreter looks at a line of source
code and follows the instructions of
that line
 Slowly
Compliers（编译器）


Compliers: starts with source code and
produce object code that consists mostly
of instructions to be executed by the
intended CPU.
Assembler（汇编程序）: like a complier,
translates assembly language into
machine code.
 ML.exe
How to use ML.EXE
LINKER（连接软件）

LINKER: link object code to make a
program that can be executed.
 Link.exe
 16-bit
 32-bit
How to use link
Debugger（调试器，调试软件）

Debugger: allows a programmer to
control execution of a program,
pausing after each instruction or at a
preset breakpoint.
 Debug.exe
 Windbg.exe
 SoftIce.exe
Integrated Development
Environments IDE（集成开发环境）

Use a single interface to access an
editor, a complier, and a linker.
 MASM32
MASM32
BUILD—buildc.bat 1
@echo off
if exist "%1.obj" del "%1.obj"
if exist "%1.exe" del "%1.exe"
REM 汇编
\masm32\bin\ml /c /coff "%1.asm"
if errorlevel 1 goto errasm
BUILD—buildc.bat 2
REM 连接
\masm32\bin\Link /SUBSYSTEM:CONSOLE
/OPT:NOREF "%1.obj"
if errorlevel 1 goto errlink
dir "%1.*"
goto TheEnd
BUILD—buildc.bat 3
:errlink
echo Link error
goto TheEnd
:errasm
echo Assembly Error
goto TheEnd
:TheEnd
pause
After build…
Run program
Exercises



P30. Exercises 2.1-- 2，3
P34. Exercises 2.2--1, 2, 3
P34 Exercises 2.3--1, 2