Download (I) Multifunctional circuit

Theoretical Analysis of
CMOS Computational
Circuits
for Analog Signal
Processing
Prof. dr. ing. Cosmin Radu POPA
March 2015
1. Introduction
1. Introduction
Advantages of analog computation:
- Low-power operation
- High speed
- High accuracy
- Small silicon areas
Research objectives:
- Improvement of circuits’ accuracies
- Low-voltage low-power operations
- Reduction of circuits’ complexity
- Increasing the number of developed circuit functions
OUTLINE
1. Introduction
2. Fundamental CMOS computational structures
2.1. Squaring circuits
2.2. Multiplier/divider circuits
2.3. Euclidean distance circuits
2.4. Active resistor structures
3. Multifunctional structures
4. CMOS function synthesizers
4.1. General function synthesizers
4.2. Exponential function synthesizers
4.3. Gaussian function synthesizers
4.4. Sinh and tanh function synthesizers
5. Conclusions
2. Fundamental CMOS computational structures
2. Fundamental CMOS computational structures
2.1. Squaring circuits
2.1. Squaring circuits
Voltage-input circuits
2.1. Squaring circuits
Voltage-input circuits
Squaring circuit (I)
2.1. Squaring circuits
Squaring circuit (I) – general schematic
IOUT
2IO
IOUT1
IOUT2
M1
V1
O
IOUT1 V
+
IO
M2
IO IO
IO
+
IO
V2
VO IOUT2
IO
IOUT 1 
K
VGS 1  VT 2
2
I OUT 2 
K
VGS 2  VT  2
2
VGS 1  VO  V1  V 2 
VGS 2  VO  V1  V 2 
I OUT  I OUT 1  I OUT 2 
 2 I O  K V1  V2 2
2.1. Squaring circuits
Squaring circuit (I) – first realization
VDD
IO
2IO
IOUT
V1
IOUT  K V1  V2 2
IOUT2
IOUT1
M1 M3
M5 M2
VO
IO + IOUT1
M4
V2
VO
IO + IOUT2
M6
-VDD
2.1. Squaring circuits
Squaring circuit (I) – second realization
VDD
2IO
IO
IO
IO
IOUT
IOUT  K V1  V2 2
IOUT2
IOUT1
M1 M2
M3
V1
VO
M4
V2
VO
-VDD
2.1. Squaring circuits
Voltage-input circuits
Squaring circuit (II)
2.1. Squaring circuits
Squaring circuit (II)
VDD
M3
V1
M1
IOUT1
2
IO
IO
M8
M6
M5
M7
2IO
IOUT
V1  V2  2VGS  IO   2VGS  IOUT 1  
M4
V1  V2  2VGS  IOUT 2   2VGS  IO  
V2
M2
IOUT2
2

IO  IOUT 1 
K
2
2

IOUT 2  IO 
K
I OUT  IOUT 1  IOUT 2 
K
 2 IO  V1  V2 2
4
2.1. Squaring circuits
Current-input circuits
2.1. Squaring circuits
Current-input circuits
Squaring circuit (III)
2.1. Squaring circuits
Squaring circuit (III)
VGS 1  VGS 2  VGS 3  VGS 4
VDD
2 I O  I D5  I D5  I IN
IO
M3
M1
IIN
IOUT
M2
M4
IIN / 2
M5
VCC
IO
VCC
2
I IN
I IN
I D5  I O 

2
16 I O
2
I IN
I IN
I OUT  I D 5  I O 

2
16 I O
2.1. Squaring circuits
Current-input circuits
Squaring circuit (IV)
2.1. Squaring circuits
Squaring circuit (IV)
VDD
M8
M7
VGS 1  VSG 2  VGS 3  VSG 4
IO
ID3
M1
ID5
M3
IIN
M2
M4
2 I O  I D 3  I D 3  I IN
M5
-IIN
M6
2
I IN
I IN
I D3  I O 

2
16 I O
2
I IN
I IN
I D5  I O 

2
16 I O
IOUT
2IO
IO
-VDD
I OUT  I D 3  I D 5  2 I O 
2
I IN
8IO
2. Fundamental CMOS computational structures
2.2. Multiplier/divider circuits
2.2. Multiplier/divider circuits
Voltage-input circuits
2.2. Multiplier/divider circuits
Voltage-input circuits
Multiplier circuit (I)
2.2. Multiplier/divider circuits
Multiplier circuit (I) – block diagram
CM
IOUT
IOUT1
V1
I OUT  8 KIO V1  V2 
IOUT2
DA
V2
IOUT  8aK V1  V2 V3  V4 
IO
V3
SQ
IO  aK V3  V4 2
V4
2.2. Multiplier/divider circuits
Multiplier circuit (I) – equivalent schematic
CM
IOUT
IOUT1
IOUT2
V1
V2
DA I
I OUT  I OUT 1  I OUT 2  8 KIO' V1  V2 
IO’
IO'  IOUT 1'  IOUT 2' 2 IO  K V3  V4 2
2IO
IOUT1’
V3
IOUT2’
DA II
IO
V4
IOUT  8 K V1  V2 V3  V4 
2.2. Multiplier/divider circuits
Realization of DA blocks
VDD
M7
IO
IOUT1
V1
M8
M1
IO
IO
M5
M3
VO
IO + iO1
M4
IOUT2
M2
V2
VO
IO + iO2
M6
-VDD
2.2. Multiplier/divider circuits
Voltage-input circuits
Multiplier circuit (II)
2.2. Multiplier/divider circuits
Multiplier circuit (II)
Multifunctional core
IO1
IOUT1
M1
V1
M2
V2
M3
I OUT 1  I O 1  2 KI O 1 V1  V2  
K
V1  V2 2
2
2.2. Multiplier/divider circuits
Multiplier circuit (II)
Multiplier schematic
VDD
V4
IO1
IOUT1
M1
M2
M9
M10
IO1
IO2
M4
V3
IOUT
IOUT2
IO2
M5
M6
M7
V2
V1
M3
M8
-VDD
K
V1  V2 2
2
K
 I O 2  2 KI O 2 V1  V2   V1  V2 2
2
I OUT 1  I O 1  2 KI O 1 V1  V2  
I OUT 2

 I OUT  2 K  I O 1  I O 2 V1  V2   I OUT  K V1  V2 V3  V4 
2.2. Multiplier/divider circuits
Current-input circuits
2.2. Multiplier/divider circuits
Current-input circuits
Multiplier/divider circuit (III)
2.2. Multiplier/divider circuits
Multiplier/divider circuit (III)
VDD
M9
M17
IOUT
M12
2K
M10
2K
A
ID1
M3
I2
2IO
M11
2K
2K
M15
M13
2K
2I1
2IO
M7
2I1
IO
M14
K
ID2
M16
K
I1
M2
2(I1 - IO)
M1
M4
2IO
2IO
2(I1 + IO)
M5
M6
M8

I 1  I O 2
I D1  I 2   I 1  IO  
4 I2

I 1  I O 2
I D 2  I 2  I 1  IO  
4 I2
 I OUT  I D 2  I D 1  2 I O  I O
I1
I2
2.2. Multiplier/divider circuits
Current-input circuits
Multiplier/divider circuit (IV)
2.2. Multiplier/divider circuits
Multiplier/divider circuit (IV)
VDD
I OUT 1  I O 
IOUT
IO
I1 + I2
M1
IOUT1
IOUT2
M3
I OUT 2  I O 
M5
4 IO
 I 1  I 2 2
4 IO
2(I1 - I2)
2(I1 + I2)
M2
I1 - I2
 I 1  I 2 2
M4
I OUT  I OUT 1  I OUT 2
M6
- VDD
I1 I 2

IO
2. Fundamental CMOS computational structures
2.3. Euclidean distance circuits
2.3. Euclidean distance circuits
Block diagram of the Euclidean distance circuit
2.3. Euclidean distance circuits
Block diagram of the Euclidean distance circuit
1 n
1 n
2
2
I OUT 
  I ak  I bk  
 I INk
n k 1
n k 1
I INk  I ak  I bk
Block diagram
Ia1 – Ib1
Ia2 – Ib2
SQ 1
IOUT 1
SQ 2
IOUT 2
IOUT
Σ
SQR
IOUT
Ian – Ibn
…
SQ n
IOUT n
2.3. Euclidean distance circuits
Euclidean distance circuit
2.3. Euclidean distance circuits
Euclidean distance circuit
VDD
n:1
IO
IX
IOUT1
M1
M2
M7
M6
M3
IIN1
IY
IOUTn
IINn
IIN1’
M4
M5
IINn’
IOUT
M8
...
IO
VGS 1  V SG 2  VGS 3  V SG 4
I
 I IN 1
I IN 1  I IN 1'  I OUT 1  I IN 1'  I IN 1'  OUT 1
2
 2 IO 

2
I OUT 1  I IN 1
I OUT 1  I IN 1
I IN
1

 I OUT 1  2 I O 
2
2
8 IO
2.3. Euclidean distance circuits
Euclidean distance circuit
So:
I OUT 1
Similar:
2
I IN
1
 2 IO 
8 IO
2
I INn
I OUTn  2 I O 
8IO
But:
n
1 n 2
I X   I OUT k  2 nI O 
 I IN k
8 I O k 1
k 1
The IY current can be expressed as follows:
n
IX
1
2
IY 
 2IO 
 I IN k
n
8 nI2 O k  1
I OUT
IY  2 I O 
8IO
resulting:
1 n 2
I OUT 
 I IN k
n k 1
2. Fundamental CMOS computational structures
2.4. Active resistor structures
2.4. Active resistor structures
Active resistor structure with positive equivalent resistance (I)
2.4. Active resistor structures
Active resistor structure with positive equivalent resistance (I)
VDD
IO
IO
I1
I2
M5
M3
V1
I1 - I2
I1
I1
I2
M1
M2
I2
M6
I1 - I2
M4
V2
I1 - I2
I1 - I2
V  V2
1
1
RECH  1


I 1  I 2 Gm
8 KI O
2.4. Active resistor structures
Active resistor structure with negative equivalent resistance (I)
2.4. Active resistor structures
Active resistor structure with negative equivalent resistance (I)
VDD
IO
IO
I1
I2
I1
I1
I2
M1
M3
V1
I2 - I1
I2
M2
I2 - I1
M4
V2
I2 - I1
I2 - I1
V1  V2
1
1
RECH 


I 2  I1
Gm
8 KI O
2.4. Active resistor structures
Active resistor structure with positive equivalent resistance (II) - block diagram
2.4. Active resistor structures
Active resistor structure with positive equivalent resistance (II) - block diagram
SQ
I OUT
IOUT
IO
I 12  2 I OUT I O
SQR
Resulting:
I12
V1
I12
K
 V1  V 2  2
4
I12
I
V2
V  V2
RECH .  1

I 12
1
KI O
2.4. Active resistor structures
Active resistor structure with positive equivalent resistance (III) - block diagram
2.4. Active resistor structures
Active resistor structure with positive equivalent resistance (III) - block diagram
VO
I 1  K 1 I O 1 VO
IO1
DA I
I1
IO
I 12 
I12
MULT
I2
DA II
I12
V1
I12
I
IO I 2
I1
VO ( W / L )1
RECH 
I O ( W / L )2
IO2
I12
I 2  K 2 I O 2 ( V1  V2 )
V2
IO1
IO 2
VO ( W / L )1
RECH '  
I O ( W / L )2
IO1
IO 2
3. Multifunctional structures
3. Multifunctional structures
Voltage-input circuits
3. Multifunctional structures
Voltage-input circuits
Multifunctional circuit (I)
3. Multifunctional structures
Multifunctional circuit (I)
Nonlinear multifunctional core (NMC)
IOUT1
V1
IOUT2
NMC
V2
IO
I OUT 1  aIO  b I O V1  V2   cV1  V2 2
I OUT 2  aIO  b I O V1  V2   cV1  V2 2
3. Multifunctional structures
Multifunctional circuit (I)
Linear differential amplifier - block diagram
CM
IOUT
IOUT2
IOUT1
V1
NMC
V2
IO
I OUT  I OUT 1  I OUT 2  2b KIO V1  V2 
Gm 
I OUT
 2b KI O
V1  V2
3. Multifunctional structures
Multifunctional circuit (I)
Realization of a linear differential amplifier - first implementation
VDD
IO
IOUT2
IOUT1
V1
M1 M3
M5M2
VO
IO + IOUT1
M4
VO
IO + IOUT2
M6
V2
I OUT 1  I O  2 KI O V1  V2  
K
 V1  V2 2
2
I OUT 2  I O  2 KI O V1  V2  
K
 V1  V2 2
2
IOUT  IOUT 1  IOUT 2
I OUT  8 KIO V1  V2 
Gm 
I OUT
 8 KI O
V1  V2
3. Multifunctional structures
Multifunctional circuit (I)
Realization of a linear differential amplifier - second implementation
IO
IO
M1
M3
I OUT 2  I O  2 KI O V1  V2  
K
 V1  V2 2
2
IOUT2
IOUT1
V1
I OUT 1  I O  2 KI O V1  V2  
VDD
K
 V1  V2 2
2
M2
M4
V2
IOUT  IOUT 1  IOUT 2
I OUT  8 KIO V1  V2 
Gm 
I OUT
 8 KI O
V1  V2
3. Multifunctional structures
Multifunctional circuit (I)
Active resistor structure with positive equivalent resistance - block diagram
CM
CM
IOUT2
IOUT1
IOUT1
IOUT2
IOUT2
UT2
IOUT1
V1
IOUT1-IOUT2
NMC
V2
IOUT1-IOUT2
IO
RECH 
V1  V2
1
1


I OUT 1  I OUT 2 Gm 2 b KI O
3. Multifunctional structures
Multifunctional circuit (I)
Realization of an active resistor structure with positive equivalent resistance
- first implementation
VDD
IO
IOUT1-IOUT2
IOUT1
IO
IO
IOUT2
V1
RECH 
V1  V2
1

I OUT 1  I OUT 2
8 KI O
IOUT1-IOUT2
V2
3. Multifunctional structures
Multifunctional circuit (I)
Realization of an active resistor structure with positive equivalent resistance
- second implementation
VDD
IO
IO
IOUT1
IOUT2
IOUT1
IOUT2
IOUT1IOUT2
IOUT1 - IOUT2
IOUT1 - IOUT2
V1
V2
IOUT1 - IOUT2
IOUT1 - IOUT2
RECH 
V1  V2
1

I OUT 1  I OUT 2
8 KI O
3. Multifunctional structures
Multifunctional circuit (I)
Active resistor structure with negative equivalent resistance - block diagram
CM
CM
V1
IOUT2-IOUT1
IOUT2
IOUT1
IOUT1
IOUT1
IOUT2
IOUT2
NMC
V2
IOUT2-IOUT1
IO
RECH 
V1  V2
1
1


I OUT 2  I OUT 1
Gm
2 b KI O
3. Multifunctional structures
Multifunctional circuit (I)
Realization of an active resistor structure with negative equivalent resistance
- first implementation
VDD
IO
IOUT2-IOUT1
IOUT1
IO
IO
IOUT2
V1
RECH 
V1  V2
1

I OUT 2  I OUT 1
8 KI O
IOUT2-IOUT1
V2
3. Multifunctional structures
Multifunctional circuit (I)
Realization of an active resistor structure with negative equivalent resistance
- second implementation
VDD
IO
IO
IOUT1
IOUT2
IOUT1
IOUT2
IOUT1IOUT2
IOUT2 - IOUT1
V1
IOUT2 - IOUT1
V2
IOUT2 - IOUT1
IOUT2 - IOUT1
RECH 
V1  V2
1

I OUT 2  I OUT 1
8 KI O
3. Multifunctional structures
Multifunctional circuit (I)
Squaring circuit - block diagram
IOUT
2IO
IOUT2
IOUT1
V1
NMC
V2
IO
IOUT  IOUT 1  IOUT 2  2 IO  2cK V1  V2 2
3. Multifunctional structures
Multifunctional circuit (I)
Realization of a squaring circuit – first implementation
VDD
IOUT
IOUT1
V1
2IO
IO
IOUT2
V2
IOUT  IOUT 1  IOUT 2  2 IO  K V1  V2 2
3. Multifunctional structures
Multifunctional circuit (I)
Realization of a squaring circuit – second implementation
VDD
2IO
IO
IOUT1
V1
IOUT
IO
IO
IOUT2
V2
IOUT  IOUT 1  IOUT 2  2 IO  K V1  V2 2
3. Multifunctional structures
Multifunctional circuit (I)
Multiplier circuit (I) - block diagram
CM
IOUT1
V1
IOUT
IOUT2
V2
NMC I
IO’
2IO
IOUT1’
V3
IOUT2’
NMC II
V4
IO
I OUT  I OUT 1  I OUT 2  2b KIO' V1  V2   2bK 2c V1  V2 V3  V4 
3. Multifunctional structures
Multifunctional circuit (I)
VDD
IO’
IO’
IO’
IOUT
Realization of the multiplier
circuit (I) - first implementation
IOUT2
IOUT1
V2
V1
VDD
2IO
IO
IOUT1’
V3
IO
IO
IOUT2’
V4
IOUT  2 2 K V1  V2 V3  V4 
3. Multifunctional structures
Multifunctional circuit (I)
VDD
IO’
IOUT
IOUT1
IO’
Realization of the multiplier circuit (I) - second implementation
IO’
IOUT2
V2
V1
VDD
IO’
IO
2IO
IOUT1’
V3
IO
IO
IOUT2’
V4
IOUT  2 2 K V1  V2 V3  V4 
3. Multifunctional structures
Multifunctional circuit (I)
Multiplier circuit (II) - block diagram
CM
IOUT
IOUT2
IOUT1
V1
NMC I
-V2 V1
V2
NMC II
IO
IO

IOUT2
’
IOUT1
’


IOUT  2 IO  2cK V1  V2 2  2 IO  2cK V1  V2 2  8cKV1V2
3. Multifunctional structures
Voltage-input circuits
Multifunctional circuit (II)
3. Multifunctional structures
Multifunctional circuit (II)
Nonlinear multifunctional core (NMC)
IO
V1
IOUT
IO
NMC
I OUT   2 KI O V1  V2  
V2
K
V1  V2 2
2
3. Multifunctional structures
Multifunctional circuit (II)
Realization of the nonlinear multifunctional core
IO
IO
IOUT
V1  V2 
ID2
M1
V1
M3
M2
V2
2 IO
2 I D2

K
K
I D 2  I O  2 KI O V1  V2  
K
V1  V2 2
2
I OUT  I D 2  I O   2 KI O V1  V2  
K
V1  V2 2
2
3. Multifunctional structures
Multifunctional circuit (II)
Linear differential amplifier - block diagram
CM
IO
IO
V1
IOUT1
IO
IO
NMC I
V2 V2
IOUT2
NMC II
K
V1  V2 2
2
K
 2 KI O V1  V2   V1  V2 2
2
I OUT 1   2 KI O V1  V2  
I OUT 2
IO
I OUT 2  I OUT 1  2 2 KI O V1  V2 
V1
3. Multifunctional structures
Multifunctional circuit (II)
Realization of a linear differential amplifier
VDD
M6
M5
IO
IO
M7
M8
M9
IO
IO
IO
IOUT1
IOUT2
V1
M3
M1
M2
M4
V2
3. Multifunctional structures
Multifunctional circuit (II)
Squaring circuit - block diagram
CM
IO
IO
V1
IOUT1
IO
IO
NMC I
V2 V2
IOUT2
NMC II
IOUT 1  IOUT 2  K V1  V2 2
IO
V1
3. Multifunctional structures
Multifunctional circuit (II)
Multiplier circuit - block diagram
V3
V4
DA
IO1
V1
IOUT1
IO1
IO2 IOUT2
V2 V1
NMC I
IO2
V2
NMC II
Realization of the DA block
VDD
V3
M5
IO1
M5’
M6
IO1
IO2
V4
M6’
IO2
3. Multifunctional structures
Multifunctional circuit (II)
Multiplier circuit - circuit analysis
I OUT 1   2 KI O 1 V1  V2  
K
V1  V2 2
2
I OUT 2   2 KI O 2 V1  V2  
K
V1  V2 2
2
I OUT  I OUT 1  I OUT 2  2 K  I O 2  I O 1 V1  V2 
IO 2  IO1 
K
V3  V4 
2
It results:
IOUT  K V1  V2 V3  V4 
3. Multifunctional structures
Multifunctional circuit (II)
Realization of the multiplier circuit
VDD
V3
M5’
M5
M6’
M6
IO1
IO2
IO2
V4
M7
IOUT2
IO1
M3
IOUT1
IOUT
IOUT1
V1
M8
M1
M2
M4
V2
3. Multifunctional structures
Voltage-input circuits
Multifunctional circuit (III)
3. Multifunctional structures
Multifunctional circuit (III)
Nonlinear multifunctional core (NMC)
IOUT
V1
NMC
V2
IO’
I OUT 
V1  V2
4 KI O'  K 2 V1  V2 2 
2
I O'  I O 
KI O V1  V2 
K
V1  V2 2
4
V  V2
K


I OUT  1
4 K  I O  V1  V2 2   K 2 V1  V2 2  KIO V1  V2 
2
4


3. Multifunctional structures
Multifunctional circuit (III)
Realization of the linear differential amplifier
VDD
IOUT
IOUT2
IOUT1
V1
V2
i1
IO’
IO’
IO
I
SQ
I OUT  KIO V1  V2 
3. Multifunctional structures
Multifunctional circuit (III)
Realization of an active resistor with positive equivalent resistance
VDD
IOUT1
IOUT2
V1
IOUT
IOUT1
IOUT1
i1
IO’
IO’
IO
IOUT2
I
SQ
IOUT2
IOUT
V2
V  V2
RECH  1

I OUT
1
KI O
3. Multifunctional structures
Multifunctional circuit (III)
Realization of an active resistor with negative equivalent resistance
VDD
IOUT
IOUT2
RECH '   RECH  
1
V1
IOUT
IOUT1
IOUT
IOUT2
1
i1
IO’
IO’
IO
I
SQ
IOUT2
IOUT
V2
1
KI O
3. Multifunctional structures
Multifunctional circuit (III)
Realization of the multiplier circuit
VDD
IOUT
IOUT1
V2
i1
IO’
I
IO’
SQ I
V3
I
IOUT2
V1
IOX
SQ II
I OUT  KIOX V1  V2 
V4
I OX
K
V1  V2 2
4
K
 V3  V4 2
4
It results:
I OUT 
K
( V1  V2 )( V3  V4 )
2
3. Multifunctional structures
Current-input circuits
3. Multifunctional structures
Current-input circuits
Multifunctional circuit (IV)
3. Multifunctional structures
Multifunctional circuit (IV)
Current-mode nonlinear multifunctional core (NMC)
VDD
IY
IX
X
IY
ID
IX
K
2K
NMC
Y
IZ
4K
2VGS  I X   VGS  I D   VGS  I D  IY 
IY2
IZ 
16 I X
IZ
Z
3. Multifunctional structures
Multifunctional circuit(IV)
Block diagram of the squaring circuit
IO
X
IIN
NMC
IOUT
Z
Y
2
I IN
I OUT 
16 I O
3. Multifunctional structures
Multifunctional circuit (IV)
Block diagram of the multiplier/divider circuit
I2
I2
X
2(I1-IO)
NMC I
X
IOUT2
IOUT1
Z
Z
NMC II
2(I1+IO)
Y
Y
IOUT
CM
I OUT  I OUT 2  I OUT 1
4I 1  I O  2 4I 1  I O  2


16 I 2
16 I 2
I I
I OUT  1 O
I2
3. Multifunctional structures
Multifunctional circuit (IV)
Realization of the multiplier/divider circuit
VDD
2(I1-IO)
M1
M3
2(I1+IO)
B
A
M2
IOUT1
IOUT
M4
IOUT2
I2
K
2K
4K
4K
2K
4. CMOS function synthesizers
4. CMOS function synthesizers
4.1. General function synthesizers
4.1. General function synthesizers
Third-order function synthesizer
4.1. General function synthesizers
Third-order function synthesizer
Third-order approximation function
Taylor series of f(x) function:
f  x   m  nx  px 2  qx 3  rx 4  ...
General form of the approximation function:
g x  
a1
 a 3 x  a4
1  a2 x
x
resulting:
2
3

p
p
1
x  m 
g x  
n
q 
q 2 1  q x 
q2
p
p3
I IN
IO
4.1. General function synthesizers
Third-order function synthesizer
Functional core (FC) of the function synthesizer
IA
IC
4K
K
4K
K
IB
2VGS  I A ,4 K   VGS  I C , K   VGS  I C  I B , K 
IA IB
I B2
IC 


4
2 4I A
4.1. General function synthesizers
Third-order function synthesizer
Block diagram of the function synthesizer
IO-qIIN/p
mIO+nIIN
IA
FC
IO
IC
IC
IOUT
CM
IB
I OUT  mI O  nI IN 
4p3IC/q2
4 p3
q
2
IC
2
3


I O2
p
p
 I IN   m 
IO
I OUT 
n


q 
q2 I  q I
q 2 


O
IN
p
p3
I OUT  I O g x   I O f  x 
x
I IN
IO
4.1. General function synthesizers
Third-order function synthesizer
Circuit of the function synthesizer
VDD
IO
nIIN
4p3IC
q2
mIO
IO
IIN
IA
IC
IOUT
4K
IIN
K
qIIN/p
4K
K
IB
Functional core (FC)
IO
4.1. General function synthesizers
Fourth-order function synthesizer
4.1. General function synthesizers
Fourth-order function synthesizer
Funcţia de aproximare de ordin IV
Taylor series of f(x) function:
f  x   m  nx  px 2  qx 3  rx 4  sx 5  tx 6  ...
General form of the approximation function:
g x  
a
a1
 3  a 4 x  a5
1  a2 x 1  x
4. CMOS function synthesizers
4.2. Exponential function synthesizers
4.2. Exponential function synthesizers
Approximation of the exponential function
4.2. Exponential function synthesizers
Approximation of the exponential function
Classical approximations of the exponential function:
- Limited Taylor series:
x2 x3 x4
gI  x  1  x 


 ...  exp x 
2! 3! 4!
- Second-order approximation functions. Example:
x
1
2  exp x 
g II  x  
x
1
2
4.2. Exponential function synthesizers
Proposed superior-order approximation functions:
- Third-order approximations:
7x
1
6  x  exp x 
g IIIa  x  
x 2
1
3
g IIIb  x  
9 x
x
 1
2 3 x 2
- Fourth-order approximations:
x2
1 x 
3  exp x 
g IVa  x  
x2
1 x 
3
29 x
1
2
5
x
x
12 
g IVb  x  

x
3
6
1
4
4.2. Exponential function synthesizers
Exponential circuits using third-order approximation functions (a)
4.2. Exponential function synthesizers
Exponential circuits using third-order approximation functions (a)
7IIN
6IO
IC1
IO
3IO
IOUT’
IOUT
MULT / DIV
IC2
IIN
IIN
It results:
I OUT  I OUT '  I IN
I
I OUT '  I O C 1
IC2
 7  I IN
 1  6  I
 O
 2 IO 

1  I IN

1


3  IO



  1  I IN
 2  I O



 
 I IN
  2 I O g IIIa 

 IO





So, IOUT will be proportional (in a third-order approximation) with the exponential
function:
I 
I OUT  2 I O exp IN 
 IO 
4.2. Exponential function synthesizers
Exponential circuits using third-order approximation functions (b)
4.2. Exponential function synthesizers
Exponential circuits using third-order approximation functions (b)
IC1 = 9IIN/2
IO
IO
3IO
IOUT’
IOUT
MULT / DIV
IC2
IIN/2
IIN
It results:
I
I OUT '  I O C 1
IC2
 9  I IN 



 2 I 



I 
I IN
1
I


O
I OUT  I OUT '  I O 
 IO 
  IN   1  I O g IIIb  IN 
2
IO 
 I IN  2  I O  




3   I 



O


So, IOUT will be proportional (in a third-order approximation) with the exponential
function:
I 
I OUT  I O exp IN 
 IO 
4.2. Exponential function synthesizers
Exponential circuits using fourth-order approximation functions (a)
4.2. Exponential function synthesizers
Exponential circuits using fourth-order approximation functions (a)
IIN
IIN
(13/3)IO
IC1
SQ
ISQ
CM
(8/3)ISQ
IO
MULT / DIV
IOUT
(8/3)ISQ
IO
IC2
IIN
I
I OUT  I O C 1
IC2
It results:
I OUT
IC 1
 IO
IC 2
I SQ
(13/3)IO
2
I IN
 2 IO 
8 IO
2
I IN

3 IO
8
13
I O  I IN
I SQ  I IN  I O
 I IN
3
3

 IO
 I O g IVa 
2
8
13
I IN
 IO
I SQ  I IN  I O
I O  I IN 
3
3
3 IO



So, IOUT will be proportional (in a fourth-order approximation) with the exponential
function:
I 
I OUT  I O exp IN 
 IO 
4.2. Exponential function synthesizers
Exponential circuits using fourth-order approximation functions (b)
4.2. Exponential function synthesizers
Exponential circuits using fourth-order approximation functions (b)
(29/12)IIN
IO
IC1
IO
IO
(8/3)IO
MULT / DIV
IC2
IOUT’
IOUT
(5/3)IIN
(4/3)ISQ
IIN/4
IIN
SQ
ISQ
CM
IO
I
I OUT '  I O C 1
IC 2
29  I IN 
29 I IN


1

IO 
12  I O 
12  I
 IO
O
I IN
1 I 
IO 
1   IN 
4
4  IO 
I SQ
2
I IN
 2 IO 
8 IO
4.2. Exponential function synthesizers
Exponential circuits using fourth-order approximation functions (b)
It results:
4
8
5
I OUT  I OUT '  I SQ  I O  I IN
3
3
3
So:

29  I IN 
29  I IN 




1


2
12  I O  5
12  I O  5  I IN
I IN

 I IN 
 IO
 
6 IO

1  I IN  3
1  I IN  3  I O

1  
 1  4  I 
4  I O 
 O 

1
I OUT  I O
 1  I IN
  
 6  IO

2
 

 


I 
I OUT  I O g IVb  IN 
 IO 
So, IOUT will be proportional (in a fourth-order approximation) with the exponential
function:
I 
I OUT  I O exp IN 
 IO 
4. CMOS function synthesizers
4.3. Gaussian function synthesizers
4.3. Gaussian function synthesizers
Approximation of the Gaussian function using Taylor series
4.3. Gaussian function synthesizers
Approximation of the Gaussian function using Taylor series
 x2 

f  x   exp 
 2 2 


Fundamental sixth-order Taylor series approximation function:
g1  x   1 
x2

x4

x6
 f x
2
8
48
Improved sixth-order Taylor series approximation function:
2
4
6
4

  x 2 
   
 x 2  
  exp   2   
exp 
 2 2 
 2 2  

 





4
2
4
6


x
x
x

g2  x    1 


2
4
6

8
128
3072 

4.3. Gaussian function synthesizers
Block diagram of the Gaussian function circuit (I)
4.3. Gaussian function synthesizers
Block diagram of the Gaussian function circuit (I)
1:2 2
1:1:(3/32)
1:1:1
IO
IOUT2
IOUT1
2IIN 2/
B
SQ1 C
IO
IOUT2
B
IOUT1
B
A
SQ3 C
IOUT2
A
3IOUT1/32
IIN
1:
IOUT2
1:1:1
IOUT
SQ2 C
IO/8
A
IIN/
IOUT1
1:1
IOUT1
IOUT3
IOUT3
1:1
4.3. Gaussian function synthesizers
Analysis of the Gaussian function circuit (I)
4.3. Gaussian function synthesizers
Analysis of the Gaussian function circuit (I)
I OUT 1
2
I B2 1
1 I IN


16 I A1 2 2 I O
2
I OUT
I B2 2
1
1
I OUT 2 


16 I A2
2 IO
8 4
4
I IN
I O3
2
6
I B2 3
2 I OUT
1 I IN
2
I OUT 3 


16 I A3 3 I OUT 1 48 6 I O5
IOUT  IO  IOUT 1  IOUT 2  IOUT 3
It results:

1  I IN


I OUT  I O 1 
2 I
 2  O
2

1  I IN
 

4 I
8  O

4

1  I IN
 

6 I
48  O




6


2
4
6 

 x2 
x
x
x
  I O g1  x   I O f  x   I O exp 

I OUT  I O  1 


2
4
6
2


2
8
48 

 2 
4.3. Gaussian function synthesizers
Block diagram of the Gaussian function circuit (II)
4.3. Gaussian function synthesizers
Block diagram of the Gaussian function circuit (II)
1:1:1
1:1:(3/32)
2:1
IO
IOUT2
IOUT1
IIN 2/
B
SQ1 C
IO
SQ3 C
SQ2 C
IO/8
A
IOUT2
A
3IOUT1/32
IOUT1
IOUT2
IIN
1:
I
B
B
IOUT1
A
IIN/
IOUT2
IOUT1
1:1:1
1:1
1:1
IOUT
SQ5
IO/16
A
I
IOUT4
B
C
IOUT3
IOUT3
B
C
SQ4
IO/16
A
4.3. Gaussian function synthesizers
Analysis of the Gaussian function circuit (II)
4.3. Gaussian function synthesizers
Analysis of the Gaussian function circuit (II)
x
I OUT 1
x
2
2
I B2 1
1 I IN


16 I A1 8 2 I O
2
I OUT
I B2 2
1
1
I OUT 2 


16 I A2
2 IO
128 4
I B2 3
1
I OUT 3 

16 I A3 3072 6
4
I IN
I O3
6
I IN
I O5
I  IO  IOUT 1  IOUT 2  IOUT 3
4.3. Gaussian function synthesizers
Analysis of the Gaussian function circuit (II)
It results:

1  I IN


I  IO 1 
2 I
 8  O
I OUT 
2
I OUT
4
IO
2

1  I IN
 

4 I
128  O


I
1  I IN


 3  IO 1 
2 I
 8  O
IO
4
2
4

 I IN
1
 

6 I
3072  O


1  I IN
 

4 I
128  O

4



6



 I IN
1
 

6 I
3072  O

2
4
6


x
x
x


I OUT  I O 1 


2
4
6

8
128
3072 

4
 x2 

I OUT  I O g2  x   I O f  x   I O exp 
 2 2 


6 4

 
 
4.3. Gaussian function synthesizers
Squaring circuit realization
4.3. Gaussian function synthesizers
Squaring circuit realization
VDD
K
K
I-IB
IB
IA
K
K
I-IB
I
2K
IC
2K
K
4IA
4K
2VGS  I A ; K   VGS  I ;2 K   VGS  I  I B ;2 K 
2 IA 
It results:
I

2
I  IB
2
I B2
IC  2 I  I B  4 I A 
16 I A
IB
I B2
I  2I A 

2 32 I A
4. CMOS function synthesizers
4.4. Sinh (x) and tanh (x) function synthesizers
4.4. Sinh (x) and tanh (x) function synthesizers
Sinh (x) function synthesizer
4.4. Sinh (x) and tanh (x) function synthesizers
Sinh (x) function synthesizer
Fifth-order approximation of the sinh(x) function
Fifth-order approximation function:



 7x
10 5
1
1


g2  x  

x
x
3 1
 3
1


2
5
2
5


Graphical representation of
f(x) = sinh (x) and g2 (x) functions
Graphical representation of
the approximation error
4.4. Sinh (x) and tanh (x) function synthesizers
Sinh (x) function synthesizer
Block diagram of the sinh (x) function synthesizer
CM
4IO
4IO
E
SQ a
3IO/1051/2 +
+ 3IIN/100
IGa
G
IGb
G
F
I OUT
SQ b
F
IOUT
7IIN/3
I E2
IG 
16 I F
E
3IO/1051/2 - 3IIN/100


I O2
10 5 

3 
1  I IN
 1  2 5  I
 O

I O2


1  I IN
 1 

2 5  IO



  7  I IN
  3  I O
 

I
I OUT  I O g 2  IN
 IO

I
  I O sinh IN

 IO






4.4. Sinh (x) and tanh (x) function synthesizers
Sinh (x) function synthesizer
Circuit of the sinh (x) function synthesizer
VDD
2IO
IG1
IOUT
3IO/1051/2 +
+ 3IIN/100
4IO
IG2
7IIN/3
4IO
2IO
3IO/1051/2 - 3IIN/100
4.4. Sinh (x) and tanh (x) function synthesizers
Tanh (x) function synthesizer
4.4. Sinh (x) and tanh (x) function synthesizers
Tanh (x) function synthesizer
Fifth-order approximation of the tanh (x) function
Fifth-order approximation function:
5
g6  x  
6
Graphical representation of
f(x) = tanh (x) and g6(x) functions
x
x

2
6
2x
1
5
Graphical representation of
the approximation error
4.4. Sinh (x) and tanh (x) function synthesizers
Tanh (x) function synthesizer
Block diagram of the tanh (x) function synthesizer
CM
5IIN/6
4IIN
IO
E
SQ
G
IG
A
ID
IOUT
B MULT DIV D
C
I
IIN/6
IO
F
5IO/2
I OUT

 I IN 



5
 IO 
 IO 
6
 1  2  I IN

5  I O
I
I OUT  I O g6  IN
 IO
1  I IN


2 6 I
 O




I
  I O tanh IN

 IO



 





I E2
IG 
16 I F
IB
ID  IA
IC
5. Conclusions
5. Conclusions
Advantages of analog computation:
- Low-power operation
- Real-time operation
- Increased accuracy
- Reduced complexity
Optimized computational structures:
- Fundamental CMOS computational structures
- Multifunctional structures
- CMOS function synthesizers
Thank you!