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555 Timer ©Paul Godin Updated February 2008 Oscillators ◊ We have looked at simple oscillator designs using an inverter, and had a brief look at crystal oscillators. ◊ In this presentation, we introduce the 555 timer; a versatile device that is easier to calculate, design and configure in a variety of ways. 555.2 A Versatile Device ◊ The 555 Timer is one of the best known IC’s. ◊ The 555 is part of every experimenter's tool kit ◊ Capable of creating a wide variety of circuits, including: ◊ Oscillators with adjustable frequency and Duty Cycle ◊ Monostable Multivibrators ◊ Analog to digital Converters ◊ Frequency Meters ◊ Many other applications…. ◊ The clock on the Vulcan Board is generated by a 555 timer. 555.3 555 Timer Configurations ◊ We will look at the 555 timer in 2 modes: ◊ Astable ◊ With some calculations, we can determine the values of the capacitor and the 2 resistors (Ra and Rb) for astable operations. ◊ Monostable ◊ We can determine the value of the resistor and the capacitor with a simple formula for one-shot operations. ◊ There are many other configurations and applications for this device. 555.4 555 Layout Ground Trigger Output Reset Vcc 8 7 6 5 1 2 3 4 Discharge Threshold Control Also available: •556 (two-555’s in one DIP package) •555 in a “metal can” configuration Vcc Ground 1 8 Trigger 2 Output 3 7 Discharge 6 Threshold 4 5 Control Reset 555.5 555.6 Astable Multivibrator Oscillator Configuration ◊ Externally, the 555 requires an RC circuit to create the time delays required for the time high and the time low. ◊ Standard configuration requires ◊ common capacitor ◊ a resistor for the charge cycle ◊ a resistor for the discharge cycle 555.7 General Configuration ◊ Basic connections: ◊ Ground ◊ Vcc ◊ Note: some 555 timers may function at voltages other than 5 volts. ◊ Reset (active low) ◊ Output Ground Trigger Output Reset 1 2 3 4 8 7 6 5 Vcc Discharge Threshold Control 555.8 General Configuration ◊ Specialized connections: ◊ Trigger ◊ monitors low voltage ◊ Threshold ◊ monitors high voltage ◊ Discharge ◊ path to ground, to discharge the capacitor ◊ Control ◊ specialized input ◊ filtering ◊ special applications Ground Trigger Output Reset 1 2 3 4 8 7 6 5 Vcc Discharge Threshold Control 555.9 Astable Configuration #1 (“Standard” Configuration) Vcc Vcc Vcc Ground Output Reset Ra 1 2 3 4 8 7 6 5 Control Discharge Rb Threshold Trigger C 555.10 Astable Calculated Values Note: Duty Cycle must be > 50% Filter Cap 0.01μF 555.11 Astable Configuration #1 (“Standard” Configuration) t1 .693(Ra Rb )C t 2 .693 Rb C f 1 1 t1 t 2 .693(Ra 2Rb )C t1 Ra Rb DC t1 t 2 Ra 2Rb Minimum duty cycle > 50% 555.12 Calculations: Astable Time High, Time Low Set TL 0.693 R B C TH 0.693(R A R B )C TH TL Notes: •The value 0.693 is a factor associated with the charge/discharge cycle of the 555 timer. •Duty Cycle must be > 50% 555.13 Sample Calculation Time High, Time Low Set ◊ Design an oscillator with a frequency of 200Hz with a duty cycle of 78%. 1. Determine Period (T): 1 1 T 0.005s F 200Hz 2. Determine TH and TL: TH 78 % 0.005 s 0.0039 s 3.9ms TL 22 % 0.005 s 0.0011 s 1.1ms 555.14 Sample Calculation Time High, Time Low Set 3. Since there are 2 variables in the TL equation, select C: C=10μF 4. Determine RB by using the TL equation: TL 0.693R BC 1.1ms 0.693 R B 10F R B 158 .7 555.15 Sample Calculation Time High, Time Low Set 5. Determine the value for RA: TH 0.693(R A R B )C 3.9ms 0.693(R A 158 .7)10F 562 .8 R A 158 .7 R A 404 .1 555.16 Calculations: Astable Frequency, Duty Cycle Set (R A R B ) DC (R A 2R B ) F 1 0.693 (R A 2R B ) C Notes: •The value 0.693 is a factor associated with the charge/discharge cycle of the 555 timer. •Duty Cycle must be > 50% 555.17 Sample Design Frequency, Duty Cycle Set ◊ Build an oscillator using a 555 timer with a frequency of 72kHz at 75% D.C. Use a 100F capacitor. 555.18 Design Solution Frequency, Duty Cycle Set 1- Determine the ratio of the resistors Ra and Rb: Ra Rb 0.75 Ra 2Rb Ra Rb 0.75(Ra 2Rb ) 0.75Ra 1.5Rb Ra 0.75Ra 1.5Rb Rb DC Ra 2Rb 2- Use the ratio in the frequency equation (substitution): f 1.44 1.44 1.44 (Ra 2Rb )C (2Rb 2Rb )C 4RbC 555.19 Design Solution Frequency, Duty Cycle Set 3- Solve for Rb: 72kHz 1.44 1.44 50k 4RbC 4 72k 100 4-Solve for Ra: Ra 2Rb 100k 5-Use standard values (optional step): Ra=100k Rb=47k 555.20 Design Solution Frequency, Duty Cycle Set 6- Calculate actual frequency and DC: f 1.44 74 .2kHz (100k (2 47k)) 100 F Error 3.1% DC (100k 47k) 0.757 (100k (2 47k)) Error 1% 555.21 Design Solution Frequency, Duty Cycle Set 7- Create the circuit diagram using EWB: 555 Timer, 74.2kHz @ 75.7% D.C. 555.22 Minimum Value for Ra ◊ The discharge transistor causes the capacitor to discharge to ground. ◊ Ra must have a minimum value of 25 to prevent a short circuit of the power supply through the discharge transistor. Minimum Value 555.23 OTHER ASTABLE CONFIGURATIONS 555.24 Astable Configuration#2 Rb must be < .5 Ra 555.25 Astable Configuration #3 555.26 Specification sheet ◊ From the specification sheet for the LM555, discuss the following: ◊ Operational voltage range ◊ Maximum current output for each state ◊ Frequency Range ◊ Output rise and fall time What is a disadvantage of the 555 as a timing device? 555.27 555 as a Monostable ◊ The 555 timer can also be configured as a monostable. ◊ The 555 Monostable has interesting characteristics that may be used in specific applications. 555mono.28 Timing Diagram The Trigger is active low, not edge triggered. Input trigger Output pulse Tw Output pulse created when input trigger voltage is less than 1/3 Vcc Tw If the trigger is held low beyond calculated pulse width, the output pulse follows the input trigger 555mono.29 Monostable Calculated Values Filter Cap 0.01μF 555mono.30 Calculations: Monostable TW 1.1 R C Tw Notes: •The value 1.1 is a k-factor associated with the 555 timer. •The trigger is active-low (not edge-triggered), and must be brought high before the end of the pulse width. 555mono.31 Sample Monostable Calculation ◊ Design a Monostable that produces a 5S pulse. Use a 100F capacitor. TW 1.1 R C 5s 1.1 R 100 F R 45.45k 555mono.32 Animated Slide The following slides contain animations to demonstrate the operations of: 555 as a monostable 555mono.33 Monostable ++> <- 01 Vc 01 101 010 ++<>-- 0 Animated The transistor AWait-state. low is applied to the trigger The comparator provides a logic Q’ goes low; Q high. The Capacitor voltage > 2/3 Vcc. High Latch reset. Q’ logic high. discharges the Capacitor input. high; the latch is set. transistor is “off”. Cap charges. comparator output high. Capacitor discharges, waits. 555mono.34 Animated Slides The following slides contain animations to demonstrate the operations of: 555 as an astable: charge cycle 555 as an astable: discharge cycle 555.35 555.36 + <> 01 10 01 - <> + 10 Vc Capacitor Charges viastate Ra and Rb Latch inQ aoutput set Q’ is low; is high Capacitor continues to charge Lower comparator provides logic Upper comparator + input is Latch receives a reset state Q’ is high; Q output is low Transistor is “on” and a connection Capacitor to state. discharge low. Latch in hold greater thanbegins 2/3 Vcc reference to ground is made. Animated charge cycle 555.37 - >< + 01 01 10 + <> - 10 Vc Capacitor is discharging. Q output Upper comparator + voltage less Latch in a hold state. Lower comparator + voltage is Latch is set. Q’ is low. is low. Q output is high. than reference Transistor is “off”. Capacitor greater than – voltage. voltage. begins to charge. Animated discharge cycle 555.38 END ©Paul R. Godin prgodin°@ gmail.com 555.39