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Chapter 8
Operating System Support
•
Focus on Architecture
Functions of Operating System
• Managing Resources
Access to System Utilities
Access to files
Access to I/O devices
Managing Interrupts & Bus Control
Error detection and response
Accounting
• Scheduling Processes (or tasks)
Program creation
Program execution
I/O Processing
• Managing Memory Utilization
Partitioning,
Paging,
Virtual memory,
Segmentation
Types of Operating Systems
• Interactive
• Batch
• Uni-tasking
• Multi-tasking
• Real-Time
Batch Operating System Model
• Jobs are batched in queue
• Monitor handles scheduling
• Monitor controls sequence of
events to process batch
•When one job is finished,
control returns to Monitor
which loads next job
Desirable Hardware Support for OS
• Memory protection
— To protect the Monitor & Utilities
• Timer
— To prevent a job monopolizing the system
• Privileged instructions
— Only executed by Monitor
— e.g. I/O, files
• Interrupts
— Allows for relinquishing and regaining control
• DMA
— Allows for optimizing bus usage
The Case for Multi-programmed Batch Systems
• I/O devices are very slow
 Waiting is inefficient use of computer
• When one program is waiting for I/O,
another can use the CPU
Multi-Programming with Three Programs
Utilization:
Uni-programmed vs Multi-programmed
Multiprogramming Resource Utilization
Types of Scheduling
A Five State
Process
Model
Process Control Block Layout
Scheduling Time Sequence Example:
Key Elements of O/S
Process Scheduling:
Memory Management
• Uni-programming
—Memory split into two
—One for Operating System (monitor)
—One for currently executing program
• Multi-programming
—“User” part is sub-divided and shared among
active processes
• Note: Memory size implications
- 16 bits  64K memory addresses
- 24 bits  16M memory addresses
- 32 bits  4G memory addresses
Swapping
• Problem: I/O is so slow compared with
CPU that even in multi-programming
system, CPU can be idle most of the time
• Solutions:
— Increase amount of main memory
– Expensive
— Swapping
What is Swapping?
• Long term queue of processes stored on disk
• Processes “swapped” in as space becomes
available
• As a process completes it is moved out of main
memory
• If none of the processes in memory are ready
(i.e. all I/O blocked)
— Swap out a blocked process to intermediate queue
— Swap in a ready process or a new process
But swapping is an I/O process…
Isn’t I/O slow?
So why does swapping make sense ?
Implementation
of Swapping
Partitioning
• Partitioning:
May not be equal size:
Splitting memory into sections to allocate to processes
(including Operating System!)
• Fixed-sized partitions
—Potentially a lot of wasted memory
• Variable-sized partitions
—Process is stored into smallest reasonable “hole”
• Dynamic partitions
— no room for additional memory allocation
— memory leak – need periodic coalescing, or
– need periodic compaction
Fixed Partitioning
Effect of Dynamic Partitioning –
leaks
memory
Relocation Challenges
• Can’t expect that process will load into the
same place in memory as last time
• Instructions contain addresses
—Locations of data
—Addresses for instructions (branching)
– Logical address - relative to beginning of program
– Physical address - actual location in memory
(this time)
A Solution:
• Use Base Address
• Automatic (hardware) Conversion
Paging
• Split memory into equal sized, small chunks
- page frames
• Operating System maintains list of free frames
Then:
• Split programs (processes) into equal sized small chunks
– pages
• Allocate the required number page frames to a process
- A process does not require contiguous page frames
- Each process has its own page table
Allocation of Free Frames
Paging - Logical and Physical Addresses
Paging Implementations
• Demand paging
—Do not require all pages of a process in
memory
—Bring in pages as required
• Page fault
—Required page is not in memory
—Operating System must swap in required page
—May need to swap out a page to make space
—Perhaps select page to throw out based on
recent history
Thrashing
• Too many processes in too little memory
• Operating System spends all its time
swapping
• Little or no real work is done
• Solutions
—Good page replacement algorithms
—Reduce number of processes running
—Add more memory
Virtual Memory
• We do not need all of a process in memory for it
to run - We can swap in pages as required
• So - we can now run processes that are bigger
than total memory available!
Differentialtions:
• Main memory is called real memory
• User/programmer can see much bigger memory
space - virtual memory
Implications:
• Tables can become huge that can’t fit into
memory – need multiple level tables – yech!
Alternate Inverted Page Table Structure
Translation Lookaside Buffer
• Every virtual memory reference causes
two physical memory access
—Fetch page table entry
—Fetch data
• Use special cache for page table(s)
TLB and Cache Operation
(special Cache for tables)
Segmentation
What is it?
• Segmentation is visible to the
programmer
- Paging is not (usually) visible to the
programmer
• Usually different segments allocated to
program and data
• May be a number of program and data
segments, e.g. to support protection
levels, priority levels, organization,
flexibility, etc.
Advantages of Segmentation
• Simplifies handling of growing data
structures
• Allows programs to be altered and
recompiled independently, without relinking and re-loading
• Lends itself to sharing among processes
• Lends itself to protection
Some systems combine segmentation with
paging
OS Review
Scheduling:
uni-programming
multi-programming
time-sharing
long-term scheduler (queue of all jobs potentially schedulable)
short-term scheduler (queue of processes that are ready to execute)
medium-term scheduling (queue of jobs that can reside in memory)
blocked monitoring (queue of processes blocked for resources)
new – ready – running – blocked – exit
state machine
Memory management:
partitioning
paging – frames, pages, page fault, page table, logical/physical addr
virtual memory – inverted page table, Translation Lookaside Buffer
segmentation
Pentium and Power PC
• Pentium – Intel
• Power PC – Motorola & IBM
A 32 bit memory address space is 4 G Bytes
A 46 bit memory address space is 64 T Bytes
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1.25 terabytes has been claimed as the capacity of a human being's functional
memory (according to Raymond Kurzweil).
A Holographic Versatile Disc (HVD) can hold up to 3.9 terabytes.
One hour of uncompressed Ultra High Definition Video (UHDV) consumes
approximately 11.5 terabytes of data.
The U.S. Library of Congress has claimed that "as of December 31, 2005, the Library
has collected more than 40 terabytes of data."
A Protein-coated disc (PCD) can hold 50 terabytes of data.
A 64 bit memory address space is ? (Who cares!)
The point is that it is not clear to me why we care for some at least some
years to come.
Pentium II
(Uses hardware for segmentation & paging)
• Unsegmented, unpaged
— virtual address = physical address
— Used in Low complexity, High performance systems
• Unsegmented, paged
— Memory viewed as paged linear address space
— Protection and management via paging (Ex: Berkeley UNIX)
• Segmented, unpaged
— Collection of local address spaces
— Protection to single byte level, Translation table needed is on chip
when segment is in memory, provide predictable access times
• Segmented, paged
— Segmentation used to define logical memory partitions subject to
access control
— Paging manages allocation of memory within partitions (Ex: Unix
System V)
Pentium II Address Translation
Mechanism
“Segment” uses 2 bits to provide 4 levels of protection, typically:
• 0: OS kernel, 1: OS, 2: apps needing special security, 3: general apps
Pentium II Paging
• Segmentation may be disabled
—In which case linear address space is used
• Two level page table lookup
—First, page directory
– 1024 entries max
– Splits 4G linear memory into 1024 page groups of 4Mbyte
– Each page table has 1024 entries corresponding to 4Kbyte
pages
– Can use one page directory for all processes, one per
process or mixture
– Page directory for current process always in memory
—Use TLB holding 32 page table entries
—Two page sizes available 4k or 4M
PowerPC 32-bit Address Translation
PowerPC Memory Management
Hardware
• 32 bit – paging with simple segmentation
— or 64 bit paging with more powerful
segmentation
• Or, both do block address translation
—Map 4 large blocks of instructions & 4 of
memory to bypass paging
—e.g. OS tables or graphics frame buffers
• 32 bit effective address
—12 bit byte selector
– =4kbyte pages
—16 bit page id
– 64k pages per segment
—4 bits indicate one of 16 segment registers
– Segment registers under OS control
PowerPC 32-bit Memory Management
Formats