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SEQUEL: A Solver for circuit EQuations with User-defined ELements Prof. Mahesh B. Patil www.ee.ittb.ac.in/faculty/mbp/sequel1.html Indian Institute of Technology Bombay 1 Academia Industry Meet 2002, Electrical Engineering Department Features • Allows user-defined elements • Based on the Sparse Tableau Approach: no need for “through” and “across” variables • DC, transient, small-signal, noise • Mixed-signal simulation • Electrothermal simulation • Sensitivity analysis (exact) Continued Indian Institute of Technology Bombay 2 Academia Industry Meet 2002, Electrical Engineering Department Features • Switched capacitor circuits • Efficient “steady-state waveform” computation • Perfectly “general” elements are possible (mechanical, thermal etc) • Runs on GNU/Linux and Solaris • Free!! Indian Institute of Technology Bombay 3 Academia Industry Meet 2002, Electrical Engineering Department Block Diagram of SEQUEL Indian Institute of Technology Bombay 4 Academia Industry Meet 2002, Electrical Engineering Department Mixed-signal simulation • All elements are divided into (a) purely electrical, (b) pure digital, (c) DAC type, (d) ADC type. • After every analog time point, process the ADC type elements. • After every digital time point, solve the analog equations if there are DAC type elements. • Use the event-driven strategy for digital elements. Indian Institute of Technology Bombay 5 Academia Industry Meet 2002, Electrical Engineering Department Mixed-signal example: Indian Institute of Technology Bombay 6 Academia Industry Meet 2002, Electrical Engineering Department Look-up table approach for MOS circuit simulation • Modern MOS transistors are very difficult to model analytically (small gate lengths, complex doping profiles etc.) • Model development (if at all possible) is a long and tedious process: it could take a year! • The LUT approach provides a quick way to estimate circuit performance without model development. Indian Institute of Technology Bombay 7 Academia Industry Meet 2002, Electrical Engineering Department Power electronics examples • Very easy to incorporate new elements • SEQUEL is already being used at IIT Bombay for R and D, and course work. • SEQUEL allows efficient “steady-state waveform” computation, which is not offered by any other general-purpose simulator. Indian Institute of Technology Bombay 8 Academia Industry Meet 2002, Electrical Engineering Department Power electronics examples Indian Institute of Technology Bombay 9 Academia Industry Meet 2002, Electrical Engineering Department Power electronics examples Indian Institute of Technology Bombay 10 Academia Industry Meet 2002, Electrical Engineering Department Steady-state waveform computation in Power Electronics • Very often, one is interested only in the steadystate solution and not how it was attained. • This problem can be converted into a much smaller problem with the state variables as the only unknowns. The Newton-Raphson method can be used to solve the new problem. Indian Institute of Technology Bombay 11 Academia Industry Meet 2002, Electrical Engineering Department Example N1 N2 Buck Converter 740 4 Boost Converter 625 3 Cuk Converter 1250 3 1-phase half wave rectifier 150 3 1-phase half-controlled bridge converter 110 4 3-phase diode bridge rectifier 200 4 Induction motor problem 125 17 Indian Institute of Technology Bombay 12 Academia Industry Meet 2002, Electrical Engineering Department Acknowledgements • • • • • • Prof. Prof. Prof. Prof. Prof. Prof. M.C.Chandorkar, B.G.Fernandes, V.Agarwal, K.Chatterjee, A.M.Kulkarni, S.V.Kulkarni from the PEPS group Indian Institute of Technology Bombay 13 Academia Industry Meet 2002, Electrical Engineering Department Future Plans • Parallel implementation • Simulation of “regular” circuits (e.g., displays) in collaboration with IITK • GUI • Commercial package? Indian Institute of Technology Bombay 14 Fast Circuit Simulators at IIT Bombay Prof. H.Narayanan [email protected] Indian Institute of Technology Bombay 15 Academia Industry Meet 2002, Electrical Engineering Department BREMICS (1986, 87, 90) for analog simulation of networks arising out of digital circuits (MOS transistors, resistors, capacitors) • could handle 1000 nodes, 2000 edges. For the restricted class much faster (5 to 10 times) than SPICE on PCs. • BITSIM (1991-92) general purpose (SPICE like) simulator based on conjugate gradient method for solution of linear equations and the hybrid analysis for writing equations. Could handle 3000-4000 nodes, 8000 edges originally on SUN, now on Pentiums. Work done through several B.Tech and M.Tech. projects and through a research engineer (Dr. Subir Roy) Indian Institute of Technology Bombay 16 Academia Industry Meet 2002, Electrical Engineering Department Currently “Large Circuit Simulations” by Parallelization is actively pursued The innermost subroutine of a general purpose simulator is a DC circuit analyzer (voltage sources, current sources, resistors, controlled sources) We parallelize this by the “Multiport Decomposition Method” Our simulator can currently solve 700,000 nodes, 1.4 million edges dc circuit in about 10 minutes using 8 processors (Pentium IV ‘s) connected through a 100 MBPS link Indian Institute of Technology Bombay 17 Academia Industry Meet 2002, Electrical Engineering Department Application of large dc circuit analyzer 1) The Multi port Reduction Problem 100,000 RC Elements Few terminals Same terminal behaviour Same terminal behaviour 1000 RC Elements arises while modelling “short circuits” in chips at high frequency Indian Institute of Technology Bombay Continued 18 Academia Industry Meet 2002, Electrical Engineering Department we have constructed a few such reduction algorithms and implemented them. e.g. SARN reduces RC circuit with 100,000 nodes 200,000 edges 50 terminals in ½ hour to 1000 node circuit with 50 terminals. 2) Solving a large Combinational optimization problems a) Network flow problems b) Minimum cost flow problems Both of these can be posed as nonlinear static circuit analysis problems Innermost subroutine is a DC analyzer. Continued Indian Institute of Technology Bombay 19 Academia Industry Meet 2002, Electrical Engineering Department 3) Parallelizing large Sparse linear equations The equation are made to appear like those of a dc circuit and then given to the dc analyzer to solve by “Multi port Decomposition”. Indian Institute of Technology Bombay 20