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Status of DEPFET pixel detectors for ILC
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
H.-G. Moser on behalf of the DEPFET collaboration
PRC Review
May 10, 2007
DESY, Hamburg
RWTH Aachen,
University Bonn
University Karlsruhe
University Mannheim
MPI Munich, HLL
Charles University Prague
IFIC Valencia
Outline
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
PRC Review
May 10, 2007
DESY, Hamburg

ILC requirements

DEPFET Principle

DEPFET Matrix Operation

DEPFET System: Readout and Control ASIC

ILC Layout, Power and Material

Thinning Technology

Laboratory Tests

Irradiation Tests

Beam Tests

Software and Simulations

New Developments: PXD5 Matrices, Switcher III, DCD1

Summary and Conclusions
ILC Requirements
Impact parameter resolution:
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
s(IP)r-f = 5 mm
-> spatial resolution < 4 mm
10 mm
p(GeV/c) sin3/2q
-> pixel size 25 x 25 mm2
-> ~ 0.1% X0 radiation length per layer
Operation at high background rates: 0.04 hits/mm2/BX in the inner layer (1.5 cm)
Occupancy of ~10% per bunchtrain
20 frames per train (1 ms)
40 MHz line rate => ½% Occup.
(4096 lines along a 10cm module)
Radiation Hard up to 360 kRad
and 1012 n/cm2 (10 years)
PRC Review
May 10, 2007
DESY, Hamburg
DEPFET Principle
Each pixel is a p-FET on a completely
depleted bulk
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
A deep n-implant creates a potential
minimum for electrons under the gate
(“internal gate”)
Signal electrons accumulate in the
internal gate and modulate the transistor
current (gq ~ 400 pA/e-)
Accumulated charge can be removed by
a clear contact (“reset”)
Fully depleted:
large signal, fast signal collection
Low capacitance, internal amplification:
=> low noise
Transistor on only during readout:
=> low power
PRC Review
May 10, 2007
DESY, Hamburg
Complete clear:
=> no reset noise
Compact layout:
Two pixel share
common source
and clear
(“double pixel”)
DEPFET Matrix Operation
Gates connected in rows
(switch transistor on/off)
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
DEPFET- matrix
reset
off
off
on
reset
Drain connected in columns
(to current amplifier)
off
off
Readout Cycle:
off
Clear connected in rows
Switch transistor on
Measure I1 = Isig + Iped
Apply fast clear
Measure I2 = Iped
Switch transistor off
PRC Review
May 10, 2007
DESY, Hamburg
gate
nxm
pixel
VGATE, ON
VGATE, OFF
off
IDRAIN
drain
VCLEAR, ON
VCLEAR, OFF
VCLEAR-Control
0 suppression
output
In the readout chip: subtract I1 – I2 = Isig (correlated sampling, suppress 1/f
noise)
Complete sample – clear sample cycle takes 50 ns
Only one row active at a time
Double rows: two rows read in parallel
only 20 MHz line rate needed; double number of columns
DEPFET System
gate
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Clear switcher (64 channels)
Gate switcher (64 channels)
DEPFET matrix (64x128)
Readout chip (128 channels)
DEPFET- matrix
reset
off
off
on
reset
off
off
nxm
pixel
off
off
VGATE, ON
VGATE, OFF
IDRAIN
drain
VCLEAR, ON
VCLEAR, OFF
VCLEAR-Control
0 suppression
output
CURO readout chip (Uni Bonn)
Switcher II chip (Uni Mannheim)
 On-chip pedestal subtraction (correlated

64 channels with 2 analog MUX outputs (‘A’ and ‘B’)

Can switch up to 25 V
 Real time hit finding and zero suppression

digital control ground + supply floating
 Hit addresses store in on-chip RAM

fast internal sequencer for programmable pattern
double sampling)
(operates up to 80MHz)
 0.25µm CMOS technology
PRC Review
May 10, 2007
DESY, Hamburg
 128 channels

Present dissipation: 1mW/channel @ 30MHz

0.8µm AMS HV technology (not rad hard <30kRad)
Detector Layout for ILC
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
5 layer detector
PRC Review
May 10, 2007
DESY, Hamburg
1
2
3
4
5
8 faces
8 faces
12 faces
16 faces
20 faces
1.3 x 10 cm2
2x(2.0 x 12.5) cm2
2x(2.0 x 12.5) cm2
2x(2.0 x 12.5) cm2
2x(2.0 x 12.5) cm2
Power Consumption & Material
Inner layer module:
Matrix:
H.-G. Moser
Max-Planck-Institut Switcher III*
for Physics,
Munich
DCD1 (readout)*
active pixel: 500 mW
active row: 225 mW
active chip: 50 mW
idle chips: 10 mW
per channel: 5 mW
x 2048
x2
x2
x 30
x 2048
(* New ASIC versions)
1.0 W
0.45 W
0.1 W
0.3 W
10.2 W
12
W per module
8 modules in inner layer, 56 outer layer modules a 21W: 1272 W
Assuming that the 1/200 duty cycle can be used:
950 µs
6.4 W average for the full 5 layer detector
2820 bunches
Material budget (within acceptance)
PRC Review
May 10, 2007
DESY, Hamburg
Sensor: 50 mm Si:
Frame:450 mm Si
Switcher: 50 mm Si
Gold bumps:
0.05% X0
0.05 % X0
0.01 % X0
0.03 % X0
Total:
0.12 % X0
199 ms
950 µs
Thinning Technology
sensor wafer
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
handle wafer
1. implant backside
on sensor wafer
HLL
2. bond sensor wafer
to handle wafer
3. thin sensor side
to desired thickness
Industry: TraciT, Grenoble
4. process DEPFETs
on top side
5. structure resist,
etch backside up
to oxide/implant
HLL main lab
HLL special lab
Sensor wafer: high resistivity d=150mm FZ wafer.
Bonded on low resistivity “handle” wafer”.
Rigid frame for handling and mechanical stiffness
50 mm thickness produced
Samples of 10x1.3 cm2 & frame of 1 & 3 mm width
PRC Review
May 10, 2007
DESY, Hamburg
Thinning Technology
Thinned diodes: depletion at 50V
Thinned diodes: Ileak ~ 100 pA/cm2
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Thinned diodes: no deterioration of electrical properties
Mechanical properties:
10 cm x 1.3 cm sensor area
(50 mm thick)
PRC Review
May 10, 2007
DESY, Hamburg
Support frame:
1 mm x 400 mm
3 mm x 400 mm
W. Cooper, Fermilab
20 mm deflection under gravity
Lab Tests: Speed
High speed readout => high bandwidth => short shaping times
Thermal noise of the DEPFET transistor depends on 1/SQRT(t)
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
1.6 e ENC at t=10 ms
40 e ENC at t=20ns (50MHz)
Measurements of a single pixel with an external high bandwidth amplifier.
PRC Review
May 10, 2007
DESY, Hamburg
Intrinsic DEPFET noise sufficiently low for high speed operation at ILC
Lab Tests: Noise
However system noise with
CURO not satisfactory:
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
~ 250-300 e- (lab; beam test)
~100 nA with 0 load capacitance
=> ~250 e- @ gq = 400pA/e
CURO was designed for small
test matrices.
Full size ILC matrices will have a
large drain capacitance
(5cm length -> 40 pF)
New design of current readout chip needed (-> DCD1):
PRC Review
May 10, 2007
DESY, Hamburg
-Improved noise performance
-Optimization for large drain capacitances
Radiation Hardness
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Expected (10 years):
360 kRad (ionising)
8.5x1011 n/cm2 (NIEL)
(LDC DOD)
Threshold voltage shift
Change of gm, gq
Traps: 1/f noise increase
Larger leakage currents
gamma,
proton*,
neutron*
irradiations
* @ Berkely
PRC Review
May 10, 2007
DESY, Hamburg
Type
Gamma
Neutron
Protons
fluence
913 kRad
2.4x1011 n/cm2
3x1012 n/cm2
& 280 kRad
ILC years DIthresh
~30 ~4V
2
0V
35 ~5V
gm
=
~
-15%
Ileak (pixel)
~100fA
1.4 pA
25.9 pA
Radiation Hardness
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Cl
PRC Review
May 10, 2007
DESY, Hamburg
non-irradiated
Vthresh≈-0.2V, Vgate=-2V
time cont. shaping t=10 μs
912 krad 60Co
Vthresh≈-4.0V
time cont. shaping t=10 μs
Noise ENC=1.6 e- (rms)
Noise ENC=3.5 e- (rms)
at T>23 degC
D1
G1
Threshold
S
Cl voltage
G2
at T>23 degC
shift: can be compensated (~4V)
D2
NIEL:
increase of leakage current => shot noise
12
3x10 n/cm2 (35 ILC years):
95e- ENC @ 200C
(tframe= 50 ms)
22e- ENC @ 00C
Beam Tests
5 Test beam periods:
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
3 x @ DESY: 6 GeV/c;
Si-strip telescope; resolution limited by multiple scattering
2 x @ CERN: 120 GeV/c;
DEPFET telescope; August & October 06, Analysis ongoing
Sensors:
-450 mm thick
-128 x 64 pixel a 36 x 22 mm2
+ variations
Speed:
-Clear: 20ns
-Line readout: 240ns
-Corresponds to 4MHz
PRC Review
May 10, 2007
DESY, Hamburg
However, actual rate lower
because of full frame
readout
34
2
1
5
Beam Tests
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Cluster finding:
-Seed > 5s
-Neighbours: > 2s in N x N
Signal contained in 3x3 cluster
(~5 pixels)
S/N = 110 (for 450 mm thick sensors)
Noise ~ 300 e
- pickup of analogue output
- problems of internal timing
- front end noise…
Good efficiency and purity
~ 100 % for 5 – 7 s seed cut
PRC Review
May 10, 2007
DESY, Hamburg
Beam Test: Resolution
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
DEPFET Telescope
@ CERN 120 GeV/c beam
4 planes to determine track
5th plane in the middle as DUT
Submicron extrapolation
accuracy!
Resolution (h algorithm)
x (36 mm pitch): 3.8 mm
y (22 mm pitch): 1.7 mm
PRC Review
May 10, 2007
DESY, Hamburg
Software Development
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
DEPFET implemented in ILC/LDC
Software framework (Mokka)
-Local Landau fluctuations
-Geometry (5 layer as proposed)
-Active and passive material
Digitization in Marlin:
-Drift and diffusion
-Lorentz angle
-Noise (100 e- ILC, 300 beam test)
Simulation tuned using beam test
data
Possibility to include beam related
background
PRC Review
May 10, 2007
DESY, Hamburg
Comparison Data - MC
Comparison MC and beam test
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
-Cluster size as function of
incident angle
-Signal distribution for various
incident angles
-Excellent agreement -> reliable
extrapolation to ILC conditions
Data
PRC Review
May 10, 2007
DESY, Hamburg
MC
MC Studies
Spatial resolution for 50 mm thick 25 x 25 mm2 pixels:
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Impact parameter resolution
(5 layers, frames, 500 mm Be beam pipe)
s(IP)r-f = 4.5 mm
PRC Review
May 10, 2007
DESY, Hamburg
8.7 mm
p(GeV/c) sin3/2q
ILC requirements fulfilled
<3.5 mm (r-f)
<4.0 mm (z)
MC Studies
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Efficiency and fakes with beam
related background
tt -> 6 jets
400 background hits/BX (inner layer)
Accumulated 150 BX (inner layers)
300 BX (outer layers)
Stand alone pattern recognition and
tracking
-Generally ok, but problems at low pt
(and large cosq)
-Higher readout speed helps
-Overall tracking? (helps at large pt)
-General ILC problem (not DEPFET
specific)
PRC Review
May 10, 2007
DESY, Hamburg
New Pixel Production
New Pixel Production: PXD5
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
standard arrays
compatible to
existing hybrids
wide arrays
(512 x 512, full ILC)
-Larger matrices: 512 x 512
128 x 2048
-optimization clear  gain
-variants:
small pixels (20x20 mm2)
shorter gate -> higher gq
-Test structures for bump bonding
-Ready in June 2007
long arrays
(256 x 1024, ½ ILC)
various new
standard arrays
(64 x 256 pixels,
down to 20x20µm2)
Rainer Richter, MPI HLL
512 x 512 pixels
16.4 x 12.3 mm2 area
PRC Review
May 10, 2007
DESY, Hamburg
gq (pA/e-)
simulation at ID=50 µA
effective gate length
Leff (µm)
Leff = L - 2 x under etching of 1.2µm
Switcher III
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
-Radiation hard (AMS 0.35 mm, layout)
-10V swing (-> stacked transistors)
-Low power (“0” standby current)
-Fast settling (<4ns at 10 pF)
-Compact layout (1.24 x 5.8 mm2)
-Test chip produced
rad hardness tested > 600kRad!
-128 channels
- Full chip produced and tested
9V distributed over 3 transistors
with 3V -> rad hard. technology
possible
PRC Review
May 10, 2007
DESY, Hamburg
Chip prepared for bump
bonding
DCD1 Current Readout Chip
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Improved noise performance of regulated cascode especially at large
load capacitances
expect 40-50 pF for 5cm long matrices
simulation: 34 nA @ 40 pF
-Fully differential analog processing
-Fast 8 bit ADC (12.5MHz) for each channel
-5mW per channel
-No hit processing (eventually done in a FPGA)
-Bump bond geometry
-Rad hard layout (analogue part), UMC018 process
-Test chip submitted
Test chip: 72 channels
Finale chip:
144 channels on
PRC Review
May 10, 2007
DESY, Hamburg
Summary and Conclusions
Achievements since last PRC (2005)
-
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Thinning Technology established
Low intrinsic noise at ILC bandwidth
Radiation hardness demonstrated (Gamma, Proton & Neutron irradiations)
-
New Switcher III chip operational (rad. hard)
-
Test beam measurements with DEPFET based telescope
(<1 mm extrapolation accuracy, 1.74 mm resolution)
-
Software and simulation: reproduce beam test data,
MC of ILC vertex detector -> ILC specifications fulfilled
Next Steps:
-
New matrix production (large, ILC scale matrices, various improvements)
-
Test new readout & control ASIC (speed, noise, radiation hardness)
-
Operate system at ILC speed
-
Bump bonding studies
Future Steps
PRC Review
May 10, 2007
DESY, Hamburg
-
Produce thinned matrices (2008/2009)
Alternative layout for high frame rates
H.-G. Moser
Max-Planck-Institut
for Physics,
Munich
Increase frame rate by finer segmentation of module:
-1.25 cm column length instead of 5 cm
-4 x frame rate at same basic readout speed
-Lower capacitance (better S/N)
Disadvantages:
-Material
-Power
-Complex Routing
Interconnection can be done using a 3D integration
technique (SLID/IVD by IZM Fraunhofer)
PRC Review
May 10, 2007
DESY, Hamburg