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Combinational
Logic Circuits
Chapter 2
Mano and Kime
Combinational
Logic Circuits
•
•
•
•
•
•
•
Binary Logic and Gates
Boolean Algebra
Standard Forms
Map Simplification
NAND and NOR Gates
Exclusive-OR Gates
Integrated Circuits
Digital Logic Gates
*
Gates with More than Two Inputs
Combinational
Logic Circuits
•
•
•
•
•
•
•
Binary Logic and Gates
Boolean Algebra
Standard Forms
Map Simplification
NAND and NOR Gates
Exclusive-OR Gates
Integrated Circuits
Basic Identities of Boolean Algebra
Implementation of Boolean Function with Gates
Combinational
Logic Circuits
•
•
•
•
•
•
•
Binary Logic and Gates
Boolean Algebra
Standard Forms
Map Simplification
NAND and NOR Gates
Exclusive-OR Gates
Integrated Circuits
Minterms for Three Variables
Sum of Products Design
X
0
0
1
1
Y
0
1
0
1
minterms
m0 = !X & !Y
m1 = !X & Y
m2 = X & !Y
m3 = X & Y
Sum of Products Design
Design an XOR gate
X
0
0
1
1
Y
0
1
0
1
Z
0
1
1
0
m1 = !X & Y
m2 = X & !Y
Z = m1 + m2
= (!X & Y) + (X & !Y)
Sum of Products: Exclusive-OR
X
Y
!X & Y
Z = (!X & Y) + (X & !Y)
X !X Y !Y
X & !Y
Maxterms for Three Variables
Product of Sums Design
Maxterms:
A maxterm is NOT a minterm
maxterm M0 = NOT minterm m0
M0 = m0’
=(X’ . Y’)’
= (X + Y)”
= X + Y
Product of Sums Design
X
0
0
1
1
Y
0
1
0
1
minterms
m0 = !X . !Y
m1 = !X . Y
m2 = X . !Y
m3 = X . Y
M0
M1
M2
M3
maxterms
= !m0 = X + Y
= !m1 = X + !Y
= !m2 = !X + Y
= !m3 = !X + !Y
Product of Sums Design
Design an XOR gate
X
0
0
1
1
Y
0
1
0
1
Z
0
1
1
0
Z is NOT minterm m0
AND
it is NOT minterm m3
Product of Sums Design
Design an XOR gate
X
0
0
1
1
Y
0
1
0
1
Z
0
1
1
0
M0 = X + Y
M3 = !X + !Y
Z = M0 & M3
= (X + Y) & (!X + !Y)
Product of Sums: Exclusive-OR
X
Y
X+Y
Z
!X + !Y
X !X Y !Y
Z = (X + Y) & (!X + !Y)
Three- Level and Two- Level Implementation
Combinational
Logic Circuits
•
•
•
•
•
•
•
Binary Logic and Gates
Boolean Algebra
Standard Forms
Map Simplification
NAND and NOR Gates
Exclusive-OR Gates
Integrated Circuits
Two-Variable Map
Three-Variable Map
Three- Variable Map:
Flat and on a Cylinder to Show Adjacent Squares
Three-variable K-Maps
YZ
X
0
1
00
01
1
1
1
11
1
F = !X & !Y
+ X & Z
10
Three-variable K-Maps
YZ
X
0
1
00
01
1
1
1
11
10
F =
+
+
+
!X & !Y & !Z
!X & !Y & Z
X & !Y & Z
X & Y & Z
1
F = !X & !Y & (!Z + Z)
+ X & Z & (!Y + Y)
= !X & !Y + X & Z
Three-variable K-Maps
YZ
X
00
01
11
0
1
10
1
1
1
1
F = Y & !Z
+ X
1
Three-variable K-Maps
YZ
X
0
1
00
01
11
1
1
1
1
1
F = !X & !Y
+ X & y
+ Z
10
1
Three-variable K-Maps
YZ
X
0
1
00
01
11
1
10
1
1
1
F = X & Z
+ !X & !Z
Three-variable K-Maps
YZ
X
00
01
11
10
0
1
1
1
1
1
1
1
F = Y
+ !Z
Three-variable K-Maps
YZ
00
X
0
0
1
4
1
01
11
10
1
3
2
5
7
6
1
1
1
F = m0 + m2 + m5 + m7
= S(0,2,5,7)
Four-Variable Map
Four-Variable Map:
Flat and on a Torus to Show Adjacencies
Four-variable K-Maps
YZ
WX 00
01
11
10
00 0
1
3
2
01
5
7
6
11 12 13
15
14
10 8
11
10
4
9
Each square is numbered in the above K-map
Four-variable K-Maps
YZ
WX 00
00
01
11
10
01
11
10
0
1
3
2
4
5
7
6
12
13
15
14
8
9
11
10
F(W,X,Y,Z) = S(2,4,5,6,7,9,13,14,15)
Four-variable K-Maps
YZ
WX 00
01
11
00
01
10
1
1
1
1
1
11
1
1
1
10
1
F =
+
+
+
!W & X
X & Y
!W & Y & !Z
W & !Y & Z
Combinational
Logic Circuits
•
•
•
•
•
•
•
Binary Logic and Gates
Boolean Algebra
Standard Forms
Map Simplification
NAND and NOR Gates
Exclusive-OR Gates
Integrated Circuits
Prime Implicants
F = XY’Z
+ X’Z’
+ X’Y
Each product term
is an implicant
A product term that cannot have any of its
variables removed and still imply the logic
function is called a prime implicant.
Combinational
Logic Circuits
•
•
•
•
•
•
•
Binary Logic and Gates
Boolean Algebra
Standard Forms
Map Simplification
NAND and NOR Gates
Exclusive-OR Gates
Integrated Circuits
Digital Logic Gates
>
>
••Logical Operations with NAND Gates
Alternative Graphics Symbols for NAND and NOT Gates
••Logical Operations with NOR Gates
Two Graphic Symbols for NOR Gate
Generalized De Morgan’s Theorem
•
•
•
•
•
•
•
NOT all variables
Change & to + and + to &
NOT the result
-------------------------------------------F=X&Y+X&Z+Y&Z
F = !((!X + !Y) & (!X + !Z) & (!Y + !Z))
F = !(!(X & Y) & !(X & Z) & !(Y & Z))
F = !(!(X & Y) & !(X & Z) & !(Y & Z))
X
Y
X
Z
Y
Z
F
F = !(!(X & Y) & !(X & Z) & !(Y & Z))
X
Y
X
Z
F
Y
Z
NAND Gate
F=X&Y+X&Z+Y&Z
X
Y
X
Z
Y
Z
F
Combinational
Logic Circuits
•
•
•
•
•
•
•
Binary Logic and Gates
Boolean Algebra
Standard Forms
Map Simplification
NAND and NOR Gates
Exclusive-OR Gates
Integrated Circuits
Exclusive-OR Gate
XOR
X
Y
Z
X
0
0
1
1
Y
0
1
0
1
Z
0
1
1
0
Z = X $ Y
X
X
X
X
$
$
$
$
0 = X
1 = !X
X = 0
!X = 1
X $ !Y = !(X $ Y)
!X $ Y = !(X $ Y)
A $ B = B $ A
(A $ B) $ C = A $ (B $ C)
= A $ B $ C
Exclusive-OR Constructed with NAND gates
X
=
=
=
=
&
X
X
X
X
(!X + !Y) + Y & (!X + !Y)
& !X + X & !Y + Y & !X + Y & !Y
& !Y + Y & !X
& !Y + !X & Y
$ Y
Parity Generation and Checking
Combinational
Logic Circuits
•
•
•
•
•
•
•
Binary Logic and Gates
Boolean Algebra
Standard Forms
Map Simplification
NAND and NOR Gates
Exclusive-OR Gates
Integrated Circuits
Fully Complementary CMOS Gate Structure and Examples
An Integrated circuit (IC) is a silicon semiconductor crystal, containing
the components for the digital gates. The various gates are connected on
the chip to form the IC.
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