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Pass Transistor Logic EMT 251 Pass Transistor Logic Inputs B Switch Out A Out Network B B Pass Transistor Logic Gate is static – a low-impedance path exists to both supply rails under all circumstances NMOS transistors only No static power consumption Ratioless (W/L) Bidirectional (versus undirectional) Complementary Pass Transistor Logic (CPL) Dual-rail form of pass transistor logic Avoids need for ratioed feedback Optional cross-coupling for rail-to-rail swing Example: AND/NAND gate Example: OR/NOR gate Example : XOR/XNOR gate Cascaded Technique Wrong!! Correct!! Draw a CMOS circuit based on this logic equation. Use a minimum number of transistors. Transmission Gate Logic EMT 251 Transmission Gate Logic (TG) s A(Vin ) P s B (Vout ) B (Vout ) A (Vin ) N s s Most widely used solution Use both NMOS and PMOS in parallel Can be used for logic circuit implementation Full swing bidirectional switch controlled by the gate signal (strong ‘0’ and ‘1’) The MOS transistor pass gate nMOS 1 1 1 0 passes a good 0 pMOS 0 passes a bad 1 0 Near Short CCT Resistance small 1 0 passes a bad 0 passes a good 1 TG as a Tristate Buffer A B=A (or Z when S=0) s In steady state A(Vin) S 0 0 0 1 1 0 1 1 Tn off on off off Tp off off off on B (Vout) Z (high impedance state (blocks logic flow)) 0 (nMOS passes strong 0, pMOS off when Vout<Vthp) Z (high impedance state (blocks logic flow)) 1 (pMOS passes strong 1, nMOS off when Vout>Vdd-Vthn ) Example : OR gate Example : AND gate Example : XOR gate