Download Memories and Microprocessors

Memories and
Microprocessors
Introduction


torage and recall of information fundamental to
sequential circuits
We have already looked at basic circuits to
accomplish this



flip-flops
latches
We shall now study how to build and access large
memory systems

Microprocessors and microcontrollers developed to fully
exploit
the potential of large memory systems
Objectives




To study how simple memory devices can be
constructed into large
memory systems
To understand the strengths and weaknesses of
different types of
memory: specifically Static RAM, Dynamic RAM,
Programmable ROM
Erasable PROM and Mask-programmed ROM
To illustrate the range of activities a simple
microprocessor can carry out
To illustrate the benefits of a software solution to
circuit design
Combining registers

Example: store four 8-bit binary numbers in
four 8-bit registers

Solution 1: Four mutually exclusive clock pulses
Sourc
e
of
8-bit
words
8
8
8
8
8
8
8-bit
regist
er
clk1
8
8-bit
regist
er
clk2
Four clock signals mutually exclusive
8
8-bit
regist
er
clk3
8-bit
regist
er
clk4
Writing to the memory

The data bus sets the 8 data input lines to the
required values

On the clock/control pulse the output from the
address decoder selects which register to
address.

The others don’t get the clock pulse
Combining registers
8-bit data words
8
2-bit
addresses
8
8
8
8
2
buses
register
register
register
register
00
address
decoder
11
control line
(clock pulse)
Combining registers

Inputs
Solution 2Data source
specifies which register
Source of
8-bit
words
and 2-bit
addresses
8
8
8
8
8
A1
A0
Q3
Q2
Q1
Q0
0
0
0
0
0
1
0
1
0
0
1
0
1
0
0
1
0
0
1
1
1
0
0
0
8
8
Outputs
8
Decode
output
control
signal
C
8-bit
regist
er
8-bit
regist
er
8-bit
regist
er
8-bit
regist
er
C
C
C
C
2
Q3
Q2 Q1 Q0
address decoder
Control
signal
AND gate
output
0
0
0
0
1
0
1
0
0
1
1
1
Reading and writing

Similar circuits can be set up for reading
from the memory

Memory thus consists of registers and
buses that allow the storage functions to
be carried out
Addressable Memory
Address
0
0
0
x
x
x
x
0
0
1
x
x
x
x
0
1
0
x
x
x
x
0
1
1
x
x
x
x
1
0
0
x
x
x
x
1
0
1
x
x
x
x
1
1
0
x
x
x
x
1
1
1
x
x
x
x
2
decoder
address bus
3 lines
3
Data
control bus
read/write
enable
data bus
4 lines
4
Memory can be organized in different
ways:
64 x 1 bit
8 x 1 byte
or
8 x 8 bit
16 x 4 bit
capacity of all these is 64 bits
Combining addressable memories

Eight 32K by 8 memory devices forming a 256K byte
address bus 15
memory
32K by 8 addresses
RAM
224K to (256K1)
32K by 8 addresses
RAM
192K to (224K1)
32K by 8 addresses
RAM
160K to (192K1)
32K by 8 addresses
RAM
128K to (160K1)
32K by 8 addresses
RAM
96K to (128K-1)
address
decoder
3
18
source and
receiver
32K by 8 RAM
8
15
32K by 8 RAM
8
15
32K by 8 RAM
8
15
32K by 8 RAM
8
15
32K by 8 addresses
RAM
64K to (96K-1)
32K by 8 RAM
8
15
32K by 8 addresses
RAM
32K to (64K-1)
32K by 8 RAM
8
15
32K by 8 addresses
RAM
0K to (32K-1)
32K by 8 RAM
8
15
32K by 8 RAM
8
15
Combining addressable memories

Eight 256K by 1 memory devices forming a 256K byte
memory
256K
by 1
RAM
18
source
and
receiver
256K
by 1
RAM
18
8
256K
by 1
RAM
18
7
256K
by 1
RAM
18
6
256K
by 1
RAM
18
5
18
address bus
256K
by 1
RAM
18
4
256K
by 1
RAM
18
3
256K
by 1
RAM
18
2
1
data bus
Major Types of Memory

RAM





all addresses accessible in equal time
selected in any order for read/write
read leaves data intact, write overwrites
volatile
ROM


permanent or semi-permanent storage
non-volatile
RAM types
DRAM
SRAM
static RAM
dynamic RAM
flip flop based
capacitor based
• synchronous burst (SB SRAM)
• fast page mode (FPM DRAM)
• asynchronous (ASRAM)
see, for example:
http://www.tomshardware.com
• extended data out (EDO DRAM)
• Burst EDO (BEDO DRAM)
• Synchronous (SDRAM)
Summary

Random Access Memory (RAM)

Static RAM (SRAM)




Dynamic RAM (DRAM)





based on flip-flops
requires several transistors
fast access time
stores charge
requires one capacitor and one transistor
But needs refresh every few milliseconds
slower access time
Even with additional circuitry for refresh operation,
DRAM has a higher density of storage-bits per unit
area
ROM



Contains permanent or semi-permanent
stored data.
Can be read but not changed (or not without
specialized equipment).
Types:



Generic (mask) ROM
Programmable ROM (PROM)
Erasable PROM (EPROM)
Mask ROM

Mask-programmed ROM
 generic ROM
 Chip manufacturer designs final photographic
mask to customer’s requirements as final stage
 Only cost-effective for volume production (tens
of thousand)
Programmable ROM


initially all zeros or one
one-time programmable
A
B
address 0
address 1
address 2
address3
uses fusible links
you remember
programmable OR array
EPROM’s

Erasable programmable ROM’s

Two types, depending on erasure method:


Ultraviolet erasable (UV EPROM)
Electrically erasable (EEPROM)
Use of PROM/EPROM



For smaller volume designs for which mask
ROM is not economic.
EPROM’s can be used for testing &
debugging.
PROM can be used for final system.
Flash memory




high density
read/write
non volatile – data stored indefinitely without
power
Combine best characteristics of traditional
RAM/ROM.
Microprocessors

A VLSI Device

Carries out a range of
instructions on data transferred
from a register array

Includes timing and control
functions
ALU
register
array
control unit
Microprocessor functionality

A microprocessor:




Retrieves data from
memory
Manipulates data
Stores data in memory
Simple in concept, but powerful in
application
Memory
control
signals
A
D
Microprocessor

Provides elegant solutions to a large
number of electronic circuit problems.
buses
Microprocessor Functionality

Microprocessor behaviour determined by list
of instructions in memory

a program
But memory can only hold binary patterns
 Use encoding scheme for instructions, eg

binary code
10110110 11000110
mnemonic
meaning
LDA
Load the accumulator (register) with
the contents of memory location A6
Instruction mnemonics

Code
......
181
182
183
184
185
186
187
188
189
190
......
Mnemonic
LDX
LDA
STA
STX
INX
SBA
ADA
JMP
BNE
CMP
Description
Load register X
Load accumulator
Store accumulator
Store register X
Increase the value in register X by 1
Subtract from accumulator
Add to accumulator
Jump to a different part of the program
If last test not equal, branch to .....
Compare accumulator
Microprocessor Functionality
Each instruction carries out an operation
 Some instructions use specially named
registers




the accumulator
register X
Instructions are specific to the type of
microprocessor (language not portable)
Instructions and operands


Some instructions require an operand
Possible operands:

a number


a memory location


LDA #42
STA &42
an indirect memory location

STA &(42)
A simple program
Address
(denary)
70
71
72
73
74
75
76
77
78
79
80
81
82
83
Accumulator:
Contents Interpretation
(denary)
153
?
197
?
182
1: load accumulator with contents of
80
memory location 80
187
2: add contents of
81
memory location 81 to accumulator
183
3: store content of accumulator in
82
memory location 82
188
?
40
?
121
35
data
15
78
255
Structure of microprocessor
8-bit data bus
8
IR
ALU
SR
X
MDR
MAR
Memory
PC
Control bus instructions

All instructions start with an instruction fetch:
1. MAR <- PC, memory read
2. Inc PC
3. IR <- MDR

The next step depends on what is in IR, e.g.
absolute load:
4. MAR <- PC, memory read
5. Inc PC
6. Acc <- MDR
7. Reset

enable PC, load MAR
inc PC
enable MDR, load IR
enable PC, load MAR
inc PC
enable MDR, load Acc
reset uPC
Notation called register transfer notation
Structure of microprocessor
IR
SR
8
register control
ALU operation
memory read
memory write
Control logic
(combinational logic)
4
instruction step
counter
counter
clock
reset
Different microprocessors

Parameters that can vary:








width of buses (4-bit, 8-bit, 16-bit, 32-bit etc.)
number of registers
operations of ALU
speed of clock
ordering of micro-instructions (simple, pipelined etc.)
fabrication technology (silicon, gallium arsenide)
and many more
Two main design philosophies:


reduced instruction set (RISC)
complex instruction set (CISC)
Summary

Microprocessor is a general purpose,
programmable integrated circuit.

When connected to memory used to store
both programs and data it becomes a
computer.