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Example 5-3 Find an expression for the electron current in the n-type material of a forward-biased p-n junction. The total current is Dp Dn qV / kT I qA p n (e 1) L n L p n p The hole current on the n side is Dp x / L I p ( xn ) qA pn e n p (e qV / kT 1) Lp Thus the electron current in the n material is Dp Dn qV / kT xn / L p I n ( xn ) I I p ( xn ) qA (1 e ) pn n p (e 1) Ln L p This expression includes the supplying of electrons for recombinat ion with the injected holes, and the injection of electrons across the junction into the p side. Solid State Electronic Devices 3. 3. Reverse Bias If V Vr p negatively biased with respect to n When Vr kT q pn pn (e q ( Vr ) / kT 1) pn pn qA Dp Lp pn e xn / L p qA Dp Lp ( pn )e xn / L p Physically, extraction occurs because minority carriers at the edges of the depletion region are swept down the barrier at the junction by the E field, Fig. 18. Reverse-biased p-n junction: minority carrier and holes in the n region diffuse toward distributions near the reverse-biased junction the junction. Solid State Electronic Devices Example 5-4 Consider a volume of n-type material of area A, with a length of one hole diffusion length Lp. The rate of thermal generation of holes within the volume is ALp pn p since gth n r nn pn 2 r i pn p Assume that each thermally generated hole diffuses out of the volume before it can recombine. The resulting hole current is I=qALppn/τp, which is the same as the saturation current for a p+-n junction. We conclude that saturation current is due to the collection of minority carriers thermally generated within a diffusion length of the junction. Solid State Electronic Devices 4. Reverse-bias Breakdown < Preface > • If the current is not limited externally, the junction can be damaged by excessive reverse current, which overheats the device as the maximum power rating is exceeded. • It is important to remember, however, that such destruction of the device is not necessarily due to mechanisms unique to reverse breakdown. • The first mechanism, called the Zener effect, is operative at low voltages(up to a few volts reverse bias). • The breakdown occurs at higher voltages(from a few volts to thousands of volts), the mechanism is avalanche breakdown. Solid State Electronic Devices 4. 1. Zener Breakdown Heavily doped junction → High electric fields → Tunneling effect occurs High electric field makes steep energy band, and reverse bias makes narrower width of barrier. Fig. 20. The Zener effect: (a) heavily doped junction at equilibrium; (b) reverse bias with electron tunneling from p to n; (c) I-V characteristic Solid State Electronic Devices 4. 2. Avalanche Breakdown nout nin (1 P P 2 P 3 ...) M n (Electron multiplica tion) nout 1 P P 2 P3 nin 1 1 P 1 M 1 (V / Vbr ) n • Lightly doping • Breakdown mechanism is the impact ionization of host atoms by energetic carriers. Fig. 21. Electron-hole pairs created by impact ionization : (a) a single ionizing collision by an incoming electron in the depletion region of the junction; (b) primary, and tertiary collisions Solid State Electronic Devices 4. 2. Avalanche Breakdown • In general, the critical reverse voltage for breakdown increases with the band gap of the material, since more energy is required for an ionizing collision. • Vbr decreases as the doping increases, as Fig. indicates. Fig. 22. Variation of avalanche breakdown voltage in abrupt p+-n junctions, as a function of donor concentration on the n side, for several semiconductors. Solid State Electronic Devices 4. 3. Rectifiers • Most forward-biased diodes exhibit an offset voltage E0, which can be approximated in a circuit model by a battery in series with the ideal diode and resister R. Fig. 23. Piecewise-linear approximations of junction diode characteristics : (a) the ideal diode; (b) ideal diode with an offset voltage; (c) ideal diode with an offset voltage and a resistance to account for slope in the forward characteristic. Solid State Electronic Devices 4. 3. Rectifiers A short, lightly doped region → The reason of punch-through It is possible for W to increase until it fills the entire length of this region. → The result of punch-through is a breakdown below the value of Vbr Fig. 24. Beveled edge and guard ring to prevent edge breakdown under reverse bias : (a) diode with beveled edge; (b) closeup view of edge, showing reduction of depletion region near the bevel; (c) guard ring Solid State Electronic Devices 4. 4. Breakdown Diode • It is designed for a specific breakdown voltage(higher doping). Such diodes are also called Zener diodes(several hundred voltages). • It can be used as voltage regulators in circuits with varying inputs. Fig. 26. A breakdown diode : (a) I-V characteristic; (b) application as a voltage regulator Solid State Electronic Devices 5. Transient and A-C Conditions < Preface > • Since most solid state devices are used for switching or for processing a-c signals, we cannot claim to understand p-n junctions without knowing at least the basics of time dependent processes. • In this section we investigate the important influence of excess carriers in transient and a-c problems. • The switching of a diode from its forward state to its reverse state is analyzed to illustrate a typical transient problem. Solid State Electronic Devices 5. 1. Time Variation of Stored Charge Δx Jp(x+Δx) Diffusion and recombinat ion : The continuity equation p t x x x 1 J p ( x) J p ( x x) p q x p Jp(x) Rate of increase of hole concentra- recombination Fig. 4-16 Hole buildup tion in ΔxA per unit time rate We can obtain each component of the current at position x and time t from above eq. J p ( x, t ) p( x, t ) p( x, t ) We can integrate both sides at time t to obtain q q x p t x p ( x, t ) p ( x, t ) J p (0) J p ( x) q dx 0 t p Fig. 4-16. Current entering and leaving a volume ΔxA. Solid State Electronic Devices 5. 1. Time Variation of Stored Charge All hole current at p /n, a long n region, xn 0. Also, xn , hole current is zero(0). qA i (t ) i p ( xn 0, t ) p( xn , t )dxn qA p( xn , t )dxn 0 p t 0 i (t ) Q p (t ) p dQ p (t ) dt The hole current injected across the p / n junction is (1) Recombinat ion of excess carriers : Q p / p (2) Increasing or decreasing excess carriers : dQ p dt (1) (2) : providing minority carriers Solid State Electronic Devices 5. 1. Time Variation of Stored Charge Stored charges are recombination with electrons Carrier distributi on of stored charges after recombinat ion Laplace Tranformat ion : i (t ) Q p (t ) p dQ p (t ) dt i (t 0) 0, Q p (0) I p 0 1 p Q p ( s ) sQ p ( s ) I p Q p (s) I p s 1/ p Q p (t ) I p e t / p Fig. 27. Effects of a step turn-off transient in a p+-n diode: (a) current through the diode; (b) decay of stored charge in the n-region; (c) excess hole distribution in the n-region as a function of time during the transient. Solid State Electronic Devices 5. 1. Time Variation of Stored Charge The excess hole concentrat ion at xn 0 during the transien t, pn (t ) pn (e qv(t ) / kT 1) Finding pn will easily give us the transien t voltage . Obtaining pn is not simple because hole distributi on does not remain in the convenient exponentia l form it has in steady state. An approximat e solution for v(t ) can be obtained by assuming Quasi - steady state p( xn , t ) pn (t )e xn / L p We have for the stored charge at any instant, Q p (t ) qA pn (t )e 0 xn / L p dxn qALp pn (t ), pn (t ) pn (e qv ( t ) / kT 1) Q p (t ) qALp kT I p t / p v(t ) ln e 1 q qALp pn Solid State Electronic Devices 5. 2. Reverse Recovery Transient = p(xn)-pn t=0, p-n diode has forward-bias. Ir=-E/R, when stored charges are totally recombination. It’s desirable that tsd is small compared with the switching time. Fig. 28. Stored delay time in a p+-n diode: (a) circuit and input square wave; (b) hole distribution in the n-region as a function of time during the transient; (c) variation of current and voltage with time; (d) sketch of transient current and voltage on the device I-V characteristic Solid State Electronic Devices 5. 2. Reverse Recovery Transient tsd is storage delay tim e. The critical parameter determinin g tsd is the carrier lifetime. 1 I f t sd τ p erf I I r f 2 Fig. 28. Effects of storage delay time on switching signal: (a) switching voltage; (b) diode current Solid State Electronic Devices Example 5-5 At the time t=0 the current is switched to –Ir at a forward biased p+-n diode. Apply appropriate boundary condition and quasi-steady state approximation to find the tsd. Q p (t ) I f p e From Eq. (5 - 47), i (t ) Q p (t ) p dQ p (t ) dt for t 0, Q p I f p t / p I r p (e t / p p [ I r ( I f I r )e t / p 1) ] Assuming that Q p (t ) qAL p pn (t ) as in Eq. (5 - 52), Using Laplace transfor ms, Q p (s) I r sQ p ( s ) I f p s p Q p (s) I f p s 1/ p Ir s(s 1 / p ) pn (t ) p qAL p I r ( I f I r )e t / p This is set to equal zero when t t sd , and we obtain : I If t sd p ln r p ln 1 Ir I f I r Solid State Electronic Devices 5. 3. Switching Diodes • A diode with fast switching properties → either store very little charge in the neutral regions for steady forward currents, or have a very short carrier lifetime, or both. The methods to improve the switching speed of a diode. 1. To add efficient recombination centers to the bulk material. For Si diodes, Au doping is useful for this purpose. The carrier lifetime varies with the reciprocal of the recombination center concentration. 2. To make the lightly doped neutral region shorter than a minority carrier diffusion length. This is the narrow base diode. In this case the stored charge for forward conduction is very small, since most of the injected carriers diffuse through the lightly doped region to the end contact. → Very little time required to eliminate the stored charge in the narrow neutral region. Solid State Electronic Devices 5. 4. Capacitance of p-n Junctions 1) Junction capacitance : dominant under reverse bias 2) Charge storage capacitance : dominant under forward bias Junction Capacitance C In equilibriu m, W 2V0 N a N d q Na Nd dQ dV With bias, W 2 V0 V N a N d q Na Nd Uncompen sated charge, Q qAxn 0 N d qAx p 0 N a Nd Na Na Nd Nd Na xn 0 W , x p0 W , Q qA W A 2q V0 V Na Nd Na Nd Nd Na Nd Na Solid State Electronic Devices 5. 4. Capacitance of p-n Junctions Voltage variatio n barrier height change Cj Nd Na dQ A 2 q d (V0 V ) 2 (V0 V ) N d N a Voltage variable capacitanc e V0 V 1 / 2 Applicatio n : varactor Using the form of the parallel plate capacitor formular C j A Nd Na q A dQ same as C j 2 (V0 V ) N d N a W dV For p /n junction, N a N d , xn 0 W Cj Applicatio n : A 2 q Nd 2 V0 V p+ n xp0 xn0 doping concentrat ion measuremen t via capacitanc e measuremen t Solid State Electronic Devices 5. 4. Capacitance of p-n Junctions Charge Storage Capacitance Forward biased with a steady current stored charge in the injected hole distributi on Q p I p qApn L p qALp pn e qV / kT Capacitanc e due to small changes in this stored charge q2 q Cs ALp pn e qV / kT I p p dV kT kT a - c conductanc e dI qALp pn d qV / kT q Gs e I dV p dV kT dQ p The charge storage capacitanc e limit switching effect for forward - biased p - n junction in high - frequency circuit Cs dQ / dV good switching Solid State Electronic Devices 5. 4. Capacitance of p-n Junctions Fig. 30. Depletion capacitance of a junction: (a) p+-n junction showing variation of depletion edge on n side with reverse bias. Electrically, the structure looks like a parallel plate capacitor whose dielectric is the depletion region, and the plates are the space charge neutral regions; (b) variation of depletion capacitance with reverse bias. Solid State Electronic Devices 5. 4. Capacitance of p-n Junctions Fig. 31. Diffusion capacitance in p-n junctions. (a) Steady-state minority carrier distribution for a forward bias, V, and reduced forward bias, V-ΔV in a long diode; (b) minority carrier distributions in a short diode; (c) diffusion capacitance as a function of forward bias in long and short diodes. Solid State Electronic Devices