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International Journal of Advances in Engineering Research
http://www.ijaer.com
(IJAER) 2012, Vol. No. 4, Issue No. III, September
ISSN: 2231-5152
DESIGN ANANLYSIS AND DEVELOPLMENT OF
OPTIMIZATION TECHNIQUES IN SWITCHED ROUTING
1
Dr. Umesh Sehgal and 2Yadu Sharma
[email protected],Asso. Prof. Arni University
[email protected], M.Tech student Arni University
ABSTRACT
In the emerging environment of high performance IP networks, it is expected that local
and campus area backbones, enterprise networks, and Internet Service Providers (ISPs)
will use multigigabit and terabit networking technologies where IP routers will be used not
only to interconnect backbone segments but also to act as points of attachments to high
performance wide area links.
Special attention must be given to new powerful
architectures for routers in order to play that demanding role. In this paper, we identify
important trends in router design and outline some design issues facing the next generation
of routers. It is also observed that the achievement of high throughput IP routers is
possible if the critical tasks are identified and special purpose modules are properly
tailored to perform them.
Keywords: - IP, ISP, WLAN, Router
INTRODUCTION
The popularity of the Internet has caused the traffic on the Internet to grow drastically
every year for the last several years. It has also spurred the emergence of many Internet
Service Providers (ISPs). To sustain growth, ISPs need to provide new differentiated
services, e.g., tiered service, support for multimedia applications, etc. The routers in the ISPs’ networks
play a critical role in providing these services. Internet Protocol (IP) traffic on private enterprise
networks have also been growing rapidly for some time. These networks face significant bandwidth
challenges as new application types, especially desktop applications uniting voice, video, and data
traffic need to be delivered on the network infrastructure. This growth in IP traffic is beginning to
stress the traditional processor-based design of current-day routers and as a result has created new
challenges for router design.
Routers have traditionally been implemented purely in software. Because of the software
implementation, the performance of a router was limited by the performance of the processor
executing the protocol code. To achieve wire-speed routing, high-performance processors together with
large memories were required. This translated into higher cost. Thus, while software-based wire-speed
routing was possible at low-speeds, for example, with 10 megabits per second (Mbps) ports, or with a
International Journal of Advances in Engineering Research
International Journal of Advances in Engineering Research
http://www.ijaer.com
(IJAER) 2012, Vol. No. 4, Issue No. III, September
ISSN: 2231-5152
relatively smaller number of 100 Mbps ports, the processing costs and architectural implications make it
difficult to achieve wire-speed routing at higher speeds using software-based processing.
Fortunately, many changes in technology (both networking and silicon) have changed the landscape for
implementing high-speed routers. Silicon capability has improved to the point where highly complex
systems can be built on a single integrated circuit (IC). The use of 0.35 m and smaller silicon
geometries enables application specific integrated circuit (ASIC) implementations of millions gateequivalents. Embedded memory (SRAM, DRAM) and microprocessors are available in addition to
high-density logic. This makes it possible to build single-chip, low-cost routing solutions that
incorporate both hardware and software as needed for best overall performance.
In this paper we investigate the evolution of IP router designs and highlight the major
performance issues affecting IP routers.
The need to build fast IP routers is being
addressed in a variety of ways. We discuss these in various sections of the paper. We
discuss in detail the various router mechanisms needed for high-speed operation. In particular, we
examine the architectural constraints imposed by the various router design alternatives. The scope of the
discussion presented here does not cover more recent label switching routing techniques such as IP
Switching [1], the Cell Switching Router (CSR) architecture [2], Tag Switching [3], and Multiprotocol
Label Switching (MPLS).
Generally, routers consist of the following basic components: several network interfaces
to the attached networks, processing module(s), buffering module(s), and an internal
interconnection unit (or switch fabric). Typically, packets are received at an inbound network
interface, processed by the processing module and, possibly, stored in the buffering module.
Then,
they
are
forwarded
through
the
internal
interconnection
unit
to
the outbound interface that transmits them on the next hop on the journey to their final
destination. The aggregate packet rate of all attached network interfaces needs to be
processed, buffered and relayed. Therefore, the processing and memory modules may be
replicated either fully or partially on the network interfaces to allow for concurrent
operations.
A generic architecture of an IP router is given in Figure 1. Figure 1a shows the basic architecture of
a typical router: the controller card (which holds the CPU), the router backplane, and interface cards.
The
CPU
in
the
router
typically
performs
such
functions
as
path computations, routing table maintenance, and reach ability propagation. It runs which
ever routing protocols are needed in the router. The interface cards consist of adapters that
perform inbound and outbound packet forwarding (and may even cache routing table
entries or have extensive packet processing capabilities).
The router backplane is
responsible for transferring packets between the cards.
1. Architectures with Route Caching
International Journal of Advances in Engineering Research
International Journal of Advances in Engineering Research
http://www.ijaer.com
(IJAER) 2012, Vol. No. 4, Issue No. III, September
ISSN: 2231-5152
For the second generation IP routers, improvement in the shared-bus router architecture
was introduced by distributing the packet forwarding operations.
Distributing fast
processors and route caches, in addition to receive and transmit buffers, over the network interface
cards reduces the load on the system bus. Packets are therefore transmitted only
once over the shared bus. This reduces the number of bus copies and speeds up packet forwarding
by using a route cache of frequently seen addresses in the network interface This architecture allows
the
network
interface
cards
to
process
packets
locally some of the time.
CONCLUSION
We must note that any of the products in this roundup will serve you well if your ISP doles out under
5 Mbps of bandwidth to you and your Internet use is primarily web browsing, emailing, IM and the
occasional file download. But if you're looking for more out of a router, then the following comments
will be helpful for ranking the products in this roundup.
Though it won't be winning any router beauty contests any time soon with its homely design,
theAirlink101 AR504 soundly beats the competition in this roundup, both in terms of performance
and feature set. With nearly double the benchmarked speeds of its nearest competitor, along with a
full set of features, the AR504 offers the best combination of features and performance for its price.
Coming in second is the Edimax BR-6104K with its extensive feature list and attractive admin
console UI. Its tough firewall options make it a fine choice for the security-minded, along with its
port forwarding and access control options and its total memory size (with both RAM and flash being
double the size of its nearest competitor) make up for its middling speed.
The TrendNet and Zonet offerings make up the middle of the pack, with a decent amount of features
coupled with adequate speed. Either router would make a fine addition to a small network
environment.
Pulling up the rear are the the D-Link EBR-2310 and U.S. Robotics USR8004. While the EBR-2310
comes with a good amount of features, its low ranking is mainly due to its relatively low throughput.
However, the USR8004 comes in dead last due not only to low throughput but also its lackluster
feature set and bare-bones UI, which harken back to first generation routers. Consumer routers have
come a long way, but you would never know it from the USR8004. And you can see by this roundup
that there are better products, although with lesser-known brand names, for the money.
With the exception of the USR8004, none of these routers can truly be called 'cheap'. Rather, they all
offer functional solutions for the small office or home user on a budget, without carrying the same
price tag as more hefty routers. The conventional wisdom of 'you get what you pay for' can be thrown
International Journal of Advances in Engineering Research
International Journal of Advances in Engineering Research
http://www.ijaer.com
(IJAER) 2012, Vol. No. 4, Issue No. III, September
ISSN: 2231-5152
to the wind when it comes to these routers, as nearly all fare well when put to the test and all can be
had for the price of a song if you look in the right place.
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International Journal of Advances in Engineering Research
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ISSN: 2231-5152
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