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BUZ71
Data Sheet
December 2001
14A, 50V, 0.100 Ohm, N-Channel Power
MOSFET
Features
• 14A, 50V
This is an N-Channel enhancement mode silicon gate power
field effect transistor designed for applications such as
switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
This type can be operated directly from integrated circuits.
• rDS(ON) = 0.100Ω
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
Formerly developmental type TA9770.
• Majority Carrier Device
Ordering Information
PART NUMBER
BUZ71
PACKAGE
TO-220AB
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
BRAND
BUZ71
NOTE: When ordering, use the entire part number.
Symbol
D
G
S
Packaging
JEDEC TO-220AB
DRAIN (FLANGE)
©2001 Fairchild Semiconductor Corporation
SOURCE
DRAIN
GATE
BUZ71 Rev. B
BUZ71
TC = 25oC, Unless Otherwise Specified
Absolute Maximum Ratings
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR
Continuous Drain Current, TC = 55oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
DIN Humidity Category - DIN 40040 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IEC Climatic Category - DIN IEC 68-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
BUZ71
50
50
14
56
±20
40
0.32
100
-55 to 150
E
55/150/56
UNITS
V
V
A
A
V
W
W/oC
mJ
oC
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BVDSS
ID = 250µA, VGS = 0V
50
-
-
V
Gate to Threshold Voltage
VGS(TH)
VGS = VDS, ID = 1mA (Figure 9)
2.1
3
4
V
IDSS
TJ = 25oC, VDS = 50V, VGS = 0V
-
20
250
µA
TJ = 125oC, VDS = 50V, VGS = 0V
-
100
1000
µA
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
VGS = 20V, VDS = 0V
-
10
100
nA
rDS(ON)
ID = 9A, VGS = 10V (Figure 8)
-
0.09
0.1
Ω
gfs
VDS = 25V, ID = 9A (Figure 11)
3.0
5.2
-
S
-
20
30
ns
IGSS
Forward Transconductance (Note 2)
Turn-On Delay Time
td(ON)
-
55
85
ns
td(OFF)
-
70
90
ns
tf
-
80
110
ns
-
480
650
pF
-
280
450
pF
-
160
280
Rise Time
tr
Turn-Off Delay Time
VCC = 30V, ID ≈ 3A, VGS = 10V, RGS = 50Ω,
RL = 10Ω
Fall Time
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
VDS = 25V, VGS = 0V, f = 1MHz
(Figure 10)
pF
Thermal Resistance Junction to Case
RθJC
≤ 3.1
oC/W
Thermal Resistance Junction to Ambient
RθJA
≤ 75
oC/W
Source to Drain Diode Specifications
PARAMETER
Continuous Source to Drain Current
SYMBOL
ISD
Pulsed Source to Drain Current
ISDM
Source to Drain Diode Voltage
VSD
Reverse Recovery Time
Reverse Recovery Charge
trr
QRR
MIN
TYP
MAX
UNITS
TC = 25oC
TEST CONDITIONS
-
-
14
A
TC = 25oC
TJ = 25oC, ISD = 28A, VGS = 0V, (Figure 12)
TJ = 25oC, ISD = 14A, dISD/dt = 100A/µs,
VR = 30V
-
-
56
A
-
1.6
1.8
V
-
120
-
ns
-
0.15
-
µC
NOTES:
2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 10V, starting TJ = 25oC, L = 820µH, IPEAK = 14A. (See Figures 14 and 15).
©2001 Fairchild Semiconductor Corporation
BUZ71 Rev. B
BUZ71
Typical Performance Curves
Unless Otherwise Specified
18
1.2
VGS ≥ 10V
POWER DISSIPATION MULTIPLIER
16
ID, DRAIN CURRENT (A)
1.0
0.8
0.6
0.4
14
12
10
8
6
4
0.2
2
0
0
25
50
75
100
TC , CASE TEMPERATURE (oC)
125
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
ZθJC, TRANSIENT THERMAL IMPEDANCE
0
150
0
50
100
TC, CASE TEMPERATURE (oC)
150
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
0.5
1
0.2
0.1
0.1
0.05
0.02
0.01
0
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
0.01
10-5
10-4
10-3
10-2
10-1
t, RECTANGULAR PULSE DURATION (s)
100
101
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
102
ID, DRAIN CURRENT (A)
101
TJ = MAX RATED
SINGLE PULSE
TC = 25oC
100µs
1ms
OPERATION IN THIS
AREA MAY BE LIMITED
100 BY r
DS(ON)
10ms
100ms
DC
ID, DRAIN CURRENT (A)
30
5µs
10µs
PD = 40W
VGS = 20V
10V
PULSE
DURATION = 80µs
DUTY
CYCLE = 0.5% MAX
VGS = 8.0V
20
VGS = 7.5V
VGS = 7.0V
VGS = 6.5V
VGS = 6.0V
10
VGS = 5.5V
VGS = 5.0V
10-1
100
101
102
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
©2001 Fairchild Semiconductor Corporation
103
0
VGS = 4.5V
VGS = 4.0V
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
6
FIGURE 5. OUTPUT CHARACTERISTICS
BUZ71 Rev. B
BUZ71
15
Unless Otherwise Specified (Continued)
0.4
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS = 25V
TJ = 25oC
rDS(ON), DRAIN TO SOURCE
ON RESISTANCE (Ω)
IDS(ON), DRAIN TO SOURCE CURRENT (A)
Typical Performance Curves
10
5
0
5
VGS, GATE TO SOURCE VOLTAGE (V)
VGS(TH), GATE THRESHOLD VOLTAGE (V)
ON RESISTANCE (Ω)
rDS(ON), DRAIN TO SOURCE
VGS = 10V, ID = 9A
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0.20
0.10
-40
0
40
80
120
160
4
gfs, TRANSCONDUCTANCE (S)
C, CAPACITANCE (nF)
CISS
COSS
CRSS
10
20
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
40
FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
©2001 Fairchild Semiconductor Corporation
30
3
2
1
0
-50
6
VGS = 0, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS +CGS
0
10
20
ID, DRAIN CURRENT (A)
0
50
100
150
FIGURE 9. GATE THRESHOLD VOLTAGE vs JUNCTION
TEMPERATURE
100
10-2
0
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs
JUNCTION TEMPERATURE
10-1
20V
VDS = VGS
ID = 1mA
TJ , JUNCTION TEMPERATURE (oC)
101
10V
0.1
FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
0.30
0
9V
0.2
10
FIGURE 6. TRANSFER CHARACTERISTICS
VGS = 5V 5.5V 6V 6.5V 7V 7.5V 8V
0.3
0
0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS = 25V
TJ = 25oC
5
4
3
2
1
0
0
5
10
ID, DRAIN CURRENT (A)
15
FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT
BUZ71 Rev. B
BUZ71
Typical Performance Curves
15
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
101
TJ = 150oC
TJ = 25oC
100
10-1
0
ID = 18A
VGS, GATE TO SOURCE VOLTAGE (V)
ISD, SOURCE TO DRAIN CURRENT (A)
102
Unless Otherwise Specified (Continued)
0.5
1.0
1.5
2.0
2.5
VSD, SOURCE TO DRAIN VOLTAGE (V)
VDS = 10V
10
VDS = 40V
5
0
3.0
0
20
10
30
Qg, GATE CHARGE (nC)
FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
VDS
BVDSS
tP
L
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VDS
IAS
VDD
+
RG
VDD
-
VGS
DUT
tP
0V
IAS
0
0.01Ω
tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(ON)
td(OFF)
tr
RL
VDS
tf
90%
90%
+
RG
-
VDD
10%
10%
0
DUT
90%
VGS
VGS
0
FIGURE 16. SWITCHING TIME TEST CIRCUIT
©2001 Fairchild Semiconductor Corporation
10%
50%
50%
PULSE WIDTH
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
BUZ71 Rev. B
BUZ71
Test Circuits and Waveforms
(Continued)
VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
12V
BATTERY
0.2µF
VDD
Qg(TOT)
SAME TYPE
AS DUT
50kΩ
Qgd
Qgs
0.3µF
D
Ig(REF)
VDS
DUT
G
0
S
0
IG CURRENT
SAMPLING
RESISTOR
VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 18. GATE CHARGE TEST CIRCUIT
©2001 Fairchild Semiconductor Corporation
VGS
Ig(REF)
0
FIGURE 19. GATE CHARGE WAVEFORMS
BUZ71 Rev. B
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DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
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support device or system whose failure to perform can
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be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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