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ispPAC20 Thermoelectric Temperature
Controller Evaluation Board PAC20-EV-TEC
May 2002
Application Note AN6034
1. Introduction
The Lattice Semiconductor ispPAC®20 In-System-Programmable (ISP™) Analog Circuit allows designers to
quickly implement analog circuits such as amplifiers and active filters, with circuit descriptions stored in the
ispPAC20’s non-volatile E2CMOS® memory. This technology brings in-system programmability to the analog world.
Device functionality as well as parameters such as gain and frequency response can be set by the user and
changed on-the-fly by reprogramming the device. A standard JTAG IEEE 1149.1 interface allows the user to reconfigure the ispPAC20 while in-system using on-chip non-volatile E2CMOS technology.
2. PAC20-EV-TEC Evaluation Board
The ispPAC20-EV-TEC Evaluation Board (Figure 1) allows the user to quickly configure and evaluate the ispPAC20
for thermoelectric temperature control applications. The evaluation board includes an ispPAC20 in a 44-pin PLCC
package and the external circuitry necessary to measure temperature with an external 10kΩ thermistor, drive up to
a 1A thermoelectric cooler module (TEC), and set control loop compensation. Power, and connections to the external TEC and thermistor are provided through screw terminals for greater ease in prototyping.
Figure 1. ispPAC20-EV-TEC Evaluation Board
3. Circuit Description
Figure 2 shows a simplified schematic overview of the ispPAC20-EV-TEC evaluation board. A single ispPAC20 performs all of the major control functions required to bring a TEC to and maintain it at a given temperature. External
on-board components implement an H-bridge power driver for the TEC, an interface to an external thermistor for
monitoring TEC temperature, and a control-loop compensation network. A detailed schematic for this evaluation
board can be found in Section 7 of this application note.
The ispPAC20 allows a user to program a desired temperature setpoint through its on-chip DAC. In addition to
being able to program a desired DAC setting into non-volatile E2CMOS memory, it is also possible to dynamically
change the setpoint by loading the DAC through either the ispPAC20’s parallel or SPI interfaces.
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an6034_01
ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
Lattice Semiconductor
Figure 2. ispPAC20-EVAL-TEC - simplified schematic
Loop
Compensation
Vtec
Temperature
Setpoint
DAC
PI
Controller
H-Bridge
Driver
+5V
E2CMOS
Configuration
Memory
TEC
Thermistor
IA
ispPAC20
The ispPAC20 is also used to implement a proportional-integral (PI) loop controller. Because the time constants
needed to stabilize a thermal system typically range from hundreds of milliseconds to tens of seconds, an external
capacitor and one or more resistors are needed to realize the control function.
The ispPAC20’s differential outputs make it straightforward to design simple, compatible power-driver circuits such
as the H-Bridge driver provided on the ispPAC20-EV-TEC. The primary advantage of an H-Bridge is that it provides
bipolar (Heat/Cool) drive to the TEC while operating from a single positive power supply. To protect the TEC, a current limiting feature has been included in the ispPAC20-EV-TEC’s H-bridge driver, limiting output current to approximately 1.3A. This current limit is controlled by the value of R9 (0.56Ω - see Figure 7), and can be decreased by
increasing R9’s resistance value.
The ispPAC20-EV-TEC also provides an interface to measure temperature using an external 10kΩ thermistor. This
interface works by including the thermistor as one of the legs in a balanced bridge circuit, where the remaining
bridge legs are fixed, 10kΩ precision resistors (R3,R4,R5 in Figure 7). This configuration provides a differential signal of approximately 50mV/°C when used with a thermistor with a ‘beta’ of 3900 (~ -4%/°C tempco). Note that
because of this balanced-bridge arrangement, a zero-voltage differential signal will result when the thermistor is
10kΩ (typically at 25°C). It is also possible to use the ispPAC20-EV-TEC board with other thermistors by making
appropriate substitutions for R3,R4, and R5.
4. External Connections
The ispPAC20-EV-TEC evaluation board has two external connectors, an 8-position screw-terminal (J2) for power,
sensor, and TEC connections, and an 8-position header (J1) to accommodate the JTAG serial programming interface. Figure 3 shows how the thermistor, TEC module, and external power supplies are connected to the evaluation
board. Note that a separate supply terminal (VTC) is provided for powering the TEC module. This allows the user to
use TEC modules with different voltage ratings. In general, one will want to select the VTC power supply to be
approximately 1-1.5V higher than the maximum operating voltage of the TEC being used. Setting the VTC power
supply higher than necessary will result in excessive heating of the output driver transistors. Figure 3 shows how
the ispPAC20-EV-TEC board should be connected
While the polarity of the connection to the external thermistor is not important, that of the connection to the TEC is
critical. If the TEC connection is reversed, this will reverse the feedback sense of the control loop from negative to
positive. This will result in the driver moving into a saturated state, and remaining there indefinitely. If the TEC ‘+’
and ‘-’ terminals are defined such that applying a positive voltage across them results in heating the thermistor,
then the TEC+ terminal should be connected to TC+, and the TEC- terminal should be connected to TC-.
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ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
Lattice Semiconductor
Figure 3. External Connections for Evaluation Board
ispPAC20-EV-TEC
ispPAC20 Thermoelectric Temperature Control
Evaluation Board
ispPAC20
+5
JTAG IN
GND TH+
TH-
TC-
VTC
TEC Power Supply
+3.3V to +6V
+5V
JTAG
Programming Cable
Connect to PC
TC+ GND
Thermistor
TEC Module
An 8-pin 0.100” (2.54mm) pitch header is provided for the connection of an ispDOWNLOAD® cable for JTAG programming of the on-board ispPAC20. This is the same cable as is used to program ispPAC devices on other evaluation boards, and is included in ispPAC system design kits. This cable may also be purchased as a separate item
by part number pDS4102-DL2.
In addition to the screw-terminal connector and 8-pin header, on-board test points are provided to allow for the
measurement of thermistor temperature and TEC current. Temperature is measured as a voltage across the points
labeled TMP+ and TMP- (J4). For the most common types of thermistors, one can expect to see ~50mV/°C across
these terminals.
TEC current can be measured as a voltage across the IS+ and IS- test points (J5). With the installed value of R9
(0.56Ω), 0.56V will be developed for every Ampere of TEC current. Note that both of these voltage measurements
are differential, and in the case of temperature, have a significant (2.5V) common-mode component.
5. Compensation Network
Because extremely long time constants (0.1 - 10 seconds) may be needed by a temperature controller, these time
constants must be generated by the use of external resistors and capacitors. The ispPAC20-EV-TEC board provides a Proportional-Integral compensation network on-board. Because the exact values of loop compensation
needed to ensure a stable, fast settling control loop are dependent on the characteristics of the system being controlled, it is usually necessary to ‘tune’ a given control loop for optimal performance. The ispPAC20-EV-TEC board
provides the ability to tune a control loop through the provision of several values of resistance and capacitance
which can be selected through jumpers. Figure 4 shows a detail of this compensation network.
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ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
Lattice Semiconductor
Figure 4. Detail of Compensation Network
Feedback Network
Input Network
RA
CCMP
RF
RXA
J3.1
J3.6
RXF
R12 - 1M
J3.2
J3.7
R13 - 2.2M
J3.3
J3.8
R16 - 1M
R14 - 4.7M
J3.4
J3.9
R17 - 2.2M
R15 - 10M
J3.5
J3.10
R18 - 4.7M
J3.11
R19 - 10M
CXF
J3.13
C8 1U
J3.14
C9 10U
J3.15
CN
C10 0.01U
J3.16
C11 0.1U
J3.17
Setpoint in DAC
DAC
IA3
VREFout
From Temp.
Sensor
OA2
IA4
To Power Driver Stage
All jumpers are located on the common dual-row header J3. Jumpers J3.1 through J3.5 control the selection of RA,
which controls both integral time constant, and proportional gain. J3.1 selects a user-definable resistor RXA (not
installed on board).
Jumpers J3.6 through J3.11 select a feedback resistance RF, which controls proportional gain. J3.6 selects a userdefinable resistor. Note that in cases where minimal proportional gain is required, one can select zero ohms with
J3.7.
J3.13 through J3.15 select the integration capacitor CCMP. Again, a provision exists for selecting a user-defined
capacitor (CXF).
The capacitors selected by J3.13 and J3.14 (C10, C11, ‘CN’ group on board) are used to bypass the feedback
resistor bank and reduce high-frequency gain. The inclusion of one of these capacitors is often helpful in reducing
the effects of high-frequency external interference (e.g. 60 Hz power-line hum).
The proportional (KP) and integral (KI) gains of the compensation network and error amplifier are given by
KP = 1 +
KI(f) =
RF
RA
1
2 π f CFRA
4
(1)
(2)
ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
Lattice Semiconductor
For further material on implementing control loop compensation networks with the ispPAC20, please refer to application note AN6029, ‘Thermoelectric Temperature Control Using the ispPAC20’.
6. ispPAC20 Overview and Configuration
The ispPAC20 is a general-purpose programmable analog IC, providing a variety of functions including gain, filtering, comparison, and D/A conversion, as well as a user-configurable switching network to interconnect the available functions. Figure 5 shows the major user-visible components of the ispPAC20.
Figure 5. ispPAC20 Block Diagram
VCC
MSEL
OUT1
GND
OUT2
IA
IN1
CP
Logic
CP1OUT
OA
IA
Logic
Window
IN2
CP
CP2OUT
IA
IN3
3VREF
1.5VREF
OA
IA
Analog Routing Pool
CPIN
E2CMOS Mem
Auto-Cal
Reference
ISP Control
DAC
DACOUT
JTAG/SPI
D0...D7
VREFOUT
CMVIN
CAL
DMODE
ENSPI
CS
PC
Not all of the on-chip resources of the ispPAC20 are required to implement a temperature control system. The primary functions required are:
1. DAC for establishing temperature setpoint
2. Error amplifier
3. Output driver for H-Bridge
Figure 6 shows an ispPAC20 internal configuration that is compatible with the external circuitry provided on the
ispPAC20-EV-TEC board. The DAC is used to establish the setpoint, and its output is fed directly into the compensation network. In this particular implementation, the compensation network and error amplifier are combined to
economize on use of circuitry; both functions are carried out by the PACblock comprising IA3,IA4, and OA2.
Because the connection between the DAC and the error amplifier is single-ended (the negative terminal is unused),
IA3’s gain should be set to twice that of IA4 so that DAC output voltage corresponds to the thermistor input voltage,
which is fully differential. Note that to ensure negative feedback from the thermistor, the mode of IA4’s input polarity
switch should be set to ‘Fixed;non-inverting’. The output of the compensation network appears at OUT2.
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ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
Lattice Semiconductor
Figure 6. Internal Configuration of ispPAC20
ispPAC20
DAC
61.59pF
DACOUT
+2
From
Thermistor
IN1
IA3
IN2
IA4
OA2
OUT2
-1
61.59pF
VREFout
+1
a
IA1
OA1
b
OUT1
To Bridge
Driver
IN3
Feedback
from
Bridge
Driver
-1
IA2
The bridge driver circuit comprises IA1,IA2, and OA1. For proper operation, the gain of IA2 must be negative. The
overall gain of the output driver may be adjusted by changing the ratio between IA1’s and IA2’s gains. Increasing
IA1 will increase the driver gain (and consequently the total gain of the control loop), while increasing IA2’s gain will
reduce driver gain.
Note that for both OA’s, the feedback links are opened and the feedback capacitors are set to their maximum values (61.59pF), so as to provide maximum stability. Because the time constants associated with the control loop are
orders of magnitude slower than those developed by the internal feedback capacitors, they will have no significant
effect on the control loop dynamics or stability. The reason for setting them to maximum value is to minimize the
potential for high-frequency (kHz) oscillations which can emit spurious noise and reduce the efficiency and accuracy of the control loop electronics.
6
7
R15 - 10M
R14 - 4.7M
R13 - 2.2M
J3.5
J3.4
J3.3
J3.2
J3.1
J3.11
J3.10
J3.9
J3.8
J3.7
J3.6
R19 - 10M
R18 - 4.7M
R17 - 2.2M
R16 - 1M
RXF
C11 0.1U
C10 0.01U
C9 10U
C8 1U
CXF
J3.17
J3.16
J3.15
J3.14
J3.13
C4
0.1U
C3
0.1U
42
2
8
9
14
OUT2-
DACOUT+
VREFOUT
IN1-
IN1+
17
VS
R12 - 1M
RXA
Compensation Network
C2
10U
+5V
VS
1
25
12
40
29
11
(PLCC-44)
ispPAC20
OUT1+
GND
VS
GND
3
10
TCK
TMS
TDI
TDO
CMVin
IN2+
IN2-
6
7
IN3+
GND
IN3-
TEST
20
19
18
23
43
15
16
R7
100
R6
100
+5V
TMP-
Q3
Q1
TMP+
R8
27
J1.8: TCK
J1.7: GND
J1.6: TMS
J1.5: plug
J1.4: n/c
J1.3: TDI
J1.2: TDO
J1.1: +5V
Q4
Q2
C5
0.1U
+5V
R2
10K
R1
15K
Q9
C7
0.1U
R9
0.56
R5
10K
R4
10K
C6
0.1U
R3
10K
IS-
IS+
R11
27
Q8
Q7
R10
27
Q6
Q5
Q10
C1
10U
J2.2: GND
J2.4: TH-
J2.3: TH+
J2.1: +5V
J2.6: GND
J2.7: TC-
J2.5: TC+
J2.8: VTC
Lattice Semiconductor
ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
7. Detailed Schematic
Figure 7. ispPAC20-EVAL-TEC Schematic
JTAG Interface
OUT1-
Lattice Semiconductor
ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
8. Board Artwork
Figure 8. Top side Silkscreen and Component Identification Drawing
Figure 9. Top Side Foil Pattern
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ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
Lattice Semiconductor
Figure 10. Bottom Side Foil Pattern
9. Components List
Quantity
1
Reference
Description
ispPAC20-EV-TEC
ispPAC20-EV-TEC Circuit Board
1
U1S
44 Pin PLCC Socket - Mill-Max
1
J1
8x1 0.100” spacing 0.025” header, single row
1
J2
8-position screw terminal block, On-Shore Tech ED 120/DS
1
J3
17x2 0.100” spacing 0.025” header, dual row
2
J4.1, J5.1
Test Point - Red (Keystone 5000)
2
J4.2, J5.2
Test Point - Black (Keystone 5001)
4
FEET
Adhesive Rubber Feet -
4
JUMPER
0.1” Shorting Blocks
1
U1
ispPAC20-PLCC44
4
Q1,Q2,Q9,Q10
MMBT3904LT1 NPN Transistor, SOT-23
2
Q3,Q4
MMBT3906LT1 PNP Transistor, SOT23
2
Q5,Q6
MJD210 PNP Transistor, D-PAK
2
Q7,Q8
MJD200 NPN Transistor, D-PAK
3
C1,C2,C9
10uF 6.3V 10% X5R multilayer chip capacitor, SMD1206
6
C3,C4,C5,C6,C7,C11
0.1uF 25V 10% X7R monolithic capacitor, SMD1206
1
C8
1uF 16V 10% X7R monolithic capacitor, SMD1206
1
C10
0.01uF 50V 10% X7R monolithic capacitor, SMD1206
1
R1
15 K 1% resistor, SMD1206
4
R2, R3,R4,R5
10 K, 1% resistor, SMD1206
2
R6,R7
100 Ohm, 5% resistor, SMD1206
3
R8,R10,R11
27 Ohm, 5% resistor, SMD1206
1
R9
0.56 Ohm, 5% resistor, SMD2512
2
R12,R16
1 Meg, 5% resistor, SMD1206
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ispPAC20 Thermoelectric Temperature Controller
Evaluation Board PAC20-EV-TEC
Lattice Semiconductor
9. Components List (Continued)
Quantity
Reference
Description
2
R13, R17
2.2 Meg, 5% resistor, SMD1206
2
R14, R18
4.7 Meg, 5% resistor, SMD1206
2
R15, R19
10 Meg, 5% resistor, SMD1206
A/R
Solder
RXA,RXF,CXC
Leave Unpopulated - User Selectable
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Hotline: 1-800-LATTICE (Domestic)
1-408-826-6002 (International)
e-mail: [email protected]
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