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IRF730 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
N-Channel Power MOSFET
(5.5A, 400Volts)
DESCRIPTION
The Nell IRF730 are N-Channel enhancement mode silicon
gate power field effect transistors. They are designed, tested
and guaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation.
They are designed as an extremely efficient and reliable
device for use in a wide variety of applications such as
switching regulators. convertors,UPS, switching mode power
supplies and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These transistors can be operated directly from integrated
circuits.
D
G
D
TO-220AB
(IRF730A)
S
D (Drain)
FEATURES
RDS(ON) = 1.00Ω @ VGS = 10V
G
(Gate)
Ultra low gate charge(22nC Max.)
Low reverse transfer capacitance
(C RSS = 4pF typical)
S (Source)
Fast switching capability
100% avalanche energy specified
PRODUCT SUMMARY
ID (A)
5.5
VDSS (V)
400
RDS(ON) (Ω)
1.00 @ V GS = 10V
QG(nC) max.
22
Improved dv/dt capability
150°C operation temperature
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise specified)
SYMBOL
TEST CONDITIONS
PARAMETER
VALUE
VDSS
Drain to Source voltage(Note 1)
T J =25°C to 150°C
400
V DGR
Drain to Gate voltage
R GS =20KΩ
400
V GS
ID
Gate to Source voltage
UNIT
V
±30
V GS =10V, T C =25°C
5.5
V GS =10V, T C =100°C
3.5
Continuous Drain Current
A
I DM
Pulsed Drain current(Note 1)
22
I AR
Avalanche current(Note 1)
5.5
E AR
Repetitive avalanche energy(Note 1)
l AR =5.5A, R GS =50Ω, V GS =10V
7.4
mJ
E AS
Single pulse avalanche energy(Note 2)
l AS =5.5A, L =19mH
290
mJ
4.6
V /ns
75
W
0.6
W /°C
dv/dt
Peak diode recovery dv/dt(Note 3)
Total power dissipation
PD
T C =25°C
Derating factor above 25 ° C
TJ
T STG
TL
Operation junction temperature
-55 to 150
Storage temperature
-55 to 150
Maximum soldering temperature, for 10 seconds
Mounting torque, #6-32 or M3 screw
300
10 (1.1)
Note: 1. Repetitive rating: pulse width limited by junction temperature.
2 . V DD ≤ 50 V, L =19 mH , l AS =5.5 A , R G =25 Ω , starting T J =25 °C
3 . I SD ≤ 5.5 A, di/dt ≤ 90 A/µs, V DD ≤ V (BR)DSS , T J ≤ 150 °C.
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1.6mm from case
Page 1 of 7
ºC
lbf . in (N . m)
RoHS
RoHS
IRF730 Series
SEMICONDUCTOR
Nell High Power Products
THERMAL RESISTANCE
SYMBOL
PARAMETER
Rth(j-c)
Thermal resistance, junction to case
Rth(c-s)
Thermal resistance, case to heatsink
Rth(j-a)
Thermal resistance, junction to ambient
Min.
Typ.
UNIT
Max.
1.7
ºC/W
0.50
62
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise specified)
SYMBOL
V(BR)DSS
▲V (BR)DSS/▲T J
I DSS
TEST CONDITIONS
PARAMETER
Drain to source breakdown voltage
I D = 250µA , V GS = 0V
Breakdown voltage temperature coefficient
I D = 1mA, referenced to 25 °C
Drain to source leakage current
Min.
Typ.
Max.
400
V
V/ºC
0.5
V DS =400V, V GS =0V
T C = 25°C
25
V DS =320V, V GS =0V
T J =125°C
250
μA
Gate to source forward leakage current
V GS = 30V, V DS = 0V
100
Gate to source reverse leakage current
V GS = -30V, V DS = 0V
-100
R DS(ON)
Static drain to source on-state resistance
V GS = 10V, I D = 3.3A (Note 1),
V GS(TH)
Gate threshold voltage
V GS =V DS , I D =250μA
2.0
Forward transconductance
V DS =50V, I D =3.3A,
3.1
I GSS
g fs
nA
C ISS
Input capacitance
C OSS
Output capacitance
C RSS
Reverse transfer capacitance
t d(ON)
Turn-on delay time
tr
t d(OFF)
UNIT
Rise time
Turn-off delay time
tf
Fall time
LD
Internal drain inductance
LS
internal source inductance
QG
Total gate charge
Q GS
Gate to source charge
Q GD
Gate to drain charge (Miller charge)
0.8
1
Ω
4.5
V
4.5
S
600
V DS = 25V, V GS = 0V, f =1MHz
pF
103
4
10
22
V DD = 200V, l D = 5.5A, R D = 57Ω,
V GS = 10V, R G = 12Ω (Note 1)
ns
20
16
4.5
Between lead, 6mm from
package and center of die
nH
7.5
22
V DS = 320V, V GS = 10V, I D = 5.5A
5.8
nC
9.3
SOURCE TO DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25°C unless otherwise specified)
SYMBOL
VSD
Is (Is D )
PARAMETER
TEST CONDITIONS
Typ.
Max.
UNIT
Diode forward voltage
I SD = 5.5A, V GS = 0V
1.6
V
Continuous source to drain current
Integral reverse P-N junction
diode in the MOSFET
5.5
Min.
D (Drain)
A
I SM
Pulsed source current
22
G
(Gate)
S (Source)
t rr
Reverse recovery time
Q rr
Reverse recovery charge
I S = 5.5A, V GS = 0V,
dI F /dt = 100A/µs
t ON
Forward turn-on time
Intrinsic turn-on time is negligible (turn-on is domonated by L S +L D )
Note: 1. Pulse test: Pulse width ≤ 300μs, duty cycle ≤ 2% .
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Page 2 of 7
370
550
ns
1.6
2.4
μC
IRF730 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
ORDERING INFORMATION SCHEME
IRF
730
A
MOSFET series
N-Channel, IR series
Current & Voltage rating, lD & VDS
5.5A / 400V
Package type
A = TO-220AB
Fig.1 Typical output characteristics
10
1
0.1
4.5V
20µs pulse width
T J =25°C
0.01
0.1
1
10
Drain-to-Source Current, l D (A)
V GS
Top: 15V
10V
8V
7V
6V
5.5V
5V
Bottorm: 4.5V
10
1
4.5V
0.1
20µs pulse width
T J =150°C
0.01
0.1
100
1
10
100
Drain-to-Source voltage, V DS (V)
Drain-to-Source voltage, V DS (V)
Fig.3 Typical transfer characteristics
Fig.4 Normalized On-Resistance vs. Temperature
10 3
10 2
T J = 150°C
T J = 25°C
10 1
V DS =50V
20µs pulse width
1
Drain-to-Source Current,l D (A)
100
V GS
Top: 15V
10V
8V
7V
6V
5.5V
5V
Bottorm: 4.5V
6
4
8
10
12
Drain-to-Source on-resistance, R DS(on)
(Normalized)
Drain-to-Source Current,l D (A)
100
Fig.2 Typical output characteristics
Gate-to-Source voltage, V GS (V)
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2.5
l D =5.5A
2.0
1.5
1.0
0.5
0
-60 -40 -20
V GS =10V
0
20 40 60 80 100 120 140 160
Junction Temperature,T J (°C)
Page 3 of 7
IRF730 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
Fig.5 Typical capacitance vs. Drain-to-Source
voltage
16
100000
V GS = 0V, f =1MHZ
C iss = C gs +C gd ( C ds = shorted )
C rss = C gd
C oss = C ds +C gd
10000
l D = 5.5A
Gate-to-Source voltage, V GS (V)
Capacitance, C (pF)
Fig.6 Typical gate charge vs. Gate-to-Source
voltage
1000
Ciss
100
Coss
10
Crss
14
V DS = 320V
V DS = 200V
V DS = 80V
12
8
4
For test circuit see
figure 13
0
1
1
10
100
1000
5
0
15
20
25
Total gate charge, Q G (nC)
Drain-to-Source voltage, V DS (V)
Fig.7 Typical Source-Drain diode forward
voltage
Fig.8 Maximum safe operating area
100
100
Operation in This Area is Limited by R DS(ON)
T J = 15 0°C
10
10µs
Drain current, l D (A)
Reverse drain current, l SD (A)
10
T J = 25 °C
1
10
100µs
1ms
1
V GS = 0V
0.1
10
0.1
0.4
0.6
0.8
1
1.2
100
Drain-to-Source voltage, V DS (V)
Source-to-Drain voltage, V SD (V)
Fig.9 Maximum drain current vs.
Case temperature
6
Drain Current, l D (A)
5
4
3
2
1
0
25
50
75
100
125
Case temperature, T C ( ° C)
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10ms
Note:
1. T C = 25°C
2. T J = 150°C
3. Single Pulse
Page 4 of 7
150
1000
IRF730 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
Fig.10 Maximum effective transient thermal lmpedance,
Junction-to-Case
Thermal response, Rth(j-c) (°C/W)
10
1
D = 0.5
0.2
0.1
PDM
0.1
0.05
t1
0.02
0.01
t2
Single pulse
(Thermal response)
0.01
0.00001
Notes:
1. Duty factor, D = t1/ t2
2. Peak TJ = PDM * Rth(j-c) +TC
0.0001
0.001
0.01
0.1
1
Rectangular Pulse Duration, t 1 (sec)
Fig.11a. Switching time test circuit
Fig.11b. Switching time waveforms
RD
V DS
V DS
90%
V GS
RG
D.U.T.
+
- V DD
10V
V GS
Pulse width ≤ 1µs
Duty Factor ≤ 0.1%
10%
t d(ON)
t d(OFF)
tR
Fig.12a. Unclamped lnductive test circuit
tF
Fig.12b. Unclamped lnductive waveforms
15V
BV DSS
l AS
L
V DS
DRIVER
l D(t)
V DS(t)
RG
D.U.T.
l AS
+
V
- DD
V DD
A
20V
tP
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Time
0.01Ω
tp
Page 5 of 7
RoHS
RoHS
IRF730 Series
SEMICONDUCTOR
Nell High Power Products
700
TOP
600
BOTTOM
Fig.12d. Typical drain-to-source voltage
vs. Avalanche current
610
lD
2.5A
3.5A
5.5A
Avalanche voltage, V DS(av) (V)
Single pulse avalanche energy, E AS (mJ)
Fig.12c. Maximum avalanche energy vs.
Drain current
500
400
300
200
100
0
25
75
50
100
125
600
590
580
570
560
550
540
0
150
1
Junction temperature, T J (°C)
3
2
5
4
6
Avalanche current, I AV (Α)
Fig.13a. Basic gate charge waveform
Fig.13b. Gate charge test circuit
Current Regulator
Same Type as D.U.T.
V GS
50KΩ
QG
0.2µF
12V
10V
0.3µF
+
Q GD
Q GS
-
D.U.T.
V DS
V GS
3mA
RG
Charge
RD
Current Sampling Resistors
Fig.14 Peak diode recovery dv/dt test circuit for N-Channel MOSFET
D.U.T.
Driver Gate Drive
+
Circuit Layout Considerations
• Low Stray lnductance
• Ground Plane
• Low Leakage lnductance
Current Transformer
P.W.
D=
Period
P.W.
Period
VGS=10V
-
D.U.T. I SD Waveform
+
-
-
RG
Reverse
Recovery
Current
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
•
•
•
•
dv/dt controlled by R G
Driver same type as D.U.T.
l SD controlled by Duty Factor " D "
D.U.T. -Device Under Test
Re-Applied
Voltage
+
-
V DD
Diode Recovery
dv/dt
Body Diode
Forward Drop
Inductor Curent
Ripple ≤ 5%
*V GS = 5V for Logic Level Devices
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Page 6 of 7
VDD
ISD
*
IRF730 Series
SEMICONDUCTOR
RoHS
RoHS
Nell High Power Products
Case Style
TO-220AB
10.54 (0.415) MAX.
9.40 (0.370)
9.14 (0.360)
4.70 (0.185)
4.44 (0.1754)
3.91 (0.154)
3.74 (0.148)
1.39 (0.055)
1.14 (0.045)
2.87 (0.113)
2.62 (0.103)
3.68 (0.145)
3.43 (0.135)
1
PIN
2
16.13 (0.635)
15.87 (0.625)
3
4.06 (0.160)
3.56 (0.140)
15.32 (0.603)
14.55 (0.573)
8.89 (0.350)
8.38 (0.330)
29.16 (1.148)
28.40 (1.118)
2.79 (0.110)
2.54 (0.100)
1.45 (0.057)
1.14 (0.045)
2.67 (0.105)
2.41 (0.095)
2.65 (0.104)
2.45 (0.096)
14.22 (0.560)
13.46 (0.530)
0.90 (0.035)
0.70 (0.028)
5.20 (0.205)
4.95 (0.195)
0.56 (0.022)
0.36 (0.014)
D (Drain)
G
(Gate)
S (Source)
All dimensions in millimeters(inches)
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Page 7 of 7