Download XB06 Optical Receiver IP Info Sheet - X

OEIC Building Blocks
OEIC (Optical Receiver IC) building blocks for CD/DVD/Red- Laser
Applications, using XB06’s 0.6 µm BiCMOS Technology
Objective
The 0.6 µm-BiCMOS-technology offers CMOS inherent diodes used as photodetectors, which are usable together with BiCMOS specific primitive devices (bipolar transistors) for optical receiver applications. To enable the entrance into the design of Optical Receiver ICs for customers, a library containing typical OEIC building blocks was created. The OEIC building blocks are intended for use at
660nm (red) wavelengths for CD/DVD/Red- laser applications.
The OEIC building blocks are fully characterised by measurements, so that the accuracy of the simulation models is demonstrated and confirmed.
Customers can then start their own optical developments on a library of reliable, characterised OEIC
building blocks.
Global settings
To allow a broad range of applications, the OEIC building blocks are functional in a supply voltage
range from 4.5 V to 5.5 V. They are intended for a temperature range from 0°C up to 85°C.
OEIC Circuit Topology
The circuit topology of an OEIC building block is shown in Fig. 1. An optical receiver channel consists
of a TIA with adjustable gain settings and an integrated PIN diode connected to the input. For the offset voltage compensation and to adjust a stabile dc operating point of the TIA, a matched replica of
the TIA without a PIN diode is used. The reference voltage Vref is applied to the TIA from an external
pin and controlled by an offset compensation circuitry. The TIA is buffered to drive a load of 10kΩ ||
10pF at their output.
TIA
Buffer
Vout
Vref
TIA
Vref
Matched Replica for
Offset Compensation
OPA
Vrefext
Fig. 1 OEIC circuit topology
© X-FAB Semiconductor Foundries
page 1 von 6
OEIC Building Blocks
Fast Channel with TIA 150MHz Bandwidth
A fast DVD receiver channel with two selectable gain settings is available. To form a complete optical
receiver channel for optical wavelengths of 660nm, an integrated PIN photodiode with a size of 50 µm
x 50 µm (DPIN_5050) has to be attached to the Cathode pin.
Cell Name
OEIC_Fast
high
gain
VOFF
VREF
[mV]
[V]
< 2.0
2.1…2.5
R
[mV/µW]
f3dB
[MHz]
VN
[dBm]
29
110
150
low
2.1…2.5
8.10
< 1.5
gain
Tab. 1 selected parameters of fast OEIC building block
IS
ASI
[mA]
[mm2]
-89
2.25
0.160
-94
2.25
0.160
10
10
0
0
-10
-10
S21 [dB]
S21 [dB]
Typical Performance Characteristics
-20
-30
-40
1M
Measurement
Simulation
10M
-20
-30
100M
f [Hz]
1G
-40
1M
Measurement
Simulation
10M
100M
1G
f [Hz]
Fig. 2 Normalized S21 of fast channel with PIN
photodiode at 660nm, low gain
Fig. 3 Normalized S21 of fast channel with PIN
photodiode at 660nm, high gain
Fig. 4 Transient response of fast channel with
PIN photodiode at 660nm, low gain (50mV/div.,
20ns/div.)
Fig. 5 Transient response of fast channel with PIN
photodiode at 660nm, low gain, simulation result
© X-FAB Semiconductor Foundries
page 2 von 6
OEIC Building Blocks
Typical Performance Characteristics
Measurement
Simulation
Noise level [dBm]
Noise level [dBm]
Measurement
Simulation
f [MHz]
f [MHz]
Fig.6 Output noise level of fast channel with PIN
photodiode, RBW=30kHz, low gain
Fig. 7 Output noise level of fast channel with PIN
photodiode, RBW=30kHz, high gain
Pin locations
Gain
VCC
Out
Cathode
VEE
IBias
VRef
Layout of DPIN_5050
© X-FAB Semiconductor Foundries
page 3 von 6
OEIC Building Blocks
Sensitive Channel with TIA 20MHz Bandwidth
A sensitive DVD receiver channel with two selectable gain settings is available. To form a complete
optical receiver channel for optical wavelengths of 660nm, an integrated PIN photodiode with a size of
50 µm x 100 µm (DPIN_50100) has to be attached to the Cathode pin.
Cell Name
OEIC
high
gain
VOFF
VREF
[mV]
[V]
< 3.5
2.1…2.5
R
[mV/µW]
f3dB
[MHz]
VN
[dBm]
55
25
48
Sensitive
low
2.1…2.5
15
< 2.0
gain
Tab. 2 selected parameters of sensitive OEIC building block
IS
ASI
[mA]
[mm2]
-90
2.0
0.118
-92
2.0
0.118
10
10
0
0
-10
-10
S21 [dB]
S21 [dB]
Typical Performance Characteristics
-20
-30
-40
1M
Measurement
Simulation
10M
-20
-30
100M
1G
f [Hz]
Fig. 2 Normalized S21 of sensitive channel with
PIN photodiode at 660nm, low gain
-40
1M
Measurement
Simulation
10M
100M
1G
f [Hz]
Fig. 3 Normalized S21 of sensitive channel with
PIN photodiode at 660nm, high gain
Fig. 4 Transient response of sensitive channel with Fig. 5 Transient response of sensitive channel with
PIN photodiode at 660nm, low gain (100mV/div.,
PIN photodiode at 660nm, low gain, simulation
20ns/div.)
result
© X-FAB Semiconductor Foundries
page 4 von 6
OEIC Building Blocks
Noise level [dBm]
Noise level [dBm]
Typical Performance Characteristics
Measurement
Simulation
Measurement
Simulation
f [MHz]
f [MHz]
Fig. 6 Output noise level of sensitive channel with
PIN photodiode, RBW=30kHz, low gain
Fig. 7 Output noise level of sensitive channel with
PIN photodiode, RBW=30kHz, high gain
Pin locations
Gain
VCC
Out
Cathode
VRef
VEE
IBias
Layout of DPIN_50100
© X-FAB Semiconductor Foundries
page 5 von 6
OEIC Building Blocks
Application notes
Power nets
•
•
•
VCC and VEE shall be connected at the predefined pin locations.
If possible, use tree topology for the power nets and connect them close to the power pads.
If additional voltage supply bypass capacitors (CB) are used, check if series damping resistors (RS)
are needed to avoid gain peaking due to the bond wire inductances (LB). A good starting point for
optimization is: RS =
LB C B .
Photodiode
•
•
•
For red light (660nm), a standard PIN photodiode with an NDIFF area of 50 µm x 100 µm
(DPIN_50100) shall be connected to the Cathode pin.
Do not connect larger photodiodes or other photodiode types to the sensitive DVD channel. Their
higher photodiode capacitance may result in gain peaking.
Try to keep the wire length between the photodiode and the Cathode pin as short as possible. The
additional parasitic capacitance of this wire shall not exceed 100fF. Do not cross nets that could
couple noise into the input of the DVD channel.
Biasing
•
•
The IBias pin shall be connected to a 50 µA PMOS current source.
Connect the VRef pin to the external reference voltage source. Reference voltages in the range of
2.1 V to 2.5 V are supplied.
Output load
•
•
•
The DVD channel is designed to drive a load resistance of 10kΩ and a load capacitance of 10pF.
The output voltage is referenced to the reference voltage VREF, not to VEE. Therefore the output
load is connected between Out and VRef.
Do not connect the load resistor to VEE, which will result in significantly increased output offset
voltages.
© X-FAB Semiconductor Foundries
page 6 von 6