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Germanium MOSFETs
Professor K.N.Bhat
Electrical Communication Engineering Department
Indian Institute of Science
Bangalore-560 012
Email : [email protected]
E3-327 Nanoelectronics Devices lecture series
Lecture # 30
15th November, 2007
1
Need for alternate material to Silicon
Fundamental scaling limit on maximum ID(sat)
for Si MOSFET is set by injection velocity of
carriers from source into channel . This can
be enhanced by using materials with higher
carrier mobility.
2
Properties of Germanium and comparison with Silicon
Property
Ge
Si
Bandgap E g (eV)
0.66
1.1 ( eV)
Electron mobility
µ n (cm2/VSec)
3900
1500
Hole mobility
µ p (cm2/VSec)
1900
450
Intrinsic conc.
ni / cm 3
Melting temp.
(°C)
2.5 × 1013
934
1.5 × 1010
1410
3
Benefits of using Germanium Channel
• Germanium offers higher mobility for both electrons
( factor of 2) and holes (factor of 4) compared with
silicon
(Note that GaAs offers high electron mobility of 8500
cm2 / V-Sec , but hole mobility is low 400 cm2 /V-Sec).
•Nano scale MOSFET with low barrier Schottky
Source Drain contacts can be realized rather easily
with germanium
• Smaller optical band-gap of Ge broadens the
absorption wavelength spectrum allowing optoelectronic integration to enhance.
λc = 1.24 / E g = 1.24 / 0.66 = 1.89µ m
4
Challenges in Using Germanium Channel
•The much lower melting point (934°C compared with
1,400°C for Si) presents additional processing
challenges for integrating Ge channel MOSFETs.
•One major problem for Ge CMOS device fabrication is
that it is very difficult to obtain a stable oxide gate
dielectric.
•The water-soluble native Ge oxide that is typically
present on the upper surface of a Ge-containing
material causes this gate dielectric instability.
5
Additional Challenges with Ge nano MOSFETs
• One
of most challenging tasks for Ge/high-k MOS
systems is the Ge surface preparation and interface
control before high-k film deposition.
• It
appears essential to have a surface free (i.e.,
devoid) of germanium oxide before high-k film
deposition.
• Because
of the low melting point of Ge, it is desirable
to use metal gate electrodes rather than conventional
polySi gate electrodes where high-temperature
(>900°C) dopant activation is required.
6
•The low bandgap of germanium (0.67 eV compared with
1.12 eV for Si) presents a device design challenge.
(Junction leakage , inability to operate at temperatures
higher than 75°C etc) . This problem can be over
come using the quantization effects in ultra thin
films of Ge
•When the Ge film thickness is reduced to few
nano meters ,the energy levels get quantized all
the energy levels shift up and the electrons
begin to spill over into heavier X-valley from Lvalley . The band gap increases and the Band to
Band Tunneling (BTBT) goes down
7
Off State Leakage Current due to Band -to
Band tunneling ( LG = 15µ m , tox = 0.7 nm, VDD = 0.9 V )
Increase in the
effective band gap
of Ge due to
quantization
causes a sharp
current reduction
in the BTBT as
function of film
thickness
Reference : Stanford University thesis by Abhijit Pethe (2007)
8
Challenges related to high acceptor
interface state density in Ge (APL , Vol. 89, 2006)
9
Fermi level pinning effect in P-type Ge
10
N-Channel MOSFET: Refer to the previous
slide. Consider doping Density NA =1017 /cm3
Case(i). Gate bias is zero: EF is aligned with CNL .
Interface is neutral. Qit = 0 as shown in Fig(a).
Case (ii). Positive gate bias: Energy Bands bend
down and CNL is drawn away from EF as shown in Fig (b).
Hence more (un-passivated ) acceptor-like CB states are
filled by electrons , building a fixed net negative charge at
the interface .
These charges are not available for current flow and
screen the applied positive gate bias preventing the
formation of inversion layer .
The above phenomena makes it difficult to build an
inversion layer which in turn could severely affect
operation of N-channel MOSFET devices
11
Effect of high density of Acceptor type
Dit on P-Channel Ge MOSFET (N- Substrate)
In N-Type
Ge ,EF is
located in
the upper
half of band
gap
•Even larger negative charges could be trapped at the
interface .
• The band bending can be so high that the channel will be
inverted even at VG = 0.
•Thus a situation may arise when the p-channel MOSFET
will not turn off unless a positive voltage is applied to gate
12
1.Gate dielectric
• The best known dielectric candidate for use on Ge is
Ge oxynitride (GeOxNy). High-quality thin GeOxNy can be
formed on germanium by nitridation of a thermally
grown germanium oxide. Rapid thermal oxidation (RTO)
at 500–600°C followed by rapid thermal nitridation (RTN)
at 600–650°C in ammonia (NH3) ambient has generally
been practiced.
•High-performance Ge MOSFETs with greater mobility
than Si MOSFETs with SiO2 were demonstrated using a
relatively thick GeON (EOT ~5 nm) However, the most
important application for high-quality thin GeOxNy is
perhaps that it could serve as a stable interlayer for
integration of novel high-k dielectrics into Ge MOS devicres
13
High-k dielectrics as gate dielectrics for
Ge MOSFETs
Recent studies on High-k dielectrics for silicon
MOSFETs by ALD and MOCVD techniques has
prompted activities to develop GeMOSFETs
implementing High -k dielectrics such as ZrO2 , HfO2
(Binary metal oxides)
•In addition, germanates (MeGexOy, where Me stands
for a metal with high ion polarizability, such as Hf, Zr,
La, Y, Ta, and Ti) have also been proposed to
potentially improve carrier mobility and interface
stability.
14
2.Germanium Surface preparation and
interface control
• For Ge specifically, it appears essential to have
a surface free (i.e., devoid) of germanium oxide
before high-k film deposition.
• A conventional solution for Si has been to use
concentrated or dilute hydrofluoric acid (i.e., HF
or DHF) to remove any native Si oxide while
leaving an H-passivated surface.
• Despite being successful for the fabrication of
Si CMOS devices, this surface-passivation
technique was found to be less effective on Ge
15
Different Approaches for passivation of Ge surface
• One demonstrated method of fabricating functional
gate stacks is to desorb the Ge oxide in an ultrahighvacuum (UHV) system at high temperatures (e.g., 400–
650°C) followed by in situ high-k deposition
•The main drawback of this approach is that UHV
systems are costly and are generally incompatible with
the standard ALD or MOCVD high-k deposition tools
used in manufacturing.
•A practical solution is based on nitridation of a wetetched (e.g., using DHF) Ge surface prior to dielectric
deposition using either atomic N exposure or a hightemperature NH3 gas treatment.
16
CV Characteristics of Ge/HfO2/Al
MOS Capacitors.
(a)Ge wet cleaned only
(b)Ge wet cleaned and treated
with 1 minute RT NH3 at 650°C
• The reduction in frequency
dispersion in (b) is because of
reduced Ge-Hf bonding or inter
diffusion at the interface and
passivation by nitrogen.
• However N2 introduces fixed
oxide charges at the interface
Reference: IBM Journal of Research and Development
Advanced Silicon Technology Volume 50,
Number 4/5, 2006
17
3. Gate electrodes
• Melting point of Ge is low. Conventional polySi gate
electrodes where high-temperature (>900°C) dopant
activation is required can not be used.
• Metal materials such as Al, W, Pt, TiN, and TaN are
among the most popular metal electrodes reported for
Ge MOSFETs .
• The metal gate electrodes are chosen considering
their interaction with the Ge gate dielectric.
(eg) In the case of Ge/GeON MOS capacitors with
aluminum (Al) and tungsten (W) gate electrodes. A
much thinner EOT can be obtained by using tungsten
rather than aluminum as the gate electrode because
of the elimination of the interfacial layer formed
18
between GeON and Al .
4.Dopant diffusion
• The diffusion of p-type dopants such as boron is
suppressed while the diffusion of n-type dopants
such as P, As, and Sb is enhanced in SiGe and Ge
compared with bulk Si .
• This favors the formation of ultra shallow junctions
in p-channel Ge MOSFETs, while presenting a
challenge for shallow-junction formation in nchannel Ge MOSFETs.
• A method based on solid-phase diffusion was
reported to form a shallow n-type junction in Ge .
• Dopant solubility limit and rapid dopant diffusion are
believed to be the major reasons for the relatively
poor performance observed in n-channel Ge
19
MOSFETs
A Sub -400°C Ge MOSFET Technology
with High-k Dielectric and Metal Gate
Reference : Chi Chu Chui et al ,
IEDM 2002, pp.437-440
The first self aligned surface channel Ge pMOSFET with ZrO2 gate dielectric having EOT of
0.6 to 1 nm and Platinum gate electrode .
20
Top View and Cross section of ring MOSFET
Self Isolation is achieved by tying
the source ring potential to ground
21
MOS capacitor on Ge using ZrO2 gate dielectirc
CV measured at 400kHz
22
Study of Dopant (Boron) implantation
and activation
Boron implantation was done at 35keV energy and 4x
1015 /cm2 dose on Sb doped (1016/cm3 ) n-Ge substratae
23
Activated Boron profile measured by spreading resistance
24
Process flow reported in the ref: Chi Chu Chui et al ,
IEDM 2002, pp.437-440
25
Output characteristics of 2µm gate length Ge transistor
W= 320.4 µm. Note that the device is not turning off
26
Hole mobility extracted with Ge transistors having
3.5nm ZrO2 and universal mobility model for Si MOSFET
27
5. Junction leakage
• The smaller bandgap in Ge has been a concern because
of its influence on junction leakage and band-to-band
tunneling.
• The junction leakage of both n+/p and p+/n Ge diodes
formed by boron and phosphorus implantation can be
reduced to ~10−4 A/cm2 with annealing. This is
considered acceptable for device operation.
• It has been shown that the band-to-band tunneling can
be reduced dramatically through careful device structure
design.
Reference: T. Krishnamohan, Z. Krivokapic, K. Uchida, Y. Nishi, and
K. C. Saraswat, “Low Defect Ultra-Thin Fully Strained-Ge MOSFET
on Relaxed Si with High Mobility and Low Band-to-Band Tunneling,”
28
Symp. VLSI Technol., p. 82 (2005).