Download IRF530

[ /Title
(IRF53
0,
RF1S5
30SM)
/Subject
(14A,
100V,
0.160
Ohm,
NChannel
Power
MOSFETs)
/Autho
r ()
/Keywords
(14A,
100V,
0.160
Ohm,
NChannel
Power
MOSFETs,
Intersil
Corporation,
TO220AB
, TO263AB
IRF530
Data Sheet
February 2002
14A, 100V, 0.160 Ohm, N-Channel Power
MOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. These types can be operated directly
from integrated circuits.
Formerly developmental type TA17411.
Ordering Information
PART NUMBER
IRF530
• 14A, 100V
• rDS(ON) = 0.160Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
PACKAGE
TO-220AB
Features
BRAND
D
IRF530
G
NOTE: When ordering, use the entire part number.
S
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
1
©2002 Fairchild Semiconductor Corporation
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
IRF530 Rev. B1
IRF530
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
IRF530
100
100
14
10
56
±20
79
0.53
69
-55 to 175
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
UNITS
V
V
A
A
A
V
W
W/oC
mJ
oC
oC
oC
300
260
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
TC = 25oC, Unless Otherwise Specified
Electrical Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
100
-
-
V
VGS = VDS, ID = 250µA
2
-
4.0
V
VDS = 95V, VGS = 0V
-
-
25
µA
µA
Drain to Source Breakdown Voltage
BVDSS
ID = 250µA, VGS = 0V (Figure 10)
Gate to Threshold Voltage
VGS(TH)
Zero Gate Voltage Drain Current
IDSS
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC
On-State Drain Current (Note 2)
ID(ON)
Gate to Source Leakage Current
IGSS
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
rDS(ON)
gfs
td(ON)
tr
Turn-Off Delay Time
td(OFF)
Fall Time
-
-
250
14
-
-
A
VGS = ±20V
-
-
±500
nA
ID = 8.3A, VGS = 10V (Figures 8, 9)
-
0.14
0.16
Ω
VDS > ID(ON) x rDS(ON) MAX, VGS = 10V
VDS ≥ 50V, ID = 8.3A (Figure 12)
5.1
7.6
-
S
VDD = 50V, ID ≈ 14A, RG ≈ 12Ω, RL = 3.4Ω
MOSFET Switching Times are Essentially
Independent of Operating Temperature
-
12
15
ns
-
35
65
ns
-
25
70
ns
-
25
59
ns
VGS = 10V, ID = 14A, VDS = 0.8 x Rated BVDSS
Ig(REF) = 1.5mA (Figure 14)
Gate Charge is Essentially Independent of
Operating Temperature
-
18
30
nC
-
4
-
nC
-
7
-
nC
VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)
-
600
-
pF
-
250
-
pF
tf
Total Gate Charge
(Gate to Source + Gate to Drain)
Qg(TOT)
Gate to Source Charge
Qgs
Gate to Drain “Miller” Charge
Qgd
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Internal Drain Inductance
LD
Measured from the
Contact Screw on Tab To
Center of Die
Measured from the Drain
Lead, 6mm (0.25in) from
Package to Center of Die
Internal Source Inductance
LS
Measured from the Source
Lead, 6mm (0.25in) From
Header to Source Bonding
Pad
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
D
-
50
-
pF
-
3.5
-
nH
-
4.5
-
nH
-
7.5
-
nH
-
-
1.9
oC/W
-
-
62.5
oC/W
-
-
LD
G
LS
S
Thermal Resistance Junction to Case
RθJC
Thermal Resistance Junction to
Ambient
RθJA
Free Air Operation
-
-
2
©2002 Fairchild Semiconductor Corporation
IRF530 Rev. B1
IRF530
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Continuous Source to Drain Current
TEST CONDITIONS
ISD
Pulse Source to Drain Current (Note 2)
Modified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Diode
ISDM
D
MIN
TYP
MAX
UNITS
-
-
14
A
-
-
56
A
G
S
Source to Drain Diode Voltage (Note 2)
TJ = 25oC, ISD = 14A, VGS = 0V (Figure 13)
TJ = 25oC, ISD = 14A, dISD/dt = 100A/µs
TJ = 25oC, ISD = 14A, dISD/dt = 100A/µs
VSD
Reverse Recovery Time
trr
Reverse Recovery Charge
QRR
-
-
2.5
V
5.5
120
250
ns
0.17
0.6
1.3
µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 530µH, RG = 25Ω, peak IAS = 14A (Figures 15, 16).
Typical Performance Curves
Unless Otherwise Specified
15
1.0
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
0.8
0.6
0.4
0.2
9
6
3
0
0
25
0
125
50
75
100
TC , CASE TEMPERATURE (oC)
150
25
175
50
75
100
150
125
175
TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
ZθJC, TRANSIENT THERMAL IMPEDANCE
12
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
10
1
0.5
0.2
PDM
0.1
0.1
0.05
t1
0.02
0.01
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
SINGLE PULSE
0.01
10-5
10-4
10-3
10-2
0.1
1
10
t P, RECTANGULAR PULSE DURATION (s)
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
3
©2002 Fairchild Semiconductor Corporation
IRF530 Rev. B1
IRF530
Typical Performance Curves
25
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
10 3
Unless Otherwise Specified (Continued)
10 2
10µs
100µs
10
1ms
10ms
1
0.1
TC = 25oC
TJ = 175oC
SINGLE PULSE
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
15
VGS = 6V
10
VGS = 5V
5
VGS = 4V
0
10
10 2
VDS, DRAIN TO SOURCE VOLTAGE (V)
1
0
10 3
IDS(ON), DRAIN TO SOURCE CURRENT (A)
ID, DRAIN CURRENT (A)
VGS = 8V
20
VGS = 7V
VGS = 10V
15
VGS = 6V
10
VGS = 5V
5
VGS = 4V
0
2
1
3
4
5
100
175oC
0.1
0
NORMALIZED ON RESISTANCE
rDS(ON), ON-STATE RESISTANCE (Ω)
0.9
0.6
VGS = 10V
0.3
VGS = 20V
0
36
48
ID, DRAIN CURRENT (A)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
25oC
1
3.0
1.2
24
50
2
4
6
8
VGS, GATE TO SOURCE VOLTAGE (V)
10
FIGURE 7. TRANSFER CHARACTERISTICS
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
12
40
10
FIGURE 6. SATURATION CHARACTERISTICS
0
30
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
VDS, DRAIN TO SOURCE VOLTAGE (V)
1.5
20
FIGURE 5. OUTPUT CHARACTERISTICS
25
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
0
VGS = 7V
VGS = 10V
VGS = 8V
60
2.4
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 14A
1.8
1.2
0.6
0
-60 -40 -20
0
20
40
60
80 100 120 140 160 180
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
4
©2002 Fairchild Semiconductor Corporation
IRF530 Rev. B1
IRF530
Typical Performance Curves
Unless Otherwise Specified (Continued)
1500
ID = 250µA
1.15
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
1200
C, CAPACITANCE (pF)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
1.25
1.05
0.95
0.85
900
CISS
600
COSS
300
0.75
-60 -40 -20
CRSS
0
20
40
0
80 100 120 140 160 180
60
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
8
6
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
100
ISD, SOURCE TO DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
10
25oC
175oC
4
2
0
0
5
10
15
102
10
1
TJ , JUNCTION TEMPERATURE (oC)
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
25oC
175oC
1
0.1
25
0.4
0.8
1.2
1.6
VSD , SOURCE TO DRAIN VOLTAGE (V)
0
I D , DRAIN CURRENT (A)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
2.0
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
VGS, GATE TO SOURCE (V)
ID = 14A
VDS = 50V
16
VDS = 20V
12
VDS = 80V
8
4
0
0
6
12
18
24
30
QG , GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
5
©2002 Fairchild Semiconductor Corporation
IRF530 Rev. B1
IRF530
Test Circuits and Waveforms
VDS
BVDSS
tP
L
VDS
IAS
VARY tP TO OBTAIN
VDD
+
RG
REQUIRED PEAK IAS
-
VGS
VDD
DUT
tP
0V
0
IAS
0.01Ω
tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(ON)
td(OFF)
tf
tr
VDS
RL
90%
+
RG
-
10%
10%
0
VDD
90%
90%
DUT
VGS
0
50%
50%
PULSE WIDTH
10%
VGS
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 17. SWITCHING TIME TEST CIRCUIT
VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
12V
BATTERY
0.2µF
VDD
Qg(TOT)
SAME TYPE
AS DUT
50kΩ
Qgd
Qgs
0.3µF
D
Ig(REF)
VDS
DUT
G
0
S
0
IG CURRENT
SAMPLING
RESISTOR
VGS
VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
IG(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
6
©2002 Fairchild Semiconductor Corporation
IRF530 Rev. B1
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
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DenseTrench™
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EcoSPARK™
E2CMOS™
EnSigna™
FACT™
FACT Quiet Series™
FAST®
FASTr™
FRFET™
GlobalOptoisolator™
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MicroFET™
MicroPak™
MICROWIRE™
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Quiet Series™
SILENT SWITCHER®
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STAR*POWER™
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SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
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STAR*POWER is used under license
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
2. A critical component is any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can be
which, (a) are intended for surgical implant into the body,
reasonably expected to cause the failure of the life support
or (b) support or sustain life, or (c) whose failure to perform
device or system, or to affect its safety or effectiveness.
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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